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dhd.h
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/*
* Header file describing the internal (inter-module) DHD interfaces.
*
* Provides type definitions and function prototypes used to link the
* DHD OS, bus, and protocol modules.
*
* Copyright (C) 2023, Broadcom.
*
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2 (the "GPL"),
* available at http://www.broadcom.com/licenses/GPLv2.php, with the
* following added to such license:
*
* As a special exception, the copyright holders of this software give you
* permission to link this software with independent modules, and to copy and
* distribute the resulting executable under terms of your choice, provided that
* you also meet, for each linked independent module, the terms and conditions of
* the license of that module. An independent module is a module which is not
* derived from this software. The special exception does not apply to any
* modifications of the software.
*
*
* <<Broadcom-WL-IPTag/Dual:>>
*/
/****************
* Common types *
*/
#ifndef _dhd_h_
#define _dhd_h_
#if defined(__linux__)
#include <linux/init.h>
#include <linux/firmware.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/skbuff.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/random.h>
#include <linux/spinlock.h>
#include <linux/ethtool.h>
#include <linux/proc_fs.h>
#include <asm/uaccess.h>
#include <asm/unaligned.h>
#include <linux/fs.h>
#include <linux/namei.h>
#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0)
#include <linux/sched/types.h>
#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(4, 11, 0) */
#ifdef DHD_BUZZZ_LOG_ENABLED
#include <dhd_buzzz.h>
#endif /* DHD_BUZZZ_LOG_ENABLED */
/* The kernel threading is sdio-specific */
struct task_struct;
struct sched_param;
#if defined(BT_OVER_SDIO)
#include <dhd_bt_interface.h>
#endif /* defined (BT_OVER_SDIO) */
int setScheduler(struct task_struct *p, int policy, struct sched_param *param);
int get_scheduler_policy(struct task_struct *p);
#else /* __linux__ */
#define ENOMEM 1
#define EFAULT 2
#define EINVAL 3
#define EIO 4
#define ETIMEDOUT 5
#define ENODATA 6
#define EREMOTEIO 7
#define ENODEV 8
#define ERESTARTSYS 512
#endif /* __linux__ */
#define MAX_EVENT 16
#define ALL_INTERFACES 0xff
/* H2D and D2H ring dump is enabled by default */
#ifdef PCIE_FULL_DONGLE
#define DHD_DUMP_PCIE_RINGS
#endif /* PCIE_FULL_DONGLE */
#include <osl.h>
#include <wlioctl.h>
#include <dhdioctl.h>
#include <wlfc_proto.h>
#include <hnd_armtrap.h>
#if defined(DUMP_IOCTL_IOV_LIST) || defined(DHD_DEBUG)
#include <bcmutils.h>
#endif /* DUMP_IOCTL_IOV_LIST || DHD_DEBUG */
#if defined(BCMWDF)
#include <wdf.h>
#include <WdfMiniport.h>
#endif /* (BCMWDF) */
#ifdef WL_CFGVENDOR_SEND_HANG_EVENT
#include <dnglioctl.h>
#endif /* WL_CFGVENDOR_SEND_HANG_EVENT */
#ifdef DHD_ERPOM
#include <pom.h>
#ifdef PCIE_OOB
/*
* Both ERPOM and PCIE_OOB depend on ftdi to programme GPIOs.
* Both features operating parallelly make the GPIOs go outof sync.
* So only one feature is expected to be present at a time.
*/
#error "PCIE_OOB enabled"
#endif /* PCIE_OOB */
#endif /* DHD_ERPOM */
#include <dngl_stats.h>
#include <hnd_pktq.h>
#include <dhd_logger.h>
#ifdef DEBUG_DPC_THREAD_WATCHDOG
#define MAX_RESCHED_CNT 600
#endif /* DEBUG_DPC_THREAD_WATCHDOG */
#if defined(__linux__)
#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0) && LINUX_VERSION_CODE < \
KERNEL_VERSION(3, 18, 0) || defined(CONFIG_BCMDHD_VENDOR_EXT))
#define WL_VENDOR_EXT_SUPPORT
#endif /* 3.18 > KERNEL_VER >= 3.14 || defined(CONFIG_BCMDHD_VENDOR_EXT) */
#endif /* defined(__linux__) */
#if defined(KEEP_ALIVE)
/* Default KEEP_ALIVE Period is 55 sec to prevent AP from sending Keep Alive probe frame */
#define KEEP_ALIVE_PERIOD 55000
#define NULL_PKT_STR "null_pkt"
#endif /* KEEP_ALIVE */
/* By default enabled from here, later the WQ code will be removed */
#define DHD_USE_KTHREAD_FOR_LOGTRACE
/* Forward decls */
struct dhd_bus;
struct dhd_prot;
struct dhd_info;
struct dhd_ioctl;
struct dhd_dbg;
struct dhd_ts;
#ifdef DNGL_AXI_ERROR_LOGGING
struct dhd_axi_error_dump;
#endif /* DNGL_AXI_ERROR_LOGGING */
/* module param */
extern int dhd_logger;
/* The level of bus communication with the dongle */
enum dhd_bus_state {
DHD_BUS_DOWN, /* Not ready for frame transfers */
DHD_BUS_LOAD, /* Download access only (CPU reset) */
DHD_BUS_DATA, /* Ready for frame transfers */
DHD_BUS_SUSPEND, /* Bus has been suspended */
DHD_BUS_DOWN_IN_PROGRESS, /* Bus going Down */
};
/* The level of bus communication with the dongle */
enum dhd_bus_devreset_type {
DHD_BUS_DEVRESET_ON = 0, /* ON */
DHD_BUS_DEVRESET_OFF = 1, /* OFF */
DHD_BUS_DEVRESET_FLR = 2, /* FLR */
DHD_BUS_DEVRESET_FLR_FORCE_FAIL = 3, /* FLR FORCE FAIL */
DHD_BUS_DEVRESET_QUIESCE = 4, /* FLR */
};
/*
* Bit fields to Indicate clean up process that wait till they are finished.
* Future synchronizable processes can add their bit filed below and update
* their functionalities accordingly
*/
#define DHD_BUS_BUSY_IN_TX 0x01
#define DHD_BUS_BUSY_IN_SEND_PKT 0x02
#define DHD_BUS_BUSY_IN_DPC 0x04
#define DHD_BUS_BUSY_IN_WD 0x08
#define DHD_BUS_BUSY_IN_IOVAR 0x10
#define DHD_BUS_BUSY_IN_DHD_IOVAR 0x20
#define DHD_BUS_BUSY_SUSPEND_IN_PROGRESS 0x40
#define DHD_BUS_BUSY_RESUME_IN_PROGRESS 0x80
#define DHD_BUS_BUSY_RPM_SUSPEND_IN_PROGRESS 0x100
#define DHD_BUS_BUSY_RPM_SUSPEND_DONE 0x200
#define DHD_BUS_BUSY_RPM_RESUME_IN_PROGRESS 0x400
#define DHD_BUS_BUSY_RPM_ALL (DHD_BUS_BUSY_RPM_SUSPEND_DONE | \
DHD_BUS_BUSY_RPM_SUSPEND_IN_PROGRESS | \
DHD_BUS_BUSY_RPM_RESUME_IN_PROGRESS)
#define DHD_BUS_BUSY_IN_CHECKDIED 0x800
#define DHD_BUS_BUSY_IN_MEMDUMP 0x1000
#define DHD_BUS_BUSY_IN_SSSRDUMP 0x2000
#define DHD_BUS_BUSY_IN_LOGDUMP 0x4000
#define DHD_BUS_BUSY_IN_HALDUMP 0x8000
#define DHD_BUS_BUSY_IN_NAPI 0x10000
#define DHD_BUS_BUSY_IN_DS_DEASSERT 0x20000
#define DHD_BUS_BUSY_IN_DUMP_DONGLE_MEM 0x40000
#define DHD_BUS_BUSY_IN_SYSFS_DUMP 0x80000
#define DHD_BUS_BUSY_IN_PM_CALLBACK 0x100000
#define DHD_BUS_BUSY_IN_BT_FW_DWNLD 0x200000
#define DHD_BUS_BUSY_IN_SSSR 0x400000
#define DHD_BUS_BUSY_SET_IN_TX(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_TX
#define DHD_BUS_BUSY_SET_IN_SEND_PKT(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_SEND_PKT
#define DHD_BUS_BUSY_SET_IN_DPC(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DPC
#define DHD_BUS_BUSY_SET_IN_WD(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_WD
#define DHD_BUS_BUSY_SET_IN_IOVAR(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_IOVAR
#define DHD_BUS_BUSY_SET_IN_DHD_IOVAR(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DHD_IOVAR
#define DHD_BUS_BUSY_SET_SUSPEND_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_SUSPEND_IN_PROGRESS
#define DHD_BUS_BUSY_SET_RESUME_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_RESUME_IN_PROGRESS
#define DHD_BUS_BUSY_SET_RPM_SUSPEND_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_RPM_SUSPEND_IN_PROGRESS
#define DHD_BUS_BUSY_SET_RPM_SUSPEND_DONE(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_RPM_SUSPEND_DONE
#define DHD_BUS_BUSY_SET_RPM_RESUME_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_RPM_RESUME_IN_PROGRESS
#define DHD_BUS_BUSY_SET_IN_CHECKDIED(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_CHECKDIED
#define DHD_BUS_BUSY_SET_IN_MEMDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_MEMDUMP
#define DHD_BUS_BUSY_SET_IN_SSSRDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_SSSRDUMP
#define DHD_BUS_BUSY_SET_IN_LOGDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_LOGDUMP
#define DHD_BUS_BUSY_SET_IN_HALDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_HALDUMP
#define DHD_BUS_BUSY_SET_IN_NAPI(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_NAPI
#define DHD_BUS_BUSY_SET_IN_DS_DEASSERT(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DS_DEASSERT
#define DHD_BUS_BUSY_SET_IN_DUMP_DONGLE_MEM(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_DUMP_DONGLE_MEM
#define DHD_BUS_BUSY_SET_IN_SYSFS_DUMP(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_SYSFS_DUMP
#define DHD_BUS_BUSY_SET_IN_PM_CALLBACK(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_PM_CALLBACK
#define DHD_BUS_BUSY_SET_IN_BT_FW_DWNLD(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_BT_FW_DWNLD
#define DHD_BUS_BUSY_SET_IN_SSSR(dhdp) \
(dhdp)->dhd_bus_busy_state |= DHD_BUS_BUSY_IN_SSSR
#define DHD_BUS_BUSY_CLEAR_IN_TX(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_TX
#define DHD_BUS_BUSY_CLEAR_IN_SEND_PKT(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_SEND_PKT
#define DHD_BUS_BUSY_CLEAR_IN_DPC(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_DPC
#define DHD_BUS_BUSY_CLEAR_IN_WD(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_WD
#define DHD_BUS_BUSY_CLEAR_IN_IOVAR(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_IOVAR
#define DHD_BUS_BUSY_CLEAR_IN_DHD_IOVAR(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_DHD_IOVAR
#define DHD_BUS_BUSY_CLEAR_SUSPEND_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_SUSPEND_IN_PROGRESS
#define DHD_BUS_BUSY_CLEAR_RESUME_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_RESUME_IN_PROGRESS
#define DHD_BUS_BUSY_CLEAR_RPM_SUSPEND_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_RPM_SUSPEND_IN_PROGRESS
#define DHD_BUS_BUSY_CLEAR_RPM_SUSPEND_DONE(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_RPM_SUSPEND_DONE
#define DHD_BUS_BUSY_CLEAR_RPM_RESUME_IN_PROGRESS(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_RPM_RESUME_IN_PROGRESS
#define DHD_BUS_BUSY_CLEAR_IN_CHECKDIED(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_CHECKDIED
#define DHD_BUS_BUSY_CLEAR_IN_MEMDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_MEMDUMP
#define DHD_BUS_BUSY_CLEAR_IN_SSSRDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_SSSRDUMP
#define DHD_BUS_BUSY_CLEAR_IN_LOGDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_LOGDUMP
#define DHD_BUS_BUSY_CLEAR_IN_HALDUMP(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_HALDUMP
#define DHD_BUS_BUSY_CLEAR_IN_NAPI(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_NAPI
#define DHD_BUS_BUSY_CLEAR_IN_DS_DEASSERT(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_DS_DEASSERT
#define DHD_BUS_BUSY_CLEAR_IN_DUMP_DONGLE_MEM(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_DUMP_DONGLE_MEM
#define DHD_BUS_BUSY_CLEAR_IN_SYSFS_DUMP(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_SYSFS_DUMP
#define DHD_BUS_BUSY_CLEAR_IN_PM_CALLBACK(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_PM_CALLBACK
#define DHD_BUS_BUSY_CLEAR_IN_BT_FW_DWNLD(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_BT_FW_DWNLD
#define DHD_BUS_BUSY_CLEAR_IN_SSSR(dhdp) \
(dhdp)->dhd_bus_busy_state &= ~DHD_BUS_BUSY_IN_SSSR
#define DHD_BUS_BUSY_CHECK_IN_TX(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_TX)
#define DHD_BUS_BUSY_CHECK_IN_SEND_PKT(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_SEND_PKT)
#define DHD_BUS_BUSY_CHECK_IN_DPC(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_DPC)
#define DHD_BUS_BUSY_CHECK_IN_WD(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_WD)
#define DHD_BUS_BUSY_CHECK_IN_IOVAR(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_IOVAR)
#define DHD_BUS_BUSY_CHECK_IN_DHD_IOVAR(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_DHD_IOVAR)
#define DHD_BUS_BUSY_CHECK_SUSPEND_IN_PROGRESS(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_SUSPEND_IN_PROGRESS)
#define DHD_BUS_BUSY_CHECK_RESUME_IN_PROGRESS(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_RESUME_IN_PROGRESS)
#define DHD_BUS_BUSY_CHECK_RPM_SUSPEND_IN_PROGRESS(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_RPM_SUSPEND_IN_PROGRESS)
#define DHD_BUS_BUSY_CHECK_RPM_SUSPEND_DONE(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_RPM_SUSPEND_DONE)
#define DHD_BUS_BUSY_CHECK_RPM_RESUME_IN_PROGRESS(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_RPM_RESUME_IN_PROGRESS)
#define DHD_BUS_BUSY_CHECK_RPM_ALL(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_RPM_ALL)
#define DHD_BUS_BUSY_CHECK_IN_CHECKDIED(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_CHECKDIED)
#define DHD_BUS_BUSY_CHECK_IN_MEMDUMP(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_MEMDUMP)
#define DHD_BUS_BUSY_CHECK_IN_SSSRDUMP(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_SSSRDUMP)
#define DHD_BUS_BUSY_CHECK_IN_LOGDUMP(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_LOGDUMP)
#define DHD_BUS_BUSY_CHECK_IN_HALDUMP(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_HALDUMP)
#define DHD_BUS_BUSY_CHECK_IN_DS_DEASSERT(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_DS_DEASSERT)
#define DHD_BUS_BUSY_CHECK_IN_DUMP_DONGLE_MEM(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_DUMP_DONGLE_MEM)
#define DHD_BUS_BUSY_CHECK_IN_SYSFS_DUMP(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_SYSFS_DUMP)
#define DHD_BUS_BUSY_CHECK_IN_SSSR(dhdp) \
((dhdp)->dhd_bus_busy_state & DHD_BUS_BUSY_IN_SSSR)
#define DHD_BUS_BUSY_CHECK_IDLE(dhdp) \
((dhdp)->dhd_bus_busy_state == 0)
#define DHD_BUS_CHECK_SUSPEND_OR_SUSPEND_IN_PROGRESS(dhdp) \
((dhdp)->busstate == DHD_BUS_SUSPEND || DHD_BUS_BUSY_CHECK_SUSPEND_IN_PROGRESS(dhdp))
#define DHD_BUS_CHECK_ANY_SUSPEND_IN_PROGRESS(dhdp) \
(DHD_BUS_BUSY_CHECK_SUSPEND_IN_PROGRESS(dhdp) || \
DHD_BUS_BUSY_CHECK_RPM_SUSPEND_IN_PROGRESS(dhdp))
#define DHD_BUS_CHECK_SUSPEND_OR_ANY_SUSPEND_IN_PROGRESS(dhdp) \
((dhdp)->busstate == DHD_BUS_SUSPEND || DHD_BUS_CHECK_ANY_SUSPEND_IN_PROGRESS(dhdp))
#define DHD_BUS_CHECK_DOWN_OR_DOWN_IN_PROGRESS(dhdp) \
((dhdp)->busstate == DHD_BUS_DOWN || (dhdp)->busstate == DHD_BUS_DOWN_IN_PROGRESS)
/* IOVar flags for common error checks */
#define DHD_IOVF_PWRREQ_BYPASS (1<<0) /* flags to prevent bp access during host sleep state */
#define MAX_MTU_SZ (1600u)
#ifdef PCIE_INB_DW
#define DHD_CHECK_CFG_IN_PROGRESS(dhdp) \
((INBAND_DW_ENAB((dhdp)->bus)) ? dhd_check_cfg_in_progress(dhdp) : FALSE)
#else
#define DHD_CHECK_CFG_IN_PROGRESS(dhdp) FALSE
#endif /* PCIE_INB_DW */
#ifndef USEC_PER_SEC
#define USEC_PER_SEC (1000 * 1000)
#endif
#ifndef MSEC_PER_SEC
#define MSEC_PER_SEC 1000u
#endif
#if defined(__linux__)
/* (u64)result = (u64)dividend / (u64)divisor */
#define DIV_U64_BY_U64(dividend, divisor) div64_u64(dividend, divisor)
/* (u64)result = (u64)dividend / (u32)divisor */
#define DIV_U64_BY_U32(dividend, divisor) div_u64(dividend, divisor)
/* Be careful while using this, as it divides dividend also
* (u32)remainder = (u64)dividend % (u32)divisor
* (u64)dividend = (u64)dividend / (u32)divisor
*/
#define DIV_AND_MOD_U64_BY_U32(dividend, divisor) do_div(dividend, divisor)
/* (u32)remainder = (u64)dividend % (u32)divisor */
#define MOD_U64_BY_U32(dividend, divisor) ({ \
uint64 temp_dividend = (dividend); \
uint32 rem = DIV_AND_MOD_U64_BY_U32(temp_dividend, (divisor)); \
rem; \
})
#define SEC_USEC_FMT \
"%5llu.%06u"
#else
/* (u64)result = (u64)dividend / (u64)divisor */
#define DIV_U64_BY_U64(dividend, divisor) (uint64)(dividend) / (uint64)(divisor)
/* (u64)result = (u64)dividend / (u32)divisor */
#define DIV_U64_BY_U32(dividend, divisor) (uint64)(dividend) / (uint32)(divisor)
/* Be careful while using this, as it divides dividend also
* (u32)remainder = (u64)dividend % (u32)divisor
* (u64)dividend = (u64)dividend / (u32)divisor
*/
#define DIV_AND_MOD_U64_BY_U32(dividend, divisor) ({ \
uint32 rem = (uint64)(dividend) % (uint32)(divisor); \
(dividend) = (uint64)(dividend) / (uint32)(divisor); \
rem; \
})
/* (u32)remainder = (u64)dividend % (u32)divisor */
#define MOD_U64_BY_U32(dividend, divisor) (uint32)((uint64)(dividend) % (uint32)(divisor))
#define SEC_USEC_FMT \
"%015llu.%06u"
#endif /* __linux__ */
/* t: time in nano second */
#define GET_SEC_USEC(t) \
DIV_U64_BY_U32(t, NSEC_PER_SEC), \
((uint32)(MOD_U64_BY_U32(t, NSEC_PER_SEC) / (uint32)NSEC_PER_USEC))
/* Download Types */
typedef enum download_type {
FW,
NVRAM,
CLM_BLOB,
TXCAP_BLOB
} download_type_t;
#if defined(NDIS)
/* Firmware requested operation mode */
#define STA_MASK 0x0001
#define HOSTAPD_MASK 0x0002
#define WFD_MASK 0x0004
#define SOFTAP_FW_MASK 0x0008
#define P2P_GO_ENABLED 0x0010
#define P2P_GC_ENABLED 0x0020
#define CONCURENT_MASK 0x00F0
#endif /* #if defined(NDIS) */
/* For supporting multiple interfaces */
#define DHD_MAX_IFS 16
#define DHD_MAX_STATIC_IFS 1
#define DHD_DEL_IF -0xE
#define DHD_BAD_IF -0xF
#define DHD_DUMMY_INFO_IF 0xDEAF /* Hack i/f to handle events from INFO Ring */
/* to avoid build error for NDIS for timebeing */
#define DHD_EVENT_IF DHD_DUMMY_INFO_IF
#if defined(__linux__)
enum dhd_op_flags {
/* Firmware requested operation mode */
DHD_FLAG_STA_MODE = (1 << (0)), /* STA only */
DHD_FLAG_HOSTAP_MODE = (1 << (1)), /* SOFTAP only */
DHD_FLAG_P2P_MODE = (1 << (2)), /* P2P Only */
/* STA + P2P */
DHD_FLAG_CONCURR_SINGLE_CHAN_MODE = (DHD_FLAG_STA_MODE | DHD_FLAG_P2P_MODE),
/* STA + SoftAP */
DHD_FLAG_CONCURR_STA_HOSTAP_MODE = (DHD_FLAG_STA_MODE | DHD_FLAG_HOSTAP_MODE),
/* MULTI_CHAN mode is meaningful only if it is conccurncy mode */
DHD_FLAG_CONCURR_MULTI_CHAN_MODE = (1 << (4)), /* STA + P2P */
/* Current P2P mode for P2P connection */
DHD_FLAG_P2P_GC_MODE = (1 << (5)),
DHD_FLAG_P2P_GO_MODE = (1 << (6)),
DHD_FLAG_MBSS_MODE = (1 << (7)), /* MBSS in future */
DHD_FLAG_IBSS_MODE = (1 << (8)),
DHD_FLAG_MFG_MODE = (1 << (9)),
DHD_FLAG_RSDB_MODE = (1 << (10)),
DHD_FLAG_MP2P_MODE = (1 << (11))
};
#endif /* defined(__linux__) */
#define DHD_OPMODE_SUPPORTED(dhd, opmode_flag) \
(dhd ? ((((dhd_pub_t *)dhd)->op_mode) & opmode_flag) : -1)
#define DHD_OPMODE_STA_SOFTAP_CONCURR(dhd) \
(dhd ? (((((dhd_pub_t *)dhd)->op_mode) & DHD_FLAG_CONCURR_STA_HOSTAP_MODE) == \
DHD_FLAG_CONCURR_STA_HOSTAP_MODE) : 0)
/* Max sequential TX/RX Control timeouts to set HANG event */
#ifndef MAX_CNTL_TX_TIMEOUT
#define MAX_CNTL_TX_TIMEOUT 2
#endif /* MAX_CNTL_TX_TIMEOUT */
#ifndef MAX_CNTL_RX_TIMEOUT
#define MAX_CNTL_RX_TIMEOUT 1
#endif /* MAX_CNTL_RX_TIMEOUT */
#define DHD_SCAN_ASSOC_ACTIVE_TIME 40 /* ms: Embedded default Active setting from DHD */
#ifndef CUSTOM_SCAN_UNASSOC_ACTIVE_TIME
#define DHD_SCAN_UNASSOC_ACTIVE_TIME 80 /* ms: Embedded def. Unassoc Active setting from DHD */
#else
#define DHD_SCAN_UNASSOC_ACTIVE_TIME CUSTOM_SCAN_UNASSOC_ACTIVE_TIME
#endif /* CUSTOM_SCAN_UNASSOC_ACTIVE_TIME */
#define DHD_SCAN_HOME_TIME 45 /* ms: Embedded default Home time setting from DHD */
#ifndef CUSTOM_SCAN_HOME_AWAY_TIME
#define DHD_SCAN_HOME_AWAY_TIME 100 /* ms: Embedded default Home Away time setting from DHD */
#else
#define DHD_SCAN_HOME_AWAY_TIME CUSTOM_SCAN_HOME_AWAY_TIME /* ms: Custom setting from DHD */
#endif /* CUSTOM_SCAN_HOME_AWAY_TIME */
#ifndef CUSTOM_SCAN_PASSIVE_TIME
#define DHD_SCAN_PASSIVE_TIME 130 /* ms: Embedded default Passive setting from DHD */
#else
#define DHD_SCAN_PASSIVE_TIME CUSTOM_SCAN_PASSIVE_TIME /* ms: Custom Passive setting from DHD */
#endif /* CUSTOM_SCAN_PASSIVE_TIME */
#ifndef POWERUP_MAX_RETRY
#define POWERUP_MAX_RETRY 3 /* how many times we retry to power up the chip */
#endif
#ifndef POWERUP_WAIT_MS
#define POWERUP_WAIT_MS 2000 /* ms: time out in waiting wifi to come up */
#endif
/*
* MAX_NVRAMBUF_SIZE determines the size of the Buffer in the DHD that holds
* the NVRAM data. That is the size of the buffer pointed by bus->vars
* This also needs to be increased if NVRAM files size increases
*/
#define MAX_NVRAMBUF_SIZE (48 * 1024) /* max nvram buf size */
#define MAX_CLM_BUF_SIZE (64 * 1024) /* max clm blob size */
#define MAX_TXCAP_BUF_SIZE (16 * 1024) /* max txcap blob size */
#ifdef DHD_DEBUG
#define DHD_JOIN_MAX_TIME_DEFAULT 10000 /* ms: Max time out for joining AP */
#define DHD_SCAN_DEF_TIMEOUT 10000 /* ms: Max time out for scan in progress */
#endif /* DHD_DEBUG */
/* Enable Flow ring pre-memory allocation by default */
#define FLOW_RING_PREALLOC
#ifndef CONFIG_BCMDHD_CLM_PATH
#ifdef OEM_ANDROID
#if defined(CUSTOMER_HW4) && defined(PLATFORM_SLP)
#define CONFIG_BCMDHD_CLM_PATH "/lib/firmware/bcmdhd_clm.blob"
#else
#define CONFIG_BCMDHD_CLM_PATH "/etc/wifi/bcmdhd_clm.blob"
#endif /* CUSTOMER_HW4 && PLATFORM_SLP */
#elif defined(__linux__)
#define CONFIG_BCMDHD_CLM_PATH "/var/run/bcmdhd_clm.blob"
#else
/* clm download will fail on empty path */
#define CONFIG_BCMDHD_CLM_PATH ""
#endif /* OEM_ANDROID */
#endif /* CONFIG_BCMDHD_CLM_PATH */
#ifndef CONFIG_BCMDHD_TXCAP_PATH
#define CONFIG_BCMDHD_TXCAP_PATH "/etc/wifi/bcmdhd_txcap.blob"
#endif /* CONFIG_BCMDHD_TXCAP_PATH */
#define WL_CCODE_NULL_COUNTRY "#n"
#ifndef DHD_FW_NAME
#define DHD_FW_NAME "fw_bcmdhd.bin"
#endif
#ifndef DHD_NVRAM_NAME
#define DHD_NVRAM_NAME "bcmdhd.cal"
#endif
#ifndef DHD_CLM_NAME
#define DHD_CLM_NAME "bcmdhd_clm.blob"
#endif
#ifndef DHD_MAP_NAME
#define DHD_MAP_NAME "fw_bcmdhd.map"
#endif
#ifndef DHD_TXCAP_NAME
#define DHD_TXCAP_NAME "bcmdhd_txcap.blob"
#endif
#ifdef DHD_EFI
#define FW_VER_STR_LEN 256
#else
#define FW_VER_STR_LEN 128
#endif
#define FWID_STR_LEN 256
#define CLM_VER_STR_LEN 128
#define BUS_API_REV_STR_LEN 128
#define FW_VER_STR "Version"
#define FWID_STR_1 "FWID: 01-"
#define FWID_STR_2 "FWID=01-"
extern char bus_api_revision[];
enum dhd_bus_wake_state {
WAKE_LOCK_OFF = 0,
WAKE_LOCK_PRIV = 1,
WAKE_LOCK_DPC = 2,
WAKE_LOCK_IOCTL = 3,
WAKE_LOCK_DOWNLOAD = 4,
WAKE_LOCK_TMOUT = 5,
WAKE_LOCK_WATCHDOG = 6,
WAKE_LOCK_LINK_DOWN_TMOUT = 7,
WAKE_LOCK_PNO_FIND_TMOUT = 8,
WAKE_LOCK_SOFTAP_SET = 9,
WAKE_LOCK_SOFTAP_STOP = 10,
WAKE_LOCK_SOFTAP_START = 11,
WAKE_LOCK_SOFTAP_THREAD = 12
};
enum {
EVENT_BUF_POOL_LOW = 32,
EVENT_BUF_POOL_MEDIUM = 64,
EVENT_BUF_POOL_HIGH = 128,
EVENT_BUF_POOL_HIGHEST = 256
};
#ifdef PCIE_INB_DW
enum dhd_bus_ds_state {
DW_DEVICE_DS_INVALID = -1,
DW_DEVICE_DS_DEV_SLEEP = 0,
DW_DEVICE_DS_DEV_SLEEP_PEND = 1,
DW_DEVICE_DS_DISABLED_WAIT = 2,
DW_DEVICE_DS_DEV_WAKE = 3,
DW_DEVICE_DS_ACTIVE = 4,
DW_DEVICE_HOST_SLEEP_WAIT = 5,
DW_DEVICE_HOST_SLEEP = 6,
DW_DEVICE_HOST_WAKE_WAIT = 7,
DW_DEVICE_DS_D3_INFORM_WAIT = 8
};
#endif /* PCIE_INB_DW */
enum dhd_prealloc_index {
DHD_PREALLOC_PROT = 0,
DHD_PREALLOC_RXBUF = 1,
DHD_PREALLOC_DATABUF = 2,
DHD_PREALLOC_OSL_BUF = 3,
/* 4 */
DHD_PREALLOC_WIPHY_ESCAN0 = 5,
DHD_PREALLOC_WIPHY_ESCAN1 = 6,
DHD_PREALLOC_DHD_INFO = 7,
DHD_PREALLOC_DHD_WLFC_INFO = 8,
DHD_PREALLOC_IF_FLOW_LKUP = 9,
/* 10 */
DHD_PREALLOC_MEMDUMP_RAM = 11,
DHD_PREALLOC_DHD_WLFC_HANGER = 12,
DHD_PREALLOC_PKTID_MAP = 13, /* Deprecated */
DHD_PREALLOC_PKTID_MAP_IOCTL = 14, /* Deprecated */
DHD_PREALLOC_DHD_LOG_DUMP_BUF = 15,
DHD_PREALLOC_DHD_LOG_DUMP_BUF_EX = 16,
DHD_PREALLOC_DHD_PKTLOG_DUMP_BUF = 17 /* Deprecated */
};
enum dhd_dongledump_mode {
DUMP_DISABLED = 0,
DUMP_MEMONLY = 1,
DUMP_MEMFILE = 2,
DUMP_MEMFILE_BUGON = 3,
DUMP_MEMFILE_MAX = 4
};
#if defined(DHD_FILE_DUMP_EVENT) && defined(DHD_FW_COREDUMP)
typedef enum dhd_dongledump_status {
DUMP_READY = 0,
DUMP_IN_PROGRESS = 1,
DUMP_FAILURE = 2,
DUMP_NOT_READY = 3
} dhd_dongledump_status_t;
#endif /* DHD_FILE_DUMP_EVENT && DHD_FW_COREDUMP */
enum dhd_dongledump_type {
DUMP_TYPE_RESUMED_ON_TIMEOUT = 1,
DUMP_TYPE_D3_ACK_TIMEOUT = 2,
DUMP_TYPE_DONGLE_TRAP = 3,
DUMP_TYPE_MEMORY_CORRUPTION = 4,
DUMP_TYPE_PKTID_AUDIT_FAILURE = 5,
DUMP_TYPE_PKTID_INVALID = 6,
DUMP_TYPE_SCAN_TIMEOUT = 7,
DUMP_TYPE_SCAN_BUSY = 8,
DUMP_TYPE_BY_SYSDUMP = 9,
DUMP_TYPE_BY_LIVELOCK = 10,
DUMP_TYPE_AP_LINKUP_FAILURE = 11,
DUMP_TYPE_AP_ABNORMAL_ACCESS = 12,
DUMP_TYPE_CFG_VENDOR_TRIGGERED = 13,
DUMP_TYPE_RESUMED_ON_TIMEOUT_TX = 14,
DUMP_TYPE_RESUMED_ON_TIMEOUT_RX = 15,
DUMP_TYPE_RESUMED_ON_INVALID_RING_RDWR = 16,
DUMP_TYPE_TRANS_ID_MISMATCH = 17,
DUMP_TYPE_IFACE_OP_FAILURE = 18,
DUMP_TYPE_DONGLE_INIT_FAILURE = 19,
DUMP_TYPE_READ_SHM_FAIL = 20,
DUMP_TYPE_DONGLE_HOST_EVENT = 21,
DUMP_TYPE_SMMU_FAULT = 22,
DUMP_TYPE_RESUMED_UNKNOWN = 23,
DUMP_TYPE_DUE_TO_BT = 24,
DUMP_TYPE_LOGSET_BEYOND_RANGE = 25,
DUMP_TYPE_BY_USER = 26,
DUMP_TYPE_CTO_RECOVERY = 27,
DUMP_TYPE_SEQUENTIAL_PRIVCMD_ERROR = 28,
DUMP_TYPE_PROXD_TIMEOUT = 29,
DUMP_TYPE_INBAND_DEVICE_WAKE_FAILURE = 30,
DUMP_TYPE_PKTID_POOL_DEPLETED = 31,
DUMP_TYPE_INVALID_SHINFO_NRFRAGS = 32,
DUMP_TYPE_P2P_DISC_BUSY = 33,
DUMP_TYPE_CONT_EXCESS_PM_AWAKE = 34,
DUMP_TYPE_NO_DB7_ACK = 35,
DUMP_TYPE_DONGLE_TRAP_DURING_WIFI_ONOFF = 36,
DUMP_TYPE_ESCAN_SYNCID_MISMATCH = 37,
DUMP_TYPE_COREDUMP_BY_USER = 38
};
enum dhd_hang_reason {
HANG_REASON_MASK = 0x8000,
HANG_REASON_IOCTL_RESP_TIMEOUT = 0x8001,
HANG_REASON_DONGLE_TRAP = 0x8002,
HANG_REASON_D3_ACK_TIMEOUT = 0x8003,
HANG_REASON_BUS_DOWN = 0x8004,
HANG_REASON_MSGBUF_LIVELOCK = 0x8006,
HANG_REASON_IFACE_DEL_FAILURE = 0x8007,
HANG_REASON_HT_AVAIL_ERROR = 0x8008,
HANG_REASON_PCIE_RC_LINK_UP_FAIL = 0x8009,
HANG_REASON_PCIE_PKTID_ERROR = 0x800A,
HANG_REASON_IFACE_ADD_FAILURE = 0x800B,
HANG_REASON_IOCTL_RESP_TIMEOUT_SCHED_ERROR = 0x800C,
HANG_REASON_D3_ACK_TIMEOUT_SCHED_ERROR = 0x800D,
HANG_REASON_SEQUENTIAL_PRIVCMD_ERROR = 0x800E,
HANG_REASON_SCAN_BUSY = 0x800F,
HANG_REASON_BSS_UP_FAILURE = 0x8010,
HANG_REASON_BSS_DOWN_FAILURE = 0x8011,
HANG_REASON_IOCTL_SUSPEND_ERROR = 0x8012,
HANG_REASON_ESCAN_SYNCID_MISMATCH = 0x8013,
HANG_REASON_SCAN_TIMEOUT = 0x8014,
HANG_REASON_SCAN_TIMEOUT_SCHED_ERROR = 0x8015,
HANG_REASON_P2P_DISC_BUSY = 0x8016,
HANG_REASON_PCIE_LINK_DOWN_RC_DETECT = 0x8805,
HANG_REASON_INVALID_EVENT_OR_DATA = 0x8806,
HANG_REASON_UNKNOWN = 0x8807,
HANG_REASON_PCIE_LINK_DOWN_EP_DETECT = 0x8808,
HANG_REASON_PCIE_CTO_DETECT = 0x8809,
HANG_REASON_SLEEP_FAILURE = 0x880A,
HANG_REASON_DS_SKIP_TIMEOUT = 0x880B,
HANG_REASON_MAX = 0x880C
};
#define WLC_E_DEAUTH_MAX_REASON 0x0FFF
enum dhd_rsdb_scan_features {
/* Downgraded scan feature for AP active */
RSDB_SCAN_DOWNGRADED_AP_SCAN = 0x01,
/* Downgraded scan feature for P2P Discovery */
RSDB_SCAN_DOWNGRADED_P2P_DISC_SCAN = 0x02,
/* Enable channel pruning for ROAM SCAN */
RSDB_SCAN_DOWNGRADED_CH_PRUNE_ROAM = 0x10,
/* Enable channel pruning for any SCAN */
RSDB_SCAN_DOWNGRADED_CH_PRUNE_ALL = 0x20
};
#define VENDOR_SEND_HANG_EXT_INFO_LEN (800 + 1)
#ifdef DHD_EWPR_VER2
#define VENDOR_SEND_HANG_EXT_INFO_VER 20181111
#else
#define VENDOR_SEND_HANG_EXT_INFO_VER 20170905
#endif /* DHD_EWPR_VER2 */
#define HANG_INFO_TRAP_T_NAME_MAX 6
#define HANG_INFO_TRAP_T_REASON_IDX 0
#define HANG_INFO_TRAP_T_SUBTYPE_IDX 2
#define HANG_INFO_TRAP_T_OFFSET_IDX 3
#define HANG_INFO_TRAP_T_EPC_IDX 4
#define HANG_FIELD_STR_MAX_LEN 9
#define HANG_FIELD_CNT_MAX 69
#define HANG_FIELD_IF_FAILURE_CNT 10
#define HANG_FIELD_IOCTL_RESP_TIMEOUT_CNT 8
#define HANG_FIELD_TRAP_T_STACK_CNT_MAX 16
#define HANG_FIELD_MISMATCH_CNT 10
#define HANG_INFO_BIGDATA_KEY_STACK_CNT 4
#define DEBUG_DUMP_TIME_BUF_LEN (16 + 1)
/* delimiter between values */
#define HANG_KEY_DEL ' '
#define HANG_RAW_DEL '_'
#ifdef DHD_EWPR_VER2
#define HANG_INFO_BIGDATA_EXTRA_KEY 4
#define HANG_INFO_TRAP_T_EXTRA_KEY_IDX 5
#endif
/* Packet alignment for most efficient SDIO (can change based on platform) */
#ifndef DHD_SDALIGN
#define DHD_SDALIGN 32
#endif
#define DHD_TX_CONTEXT_MASK 0xff
#define DHD_TX_START_XMIT 0x01
#define DHD_TX_SEND_PKT 0x02
#define DHD_IF_SET_TX_ACTIVE(ifp, context) \
ifp->tx_paths_active |= context;
#define DHD_IF_CLR_TX_ACTIVE(ifp, context) \
ifp->tx_paths_active &= ~context;
#define DHD_IF_IS_TX_ACTIVE(ifp) \
(ifp->tx_paths_active)
/**
* DMA-able buffer parameters
* - dmaaddr_t is 32bits on a 32bit host.
* dhd_dma_buf::pa may not be used as a sh_addr_t, bcm_addr64_t or uintptr
* - dhd_dma_buf::_alloced is ONLY for freeing a DMA-able buffer.
*/
typedef struct dhd_dma_buf {
void *va; /* virtual address of buffer */
uint32 len; /* user requested buffer length */
dmaaddr_t pa; /* physical address of buffer */
void *dmah; /* dma mapper handle */
void *secdma; /* secure dma sec_cma_info handle */
uint32 _alloced; /* actual size of buffer allocated with align and pad */
} dhd_dma_buf_t;
/* host reordering packts logic */
/* followed the structure to hold the reorder buffers (void **p) */
typedef struct reorder_info {
void **p;
uint8 flow_id;
uint8 cur_idx;
uint8 exp_idx;
uint8 max_idx;
uint8 pend_pkts;
} reorder_info_t;
/* throughput test packet format */
typedef struct tput_pkt {
/* header */
uint8 mac_sta[ETHER_ADDR_LEN];
uint8 mac_ap[ETHER_ADDR_LEN];
uint16 pkt_type;
uint8 PAD[2];
/* data */
uint32 crc32;
uint32 pkt_id;
uint32 num_pkts;
} tput_pkt_t;
typedef enum {
TPUT_PKT_TYPE_NORMAL,
TPUT_PKT_TYPE_STOP
} tput_pkt_type_t;
#define TPUT_TEST_MAX_PAYLOAD 1500
#define TPUT_TEST_WAIT_TIMEOUT_DEFAULT 5000
#ifdef DHDTCPACK_SUPPRESS
enum {
/* TCPACK suppress off */
TCPACK_SUP_OFF,
/* Replace TCPACK in txq when new coming one has higher ACK number. */
TCPACK_SUP_REPLACE,
/* TCPACK_SUP_REPLACE + delayed TCPACK TX unless ACK to PSH DATA.
* This will give benefits to Half-Duplex bus interface(e.g. SDIO) that
* 1. we are able to read TCP DATA packets first from the bus
* 2. TCPACKs that don't need to hurry delivered remains longer in TXQ so can be suppressed.
*/
TCPACK_SUP_DELAYTX,
TCPACK_SUP_HOLD,
TCPACK_SUP_LAST_MODE
};
#endif /* DHDTCPACK_SUPPRESS */
#if defined(BCM_ROUTER_DHD)
#define DHD_DWM_TBL_SIZE 57
/* DSCP WMM AC Mapping macros and structures */
#define DHD_TRF_MGMT_DWM_FILTER_BIT 0x8
#define DHD_TRF_MGMT_DWM_PRIO_BITS 0x7
#define DHD_TRF_MGMT_DWM_FAVORED_BIT 0x10
#define DHD_TRF_MGMT_DWM_PRIO(dwm_tbl_entry) ((dwm_tbl_entry) & DHD_TRF_MGMT_DWM_PRIO_BITS)
#define DHD_TRF_MGMT_DWM_IS_FAVORED_SET(dwm_tbl_entry) \
((dwm_tbl_entry) & DHD_TRF_MGMT_DWM_FAVORED_BIT)
#define DHD_TRF_MGMT_DWM_SET_FAVORED(dwm_tbl_entry) \
((dwm_tbl_entry) |= DHD_TRF_MGMT_DWM_FAVORED_BIT)
#define DHD_TRF_MGMT_DWM_IS_FILTER_SET(dwm_tbl_entry) \
((dwm_tbl_entry) & DHD_TRF_MGMT_DWM_FILTER_BIT)
#define DHD_TRF_MGMT_DWM_SET_FILTER(dwm_tbl_entry) \
((dwm_tbl_entry) |= DHD_TRF_MGMT_DWM_FILTER_BIT)
typedef struct {
uint8 dhd_dwm_enabled;
uint8 dhd_dwm_tbl[DHD_DWM_TBL_SIZE];
} dhd_trf_mgmt_dwm_tbl_t;
#endif /* for BCM_ROUTER_DHD */
#define DHD_NULL_CHK_AND_RET(cond) \
if (!cond) { \
DHD_ERROR(("%s " #cond " is NULL\n", __FUNCTION__)); \
return; \
}
#define DHD_NULL_CHK_AND_RET_VAL(cond, value) \
if (!cond) { \
DHD_ERROR(("%s " #cond " is NULL\n", __FUNCTION__)); \
return value; \
}
#define DHD_NULL_CHK_AND_GOTO(cond, label) \
if (!cond) { \
DHD_ERROR(("%s " #cond " is NULL\n", __FUNCTION__)); \
goto label; \
}
/*
* Accumulating the queue lengths of all flowring queues in a parent object,
* to assert flow control, when the cummulative queue length crosses an upper
* threshold defined on a parent object. Upper threshold may be maintained
* at a station level, at an interface level, or at a dhd instance.
*
* cumm_ctr_t abstraction:
* cumm_ctr_t abstraction may be enhanced to use an object with a hysterisis
* pause on/off threshold callback.
* All macros use the address of the cummulative length in the parent objects.
*
* Cummulative counters in parent objects may be updated without spinlocks.
*
* If a cummulative queue length is desired across all flows
* belonging to either of (a station, or an interface or a dhd instance), then
* an atomic operation is required using an atomic_t cummulative counters or
* using a spinlock. BCM_ROUTER_DHD uses the Linux atomic_t construct.
*/
#if defined(BCM_ROUTER_DHD)
typedef atomic_t cumm_ctr_t; /* BCM_ROUTER_DHD Linux: atomic operations */
#define DHD_CUMM_CTR_PTR(clen) ((cumm_ctr_t*)(clen))
#define DHD_CUMM_CTR(clen) DHD_CUMM_CTR_PTR(clen) /* atomic accessor */
#define DHD_CUMM_CTR_READ(clen) atomic_read(DHD_CUMM_CTR(clen)) /* read */
#define DHD_CUMM_CTR_INIT(clen) \
ASSERT(DHD_CUMM_CTR_PTR(clen) != DHD_CUMM_CTR_PTR(NULL)); \
atomic_set(DHD_CUMM_CTR(clen), 0);
#define DHD_CUMM_CTR_INCR(clen) \
ASSERT(DHD_CUMM_CTR_PTR(clen) != DHD_CUMM_CTR_PTR(NULL)); \
atomic_add(1, DHD_CUMM_CTR(clen)); \
ASSERT(DHD_CUMM_CTR_READ(clen) != 0); /* ensure it does not wrap */
#define DHD_CUMM_CTR_DECR(clen) \
ASSERT(DHD_CUMM_CTR_PTR(clen) != DHD_CUMM_CTR_PTR(NULL)); \
ASSERT(DHD_CUMM_CTR_READ(clen) > 0); \
atomic_sub(1, DHD_CUMM_CTR(clen));
#else /* ! BCM_ROUTER_DHD */
/* Cummulative length not supported. */
typedef uint32 cumm_ctr_t;
#define DHD_CUMM_CTR_PTR(clen) ((cumm_ctr_t*)(clen))
#define DHD_CUMM_CTR(clen) *(DHD_CUMM_CTR_PTR(clen)) /* accessor */
#define DHD_CUMM_CTR_READ(clen) DHD_CUMM_CTR(clen) /* read access */
#define DHD_CUMM_CTR_INIT(clen) \
ASSERT(DHD_CUMM_CTR_PTR(clen) != DHD_CUMM_CTR_PTR(NULL));
#define DHD_CUMM_CTR_INCR(clen) \
ASSERT(DHD_CUMM_CTR_PTR(clen) != DHD_CUMM_CTR_PTR(NULL));
#define DHD_CUMM_CTR_DECR(clen) \
ASSERT(DHD_CUMM_CTR_PTR(clen) != DHD_CUMM_CTR_PTR(NULL));
#endif /* ! BCM_ROUTER_DHD */
#if defined(WLTDLS) && defined(PCIE_FULL_DONGLE)
struct tdls_peer_node {
uint8 addr[ETHER_ADDR_LEN];
struct tdls_peer_node *next;
};
typedef struct tdls_peer_node tdls_peer_node_t;
typedef struct {
tdls_peer_node_t *node;
uint8 tdls_peer_count;
} tdls_peer_tbl_t;
#endif /* defined(WLTDLS) && defined(PCIE_FULL_DONGLE) */
typedef enum dhd_ring_id {
DEBUG_RING_ID_INVALID = 0x1,
FW_VERBOSE_RING_ID = 0x2,
DHD_EVENT_RING_ID = 0x3,
DRIVER_LOG_RING_ID = 0x4,
ROAM_STATS_RING_ID = 0x5,
BT_LOG_RING_ID = 0x6,
PACKET_LOG_RING_ID = 0x7,
DEBUG_DUMP_RING1_ID = 0x8,
DEBUG_DUMP_RING2_ID = 0x9,
MEM_DUMP_RING_ID = 0xa,
DEBUG_RING_ID_MAX = 0xb
} dhd_ring_id_t;
#define DHD_PCIE_WRAPPER_LEN (20 * 1024)
#define HEALTH_CHK_BUF_SIZE 256
/* DEBUG_DUMP SUB COMMAND */
enum {
CMD_DEFAULT,
CMD_UNWANTED,
CMD_DISCONNECTED,
CMD_MAX
};
#define DHD_DUMP_SUBSTR_UNWANTED "_unwanted"
#define DHD_DUMP_SUBSTR_DISCONNECTED "_disconnected"
#ifdef DNGL_AXI_ERROR_LOGGING
#define DHD_DUMP_AXI_ERROR_FILENAME "axi_error"
#define DHD_DUMP_HAL_FILENAME_SUFFIX "_hal"
#endif /* DNGL_AXI_ERROR_LOGGING */
#define FW_LOGSET_MASK_ALL 0xFFFFu
#ifndef DHD_COMMON_DUMP_PATH
#if defined(CUSTOMER_HW4)
#define DHD_COMMON_DUMP_PATH "/data/log/wifi/"
#elif defined(CUSTOMER_HW2_DEBUG)
#define DHD_COMMON_DUMP_PATH PLATFORM_PATH
#elif defined(BOARD_HIKEY) || defined (BOARD_STB)
#ifndef DHD_COMMON_DUMP_PATH
#define DHD_COMMON_DUMP_PATH "/data/misc/wifi/"
#endif /* !DHD_COMMON_DUMP_PATH */
#elif defined(OEM_ANDROID) && defined(__ARM_ARCH_7A__)