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dhd_custom_cis.c
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/*
* Process CIS information from OTP for customer platform
* (Handle the MAC address and module information)
*
* Copyright (C) 2023, Broadcom.
*
* Unless you and Broadcom execute a separate written software license
* agreement governing use of this software, this software is licensed to you
* under the terms of the GNU General Public License version 2 (the "GPL"),
* available at http://www.broadcom.com/licenses/GPLv2.php, with the
* following added to such license:
*
* As a special exception, the copyright holders of this software give you
* permission to link this software with independent modules, and to copy and
* distribute the resulting executable under terms of your choice, provided that
* you also meet, for each linked independent module, the terms and conditions of
* the license of that module. An independent module is a module which is not
* derived from this software. The special exception does not apply to any
* modifications of the software.
*
*
* <<Broadcom-WL-IPTag/Dual:>>
*/
#include <typedefs.h>
#include <linuxver.h>
#include <osl.h>
#include <ethernet.h>
#include <dngl_stats.h>
#include <bcmutils.h>
#include <dhd.h>
#include <dhd_dbg.h>
#include <dhd_linux.h>
#include <bcmdevs.h>
#include <linux/fcntl.h>
#include <linux/fs.h>
#include <linux/list.h>
#include <bcmiov.h>
#ifdef DHD_USE_CISINFO_FROM_OTP
#include <bcmdevs_legacy.h> /* need to still support chips no longer in trunk firmware */
#include <siutils.h>
#include <pcie_core.h>
#include <dhd_pcie.h>
#endif /* DHD_USE_CISINFO_FROM_OTP */
#ifdef DHD_USE_CISINFO_FROM_OTP
typedef struct cis_tuple_addrs {
uint chipid;
uint32 start_addr;
uint32 end_addr;
} cis_tuple_addr_t;
cis_tuple_addr_t cis_tuple_addr_ranges[] = {
{0x4375, 0x18011120, 0x18011177},
{0x4389, 0x18011058, 0x180110AF},
{0x4398, 0x1801115C, 0x180111B3}
};
#define CIS_TUPLE_START_ADDR(chipidx) (cis_tuple_addr_ranges[(chipidx)].start_addr)
#define CIS_TUPLE_END_ADDR(chipidx) (cis_tuple_addr_ranges[(chipidx)].end_addr)
#define CIS_TUPLE_MAX_CNT(chipidx) \
(uint32)((CIS_TUPLE_END_ADDR(chipidx) - CIS_TUPLE_START_ADDR(chipidx)\
+ 1) / sizeof(uint32))
#define CIS_TUPLE_HDR_LEN 2
#if defined(BCM4375_CHIP)
#define CIS_TUPLE_START_ADDRESS 0x18011120
#define CIS_TUPLE_END_ADDRESS 0x18011177
#elif defined(BCM4389_CHIP_DEF) || defined(BCM4398_CHIP_DEF)
#define CIS_TUPLE_START_ADDRESS 0x18011058
#define CIS_TUPLE_END_ADDRESS 0x180110AF
#else
#define CIS_TUPLE_START_ADDRESS 0x18011110
#define CIS_TUPLE_END_ADDRESS 0x18011167
#endif /* defined(BCM4375_CHIP) */
#define CIS_TUPLE_MAX_COUNT (uint32)((CIS_TUPLE_END_ADDRESS - CIS_TUPLE_START_ADDRESS\
+ 1) / sizeof(uint32))
#define CIS_TUPLE_TAG_START 0x80
#define CIS_TUPLE_TAG_VENDOR 0x81
#define CIS_TUPLE_TAG_BOARDTYPE 0x1b
#define CIS_TUPLE_TAG_LENGTH 1
typedef struct cis_tuple_format {
uint8 id;
uint8 len; /* total length of tag and data */
uint8 tag;
uint8 data[1];
} cis_tuple_format_t;
#define MAX_REVS 10
#define MAX_REVSTRING 4
typedef struct chip_rev_table {
uint chip_id;
uint8 chip_revstr[MAX_REVS][MAX_REVSTRING];
} chip_rev_table_t;
chip_rev_table_t chip_revs[] = {
{0x4383, {"a0", "a1", "a3", "\0", "\0", "\0", "\0", "\0", "\0", "\0"}},
{0x4398, {"a0", "b0", "c0", "d0", "\0", "\0", "\0", "\0", "\0", "\0"}},
{0x4390, {"a0", "\0", "\0", "\0", "\0", "\0", "\0", "\0", "\0", "\0"}},
/* 4389 - not yet supported for now */
{0x4389, {"\0", "\0", "\0", "\0", "\0", "\0", "\0", "\0", "\0", "\0"}},
};
typedef struct {
uint8 vid_length;
unsigned char vid[MAX_VID_LEN];
char cid_info[MAX_VNAME_LEN];
} vid_info_t;
/* used to get nvram ext from VID, no separate naming table is required */
vid_info_t vid_naming_table_4389[] = {
/* 4389d0 - not yet supported for now */
{ 3, { 0x00, 0x00, }, { "_unsupported" } },
};
vid_info_t vid_naming_table_4398[] = {
/* 4398b0 refcards */
/* to be used only for unit testing on ref cards */
{ 3, { 0x32, 0x0a, }, { "_4398_refcard" } },
{ 3, { 0x44, 0x0a, }, { "_4398_refcard" } },
{ 3, { 0x33, 0x0a, }, { "_4398_refcard" } },
{ 3, { 0x51, 0x0a, }, { "_4398_refcard" } },
/* 4398b0 */
{ 3, { 0x50, 0x98, }, { "_USI_G5RN_9850_V10" } },
{ 3, { 0x51, 0x98, }, { "_USI_G5RN_9851_V11" } },
{ 3, { 0x50, 0x99, }, { "_USI_G5SN_9950_V10" } },
{ 3, { 0x51, 0x99, }, { "_USI_G5SN_9951_V11" } },
/* 4398c0 */
{ 3, { 0x50, 0x97, }, { "_USI_G5BB_9750_V10" } },
{ 3, { 0x51, 0x97, }, { "_USI_G5BB_9753_V11" } },
{ 3, { 0x53, 0x97, }, { "_USI_G5BB_9753_V13" } },
{ 3, { 0x53, 0x98, }, { "_USI_G5RN_9853_V13" } },
{ 3, { 0x53, 0x99, }, { "_USI_G5SN_9953_V13" } },
/* 4398d0 */
{ 3, { 0x55, 0x97, }, { "_USI_G5BB_9755_V15" } },
{ 3, { 0x55, 0x98, }, { "_USI_G5RN_9855_V15" } },
{ 3, { 0x55, 0x99, }, { "_USI_G5SN_9955_V15" } },
{ 3, { 0x57, 0x99, }, { "_USI_G5SN_9957_V17" } },
};
vid_info_t vid_naming_table_4390[] = {
/* 4390a0 */
{ 3, { 0x10, 0x63, }, { "_USI_G6BB_6310_V10" } },
{ 3, { 0x11, 0x63, }, { "_USI_G6BB_6311_V11" } },
{ 3, { 0x13, 0x63, }, { "_USI_G6BB_6313_V13" } },
};
#ifdef DHD_USE_CISINFO
#if defined(BCM4335_CHIP)
vid_info_t vid_info[] = {
{ 3, { 0x33, 0x66, }, { "semcosh" } }, /* B0 Sharp 5G-FEM */
{ 3, { 0x33, 0x33, }, { "semco" } }, /* B0 Skyworks 5G-FEM and A0 chip */
{ 3, { 0x33, 0x88, }, { "semco3rd" } }, /* B0 Syri 5G-FEM */
{ 3, { 0x00, 0x11, }, { "muratafem1" } }, /* B0 ANADIGICS 5G-FEM */
{ 3, { 0x00, 0x22, }, { "muratafem2" } }, /* B0 TriQuint 5G-FEM */
{ 3, { 0x00, 0x33, }, { "muratafem3" } }, /* 3rd FEM: Reserved */
{ 0, { 0x00, }, { "murata" } } /* Default: for Murata A0 module */
};
#elif defined(BCM4339_CHIP) || defined(BCM4354_CHIP) || \
defined(BCM4356_CHIP)
vid_info_t vid_info[] = { /* 4339:2G FEM+5G FEM ,4354: 2G FEM+5G FEM */
{ 3, { 0x33, 0x33, }, { "semco" } }, /* 4339:Skyworks+sharp,4354:Panasonic+Panasonic */
{ 3, { 0x33, 0x66, }, { "semco" } }, /* 4339: , 4354:Panasonic+SEMCO */
{ 3, { 0x33, 0x88, }, { "semco3rd" } }, /* 4339: , 4354:SEMCO+SEMCO */
{ 3, { 0x90, 0x01, }, { "wisol" } }, /* 4339: , 4354:Microsemi+Panasonic */
{ 3, { 0x90, 0x02, }, { "wisolfem1" } }, /* 4339: , 4354:Panasonic+Panasonic */
{ 3, { 0x90, 0x03, }, { "wisolfem2" } }, /* 4354:Murata+Panasonic */
{ 3, { 0x00, 0x11, }, { "muratafem1" } }, /* 4339: , 4354:Murata+Anadigics */
{ 3, { 0x00, 0x22, }, { "muratafem2"} }, /* 4339: , 4354:Murata+Triquint */
{ 0, { 0x00, }, { "samsung" } } /* Default: Not specified yet */
};
#elif defined(BCM4358_CHIP)
vid_info_t vid_info[] = {
{ 3, { 0x33, 0x33, }, { "semco_b85" } },
{ 3, { 0x33, 0x66, }, { "semco_b85" } },
{ 3, { 0x33, 0x88, }, { "semco3rd_b85" } },
{ 3, { 0x90, 0x01, }, { "wisol_b85" } },
{ 3, { 0x90, 0x02, }, { "wisolfem1_b85" } },
{ 3, { 0x90, 0x03, }, { "wisolfem2_b85" } },
{ 3, { 0x31, 0x90, }, { "wisol_b85b" } },
{ 3, { 0x00, 0x11, }, { "murata_b85" } },
{ 3, { 0x00, 0x22, }, { "murata_b85"} },
{ 6, { 0x00, 0xFF, 0xFF, 0x00, 0x00, }, { "murata_b85"} },
{ 3, { 0x10, 0x33, }, { "semco_b85a" } },
{ 3, { 0x30, 0x33, }, { "semco_b85b" } },
{ 3, { 0x31, 0x33, }, { "semco_b85b" } },
{ 3, { 0x10, 0x22, }, { "murata_b85a" } },
{ 3, { 0x20, 0x22, }, { "murata_b85a" } },
{ 3, { 0x21, 0x22, }, { "murata_b85a" } },
{ 3, { 0x23, 0x22, }, { "murata_b85a" } },
{ 3, { 0x31, 0x22, }, { "murata_b85b" } },
{ 0, { 0x00, }, { "samsung" } } /* Default: Not specified yet */
};
#elif defined(BCM4359_CHIP)
vid_info_t vid_info[] = {
#if defined(SUPPORT_BCM4359_MIXED_MODULES)
{ 3, { 0x34, 0x33, }, { "semco_b90b" } },
{ 3, { 0x40, 0x33, }, { "semco_b90b" } },
{ 3, { 0x41, 0x33, }, { "semco_b90b" } },
{ 3, { 0x11, 0x33, }, { "semco_b90b" } },
{ 3, { 0x33, 0x66, }, { "semco_b90b" } },
{ 3, { 0x23, 0x22, }, { "murata_b90b" } },
{ 3, { 0x40, 0x22, }, { "murata_b90b" } },
{ 3, { 0x10, 0x90, }, { "wisol_b90b" } },
{ 3, { 0x33, 0x33, }, { "semco_b90s_b1" } },
{ 3, { 0x66, 0x33, }, { "semco_b90s_c0" } },
{ 3, { 0x60, 0x22, }, { "murata_b90s_b1" } },
{ 3, { 0x61, 0x22, }, { "murata_b90s_b1" } },
{ 3, { 0x62, 0x22, }, { "murata_b90s_b1" } },
{ 3, { 0x63, 0x22, }, { "murata_b90s_b1" } },
{ 3, { 0x70, 0x22, }, { "murata_b90s_c0" } },
{ 3, { 0x71, 0x22, }, { "murata_b90s_c0" } },
{ 3, { 0x72, 0x22, }, { "murata_b90s_c0" } },
{ 3, { 0x73, 0x22, }, { "murata_b90s_c0" } },
{ 0, { 0x00, }, { "samsung" } } /* Default: Not specified yet */
#else /* SUPPORT_BCM4359_MIXED_MODULES */
{ 3, { 0x34, 0x33, }, { "semco" } },
{ 3, { 0x40, 0x33, }, { "semco" } },
{ 3, { 0x41, 0x33, }, { "semco" } },
{ 3, { 0x11, 0x33, }, { "semco" } },
{ 3, { 0x33, 0x66, }, { "semco" } },
{ 3, { 0x23, 0x22, }, { "murata" } },
{ 3, { 0x40, 0x22, }, { "murata" } },
{ 3, { 0x51, 0x22, }, { "murata" } },
{ 3, { 0x52, 0x22, }, { "murata" } },
{ 3, { 0x10, 0x90, }, { "wisol" } },
{ 0, { 0x00, }, { "samsung" } } /* Default: Not specified yet */
#endif /* SUPPORT_BCM4359_MIXED_MODULES */
};
#elif defined(BCM4361_CHIP)
vid_info_t vid_info[] = {
#if defined(SUPPORT_MIXED_MODULES)
{ 3, { 0x66, 0x33, }, { "semco_sky_r00a_e000_a0" } },
{ 3, { 0x30, 0x33, }, { "semco_sky_r01a_e30a_a1" } },
{ 3, { 0x31, 0x33, }, { "semco_sky_r02a_e30a_a1" } },
{ 3, { 0x32, 0x33, }, { "semco_sky_r02a_e30a_a1" } },
{ 3, { 0x51, 0x33, }, { "semco_sky_r01d_e31_b0" } },
{ 3, { 0x61, 0x33, }, { "semco_sem_r01f_e31_b0" } },
{ 3, { 0x62, 0x33, }, { "semco_sem_r02g_e31_b0" } },
{ 3, { 0x71, 0x33, }, { "semco_sky_r01h_e32_b0" } },
{ 3, { 0x81, 0x33, }, { "semco_sem_r01i_e32_b0" } },
{ 3, { 0x82, 0x33, }, { "semco_sem_r02j_e32_b0" } },
{ 3, { 0x91, 0x33, }, { "semco_sem_r02a_e32a_b2" } },
{ 3, { 0xa1, 0x33, }, { "semco_sem_r02b_e32a_b2" } },
{ 3, { 0x12, 0x22, }, { "murata_nxp_r012_1kl_a1" } },
{ 3, { 0x13, 0x22, }, { "murata_mur_r013_1kl_b0" } },
{ 3, { 0x14, 0x22, }, { "murata_mur_r014_1kl_b0" } },
{ 3, { 0x15, 0x22, }, { "murata_mur_r015_1kl_b0" } },
{ 3, { 0x20, 0x22, }, { "murata_mur_r020_1kl_b0" } },
{ 3, { 0x21, 0x22, }, { "murata_mur_r021_1kl_b0" } },
{ 3, { 0x22, 0x22, }, { "murata_mur_r022_1kl_b0" } },
{ 3, { 0x23, 0x22, }, { "murata_mur_r023_1kl_b0" } },
{ 3, { 0x24, 0x22, }, { "murata_mur_r024_1kl_b0" } },
{ 3, { 0x30, 0x22, }, { "murata_mur_r030_1kl_b0" } },
{ 3, { 0x31, 0x22, }, { "murata_mur_r031_1kl_b0" } },
{ 3, { 0x32, 0x22, }, { "murata_mur_r032_1kl_b0" } },
{ 3, { 0x33, 0x22, }, { "murata_mur_r033_1kl_b0" } },
{ 3, { 0x34, 0x22, }, { "murata_mur_r034_1kl_b0" } },
{ 3, { 0x50, 0x22, }, { "murata_mur_r020_1qw_b2" } },
{ 3, { 0x51, 0x22, }, { "murata_mur_r021_1qw_b2" } },
{ 3, { 0x52, 0x22, }, { "murata_mur_r022_1qw_b2" } },
{ 3, { 0x61, 0x22, }, { "murata_mur_r031_1qw_b2" } },
{ 0, { 0x00, }, { "samsung" } } /* Default: Not specified yet */
#endif /* SUPPORT_MIXED_MODULES */
};
#elif defined(BCM4375_CHIP)
vid_info_t vid_info[] = {
#if defined(SUPPORT_MIXED_MODULES)
{ 3, { 0x11, 0x33, }, { "semco_sky_e41_es11" } },
{ 3, { 0x33, 0x33, }, { "semco_sem_e43_es33" } },
{ 3, { 0x34, 0x33, }, { "semco_sem_e43_es34" } },
{ 3, { 0x35, 0x33, }, { "semco_sem_e43_es35" } },
{ 3, { 0x36, 0x33, }, { "semco_sem_e43_es36" } },
{ 3, { 0x41, 0x33, }, { "semco_sem_e43_cs41" } },
{ 3, { 0x51, 0x33, }, { "semco_sem_e43_cs51" } },
{ 3, { 0x53, 0x33, }, { "semco_sem_e43_cs53" } },
{ 3, { 0x61, 0x33, }, { "semco_sky_e43_cs61" } },
{ 3, { 0x10, 0x22, }, { "murata_mur_1rh_es10" } },
{ 3, { 0x11, 0x22, }, { "murata_mur_1rh_es11" } },
{ 3, { 0x12, 0x22, }, { "murata_mur_1rh_es12" } },
{ 3, { 0x13, 0x22, }, { "murata_mur_1rh_es13" } },
{ 3, { 0x20, 0x22, }, { "murata_mur_1rh_es20" } },
{ 3, { 0x32, 0x22, }, { "murata_mur_1rh_es32" } },
{ 3, { 0x41, 0x22, }, { "murata_mur_1rh_es41" } },
{ 3, { 0x42, 0x22, }, { "murata_mur_1rh_es42" } },
{ 3, { 0x43, 0x22, }, { "murata_mur_1rh_es43" } },
{ 3, { 0x44, 0x22, }, { "murata_mur_1rh_es44" } }
#endif /* SUPPORT_MIXED_MODULES */
};
#elif defined(BCM4389_CHIP_DEF)
vid_info_t vid_info[] = {
#if defined(SUPPORT_MIXED_MODULES)
{ 3, { 0x21, 0x33, }, { "semco_sem_e53_es23" } },
{ 3, { 0x23, 0x33, }, { "semco_sem_e53_es23" } },
{ 3, { 0x24, 0x33, }, { "semco_sem_e53_es24" } },
{ 3, { 0x25, 0x33, }, { "semco_sem_e53_es25" } },
{ 3, { 0x31, 0x38, }, { "semco_sem_e58_es30" } },
{ 3, { 0x31, 0x33, }, { "semco_sem_e53_es31" } },
{ 3, { 0x32, 0x33, }, { "semco_sem_e53_es32" } },
{ 3, { 0x40, 0x33, }, { "semco_sem_e53_es40" } },
{ 3, { 0x21, 0x22, }, { "murata_mur_1wk_es21" } },
{ 3, { 0x30, 0x22, }, { "murata_mur_1wk_es30" } },
{ 3, { 0x31, 0x22, }, { "murata_mur_1wk_es31" } },
{ 3, { 0x32, 0x22, }, { "murata_mur_1wk_es32" } },
{ 3, { 0x40, 0x22, }, { "murata_mur_1wk_es40" } },
{ 3, { 0x41, 0x22, }, { "murata_mur_1wk_es41" } },
{ 3, { 0x42, 0x22, }, { "murata_mur_1wk_es42" } },
{ 3, { 0x43, 0x22, }, { "murata_mur_1wk_es43" } },
{ 3, { 0x50, 0x22, }, { "murata_mur_1wk_es50" } },
{ 3, { 0x51, 0x24, }, { "murata_mur_1wk_es51" } },
{ 3, { 0x60, 0x24, }, { "murata_mur_1wk_es60" } },
{ 3, { 0x61, 0x24, }, { "murata_mur_1wk_es61" } },
{ 3, { 0x10, 0x25, }, { "murata_mur_1wk_es10" } },
{ 3, { 0x11, 0x25, }, { "murata_mur_1wk_es11" } },
{ 3, { 0x10, 0x99, }, { "USI_WM_usi_es10" } },
{ 3, { 0x11, 0x99, }, { "USI_WM_usi_es11" } },
{ 3, { 0x12, 0x99, }, { "USI_WM_usi_es12" } },
{ 3, { 0x13, 0x99, }, { "USI_WM_usi_es13" } },
{ 3, { 0x15, 0x99, }, { "USI_WM_usi_es15" } },
{ 3, { 0x17, 0x99, }, { "USI_WM_usi_es17" } },
{ 3, { 0x19, 0x99, }, { "USI_WM_usi_es19" } },
{ 3, { 0x21, 0x99, }, { "USI_WM_usi_es21" } },
{ 3, { 0x31, 0x99, }, { "USI_WM_usi_es31" } },
#endif /* SUPPORT_MIXED_MODULES */
};
#else
vid_info_t vid_info[] = {
{ 0, { 0x00, }, { "customer" } } /* Default: Not specified yet */
};
#endif /* BCMXXXX_CHIP_ID */
#endif /* DHD_USE_CISINFO */
typedef struct otp_access {
uint chipid;
uint32 bpaddr[2];
uint32 bpdata[2];
} otp_access_t;
#ifdef DHD_USE_CISINFO
/* File Location to keep each information */
#ifdef OEM_ANDROID
#define MACINFO "/data/.mac.info"
#define MACINFO_EFS "/efs/wifi/.mac.info"
#define CIDINFO PLATFORM_PATH".cid.info"
#define CIDINFO_DATA "/data/.cid.info"
#elif defined(PLATFORM_SLP)
#define CIDINFO "/opt/etc/.cid.info"
#define MACINFO "/opt/etc/.mac.info"
#define MACINFO_EFS "/csa/.mac.info"
#else
#define MACINFO "/opt/.mac.info"
#define MACINFO_EFS "/opt/.efs.mac.info"
#define CIDINFO "/opt/.cid.info"
#endif /* OEM_ANDROID */
/* Definitions for MAC address */
#define MAC_BUF_SIZE 20
#define MAC_CUSTOM_FORMAT "%02X:%02X:%02X:%02X:%02X:%02X"
#define CIS_BUF_SIZE 1280
#define DUMP_CIS_SIZE 48
#define CIS_TUPLE_TAG_START 0x80
#define CIS_TUPLE_TAG_VENDOR 0x81
#define CIS_TUPLE_TAG_MACADDR 0x19
#define CIS_TUPLE_TAG_BOARDTYPE 0x1b
#define CIS_TUPLE_LEN_MACADDR 7
#define CIS_DUMP_END 0xff
#define CIS_TUPLE_NULL 0X00
#ifdef CONFIG_BCMDHD_PCIE
#if defined(BCM4361_CHIP) || defined(BCM4375_CHIP)
#define OTP_OFFSET 208
#elif defined(BCM4389_CHIP_DEF) || defined(BCM4398_CHIP_DEF)
#define OTP_OFFSET 0
#else
#define OTP_OFFSET 128
#endif /* BCM4361 | BCM4375 = 208, BCM4389 = 0, Others = 128 */
#else /* CONFIG_BCMDHD_PCIE */
#define OTP_OFFSET 12 /* SDIO */
#endif /* CONFIG_BCMDHD_PCIE */
unsigned char *g_cis_buf = NULL;
/* Definitions for common interface */
typedef struct tuple_entry {
struct list_head list; /* head of the list */
uint32 cis_idx; /* index of each tuples */
} tuple_entry_t;
extern int _dhd_set_mac_address(struct dhd_info *dhd, int ifidx, struct ether_addr *addr);
#if defined(GET_MAC_FROM_OTP) || defined(USE_CID_CHECK)
static tuple_entry_t *dhd_alloc_tuple_entry(dhd_pub_t *dhdp, const int idx);
static void dhd_free_tuple_entry(dhd_pub_t *dhdp, struct list_head *head);
static int dhd_find_tuple_list_from_otp(dhd_pub_t *dhdp, int req_tup,
unsigned char* req_tup_len, struct list_head *head);
#endif /* GET_MAC_FROM_OTP || USE_CID_CHECK */
/* otp region read/write information */
typedef struct otp_rgn_rw_info {
uint8 rgnid;
uint8 preview;
uint8 integrity_chk;
uint16 rgnsize;
uint16 datasize;
uint8 *data;
} otp_rgn_rw_info_t;
/* otp region status information */
typedef struct otp_rgn_stat_info {
uint8 rgnid;
uint16 rgnstart;
uint16 rgnsize;
} otp_rgn_stat_info_t;
typedef int (pack_handler_t)(void *ctx, uint8 *buf, uint16 *buflen);
#endif /* DHD_USE_CISINFO */
static INLINE int
get_cis_tuple_chipidx(uint chipid)
{
int i = 0;
for (i = 0; i < ARRAYSIZE(cis_tuple_addr_ranges); ++i) {
if (cis_tuple_addr_ranges[i].chipid == chipid) {
return i;
}
}
return -1;
}
static int
read_otp_from_bp(dhd_bus_t *bus, uint32 *data_buf)
{
int i = 0;
int chipidx = 0;
uint chipid = si_chipid(bus->sih);
uint32 cis_start_addr = 0;
chipidx = get_cis_tuple_chipidx(chipid);
if (chipidx < 0) {
DHD_ERROR(("%s: unable to find CIS tuple addr for chipid 0x%x !\n",
__FUNCTION__, chipid));
return BCME_NOTFOUND;
}
cis_start_addr = CIS_TUPLE_START_ADDR(chipidx);
/* read tuple raw data */
for (i = 0; i < CIS_TUPLE_MAX_CNT(chipidx); i++) {
if (si_backplane_access(bus->sih, cis_start_addr + i * sizeof(uint32),
sizeof(uint32), &data_buf[i], TRUE) != BCME_OK) {
break;
}
DHD_INFO(("%s: tuple index %d, raw data 0x%08x\n", __FUNCTION__, i, data_buf[i]));
}
return i * sizeof(uint32);
}
static int
dhd_parse_board_information_bcm(dhd_bus_t *bus, int *boardtype,
unsigned char *vid, int *vid_length, bool store_otp)
{
int totlen, len;
uint32 *raw_data = NULL;
cis_tuple_format_t *tuple;
uint chipid = si_chipid(bus->sih);
int chipidx = 0;
int ret = 0;
uint otp_cis_sz = 0;
int cis_offset = OTP_OFFSET + sizeof(cis_rw_t);
#if defined(BCM4389_CHIP_DEF) || defined(BCM4398_CHIP_DEF)
/* override OTP_OFFSET for 4389 */
cis_offset = OTP_OFFSET;
#endif /* BCM4389_CHIP_DEF || BCM4398_CHIP_DEF */
chipidx = get_cis_tuple_chipidx(chipid);
if (chipidx < 0) {
DHD_ERROR(("%s: unable to find CIS tuple addr for chipid 0x%x !\n",
__FUNCTION__, chipid));
ret = BCME_NOTFOUND;
goto exit;
}
otp_cis_sz = CIS_TUPLE_MAX_CNT(chipidx) * sizeof(uint32);
raw_data = MALLOCZ(bus->osh, otp_cis_sz);
if (!raw_data) {
DHD_ERROR(("%s: failed to alloc mem !\n", __FUNCTION__));
ret = BCME_NOMEM;
goto exit;
}
totlen = read_otp_from_bp(bus, raw_data);
if (totlen == BCME_ERROR || totlen == 0) {
DHD_ERROR(("%s : Can't read the OTP\n", __FUNCTION__));
ret = BCME_NORESOURCE;
goto exit;
}
if (store_otp && g_cis_buf) {
if (memcpy_s(g_cis_buf + cis_offset, CIS_BUF_SIZE, raw_data, totlen) != 0) {
DHD_ERROR(("%s : memcpy of otp data to local cis buf failed !\n",
__FUNCTION__));
}
}
tuple = (cis_tuple_format_t *)raw_data;
/* check the first tuple has tag 'start' */
if (tuple->id != CIS_TUPLE_TAG_START) {
DHD_ERROR(("%s: Can not find the TAG\n", __FUNCTION__));
ret = BCME_NOTFOUND;
goto exit;
}
*vid_length = *boardtype = 0;
/* find tagged parameter */
while ((totlen >= (tuple->len + CIS_TUPLE_HDR_LEN)) &&
(*vid_length == 0 || *boardtype == 0)) {
len = tuple->len;
if ((tuple->tag == CIS_TUPLE_TAG_VENDOR) &&
(totlen >= (int)(len + CIS_TUPLE_HDR_LEN))) {
/* found VID */
memcpy(vid, tuple->data, tuple->len - CIS_TUPLE_TAG_LENGTH);
*vid_length = tuple->len - CIS_TUPLE_TAG_LENGTH;
prhex("OTP VID", tuple->data, tuple->len - CIS_TUPLE_TAG_LENGTH);
}
else if ((tuple->tag == CIS_TUPLE_TAG_BOARDTYPE) &&
(totlen >= (int)(len + CIS_TUPLE_HDR_LEN))) {
/* found boardtype */
*boardtype = (int)tuple->data[0];
prhex("OTP boardtype VID", tuple->data, tuple->len - CIS_TUPLE_TAG_LENGTH);
}
tuple = (cis_tuple_format_t*)((uint8*)tuple + (len + CIS_TUPLE_HDR_LEN));
totlen -= (len + CIS_TUPLE_HDR_LEN);
}
if (*vid_length <= 0 || *boardtype <= 0) {
DHD_ERROR(("failed to parse information (vid=%d, boardtype=%d)\n",
*vid_length, *boardtype));
ret = BCME_ERROR;
goto exit;
}
ret = BCME_OK;
exit:
if (raw_data) {
MFREE(bus->osh, raw_data, otp_cis_sz);
}
return ret;
}
#ifdef USE_CID_CHECK
#define CHIP_REV_A0 1
#define CHIP_REV_A1 2
#define CHIP_REV_B0 3
#define CHIP_REV_B1 4
#define CHIP_REV_B2 5
#define CHIP_REV_C0 6
#define BOARD_TYPE_EPA 0x080f
#define BOARD_TYPE_IPA 0x0827
#define BOARD_TYPE_IPA_OLD 0x081a
#define DEFAULT_CIDINFO_FOR_EPA "r00a_e000_a0_ePA"
#define DEFAULT_CIDINFO_FOR_IPA "r00a_e000_a0_iPA"
#define DEFAULT_CIDINFO_FOR_A1 "r01a_e30a_a1"
#define DEFAULT_CIDINFO_FOR_B0 "r01i_e32_b0"
naming_info_t bcm4361_naming_table[] = {
{ {""}, {""}, {""} },
{ {"r00a_e000_a0_ePA"}, {"_a0_ePA"}, {"_a0_ePA"} },
{ {"r00a_e000_a0_iPA"}, {"_a0"}, {"_a1"} },
{ {"r01a_e30a_a1"}, {"_r01a_a1"}, {"_a1"} },
{ {"r02a_e30a_a1"}, {"_r02a_a1"}, {"_a1"} },
{ {"r02c_e30a_a1"}, {"_r02c_a1"}, {"_a1"} },
{ {"r01d_e31_b0"}, {"_r01d_b0"}, {"_b0"} },
{ {"r01f_e31_b0"}, {"_r01f_b0"}, {"_b0"} },
{ {"r02g_e31_b0"}, {"_r02g_b0"}, {"_b0"} },
{ {"r01h_e32_b0"}, {"_r01h_b0"}, {"_b0"} },
{ {"r01i_e32_b0"}, {"_r01i_b0"}, {"_b0"} },
{ {"r02j_e32_b0"}, {"_r02j_b0"}, {"_b0"} },
{ {"r012_1kl_a1"}, {"_r012_a1"}, {"_a1"} },
{ {"r013_1kl_b0"}, {"_r013_b0"}, {"_b0"} },
{ {"r013_1kl_b0"}, {"_r013_b0"}, {"_b0"} },
{ {"r014_1kl_b0"}, {"_r014_b0"}, {"_b0"} },
{ {"r015_1kl_b0"}, {"_r015_b0"}, {"_b0"} },
{ {"r020_1kl_b0"}, {"_r020_b0"}, {"_b0"} },
{ {"r021_1kl_b0"}, {"_r021_b0"}, {"_b0"} },
{ {"r022_1kl_b0"}, {"_r022_b0"}, {"_b0"} },
{ {"r023_1kl_b0"}, {"_r023_b0"}, {"_b0"} },
{ {"r024_1kl_b0"}, {"_r024_b0"}, {"_b0"} },
{ {"r030_1kl_b0"}, {"_r030_b0"}, {"_b0"} },
{ {"r031_1kl_b0"}, {"_r030_b0"}, {"_b0"} }, /* exceptional case : r31 -> r30 */
{ {"r032_1kl_b0"}, {"_r032_b0"}, {"_b0"} },
{ {"r033_1kl_b0"}, {"_r033_b0"}, {"_b0"} },
{ {"r034_1kl_b0"}, {"_r034_b0"}, {"_b0"} },
{ {"r02a_e32a_b2"}, {"_r02a_b2"}, {"_b2"} },
{ {"r02b_e32a_b2"}, {"_r02b_b2"}, {"_b2"} },
{ {"r020_1qw_b2"}, {"_r020_b2"}, {"_b2"} },
{ {"r021_1qw_b2"}, {"_r021_b2"}, {"_b2"} },
{ {"r022_1qw_b2"}, {"_r022_b2"}, {"_b2"} },
{ {"r031_1qw_b2"}, {"_r031_b2"}, {"_b2"} }
};
naming_info_t bcm4375_naming_table[] = {
{ {""}, {""}, {""} },
{ {"e41_es11"}, {"_ES00_semco_b0"}, {"_b0"} },
{ {"e43_es33"}, {"_ES01_semco_b0"}, {"_b0"} },
{ {"e43_es34"}, {"_ES02_semco_b0"}, {"_b0"} },
{ {"e43_es35"}, {"_ES02_semco_b0"}, {"_b0"} },
{ {"e43_es36"}, {"_ES03_semco_b0"}, {"_b0"} },
{ {"e43_cs41"}, {"_CS00_semco_b1"}, {"_b1"} },
{ {"e43_cs51"}, {"_CS01_semco_b1"}, {"_b1"} },
{ {"e43_cs53"}, {"_CS01_semco_b1"}, {"_b1"} },
{ {"e43_cs61"}, {"_CS00_skyworks_b1"}, {"_b1"} },
{ {"1rh_es10"}, {"_1rh_es10_b0"}, {"_b0"} },
{ {"1rh_es11"}, {"_1rh_es11_b0"}, {"_b0"} },
{ {"1rh_es12"}, {"_1rh_es12_b0"}, {"_b0"} },
{ {"1rh_es13"}, {"_1rh_es13_b0"}, {"_b0"} },
{ {"1rh_es20"}, {"_1rh_es20_b0"}, {"_b0"} },
{ {"1rh_es32"}, {"_1rh_es32_b0"}, {"_b0"} },
{ {"1rh_es41"}, {"_1rh_es41_b1"}, {"_b1"} },
{ {"1rh_es42"}, {"_1rh_es42_b1"}, {"_b1"} },
{ {"1rh_es43"}, {"_1rh_es43_b1"}, {"_b1"} },
{ {"1rh_es44"}, {"_1rh_es44_b1"}, {"_b1"} }
};
naming_info_t bcm4389_naming_table[] = {
{ {""}, {""}, {""} },
{ {"e53_es23"}, {"_ES10_semco_b0"}, {"_b0"} },
{ {"e53_es24"}, {"_ES20_semco_b0"}, {"_b0"} },
{ {"e53_es25"}, {"_ES21_semco_b0"}, {"_b0"} },
{ {"e58_es30"}, {"_ES30_semco_c0"}, {"_c0"} },
{ {"e53_es31"}, {"_ES30_semco_c0"}, {"_c0"} },
{ {"e53_es32"}, {"_ES32_semco_c0"}, {"_c0"} },
{ {"e53_es40"}, {"_ES40_semco_c1"}, {"_c1"} },
{ {"1wk_es21"}, {"_1wk_es21_b0"}, {"_b0"} },
{ {"1wk_es30"}, {"_1wk_es30_b0"}, {"_b0"} },
{ {"1wk_es31"}, {"_1wk_es31_b0"}, {"_b0"} },
{ {"1wk_es32"}, {"_1wk_es32_b0"}, {"_b0"} },
{ {"1wk_es40"}, {"_1wk_es40_c0"}, {"_c0"} },
{ {"1wk_es41"}, {"_1wk_es41_c0"}, {"_c0"} },
{ {"1wk_es42"}, {"_1wk_es42_c0"}, {"_c0"} },
{ {"1wk_es43"}, {"_1wk_es43_c0"}, {"_c0"} },
{ {"1wk_es50"}, {"_1wk_es50_c1"}, {"_c1"} },
{ {"1wk_es51"}, {"_1wk_es51_c1"}, {"_c1"} },
{ {"1wk_es60"}, {"_1wk_es60_c1"}, {"_c1"} },
{ {"1wk_es61"}, {"_1wk_es61_c1"}, {"_c1"} },
{ {"1wk_es10"}, {"_1wk_es10_c1"}, {"_c1"} },
{ {"1wk_es11"}, {"_1wk_es11_c1"}, {"_c1"} },
{ {"usi_es10"}, {"_ES10"}, {"_c0"} },
{ {"usi_es11"}, {"_ES11"}, {"_c0"} },
{ {"usi_es12"}, {"_ES12"}, {""} },
{ {"usi_es13"}, {"_ES13"}, {""} },
{ {"usi_es15"}, {"_ES15"}, {""} },
{ {"usi_es17"}, {"_ES17"}, {""} },
{ {"usi_es19"}, {"_ES19"}, {""} },
{ {"usi_es21"}, {"_ES21"}, {""} },
{ {"usi_es31"}, {"_ES31"}, {""} },
};
/* select the NVRAM/FW tag naming table */
naming_info_t *
select_naming_table(dhd_pub_t *dhdp, int *table_size)
{
naming_info_t * info = NULL;
if (!dhdp || !dhdp->bus || !dhdp->bus->sih)
{
DHD_ERROR(("%s : Invalid pointer \n", __FUNCTION__));
return info;
}
switch (si_chipid(dhdp->bus->sih)) {
case BCM4361_CHIP_ID:
case BCM4347_CHIP_ID:
info = &bcm4361_naming_table[0];
*table_size = ARRAYSIZE(bcm4361_naming_table);
DHD_INFO(("%s: info %p, ret %d\n", __FUNCTION__, info, *table_size));
break;
case BCM4375_CHIP_ID:
info = &bcm4375_naming_table[0];
*table_size = ARRAYSIZE(bcm4375_naming_table);
DHD_INFO(("%s: info %p, ret %d\n", __FUNCTION__, info, *table_size));
break;
case BCM4389_CHIP_ID:
info = &bcm4389_naming_table[0];
*table_size = ARRAYSIZE(bcm4389_naming_table);
DHD_INFO(("%s: info %p, ret %d\n", __FUNCTION__, info, *table_size));
break;
default:
DHD_ERROR(("%s: No MODULE NAMING TABLE found\n", __FUNCTION__));
break;
}
return info;
}
#define CID_FEM_MURATA "_mur_"
naming_info_t *
dhd_find_naming_info(dhd_pub_t *dhdp, char *module_type)
{
int i = 0;
naming_info_t *info = NULL;
int table_size = 0;
info = select_naming_table(dhdp, &table_size);
if (!info || !table_size) {
DHD_ERROR(("%s : Can't select the naming table\n", __FUNCTION__));
return NULL;
}
if (module_type && strlen(module_type) > 0) {
for (i = 1, info++; i < table_size; info++, i++) {
DHD_INFO(("%s : info %p, %d, info->cid_ext : %s\n",
__FUNCTION__, info, i, info->cid_ext));
if (!strncmp(info->cid_ext, module_type, strlen(info->cid_ext))) {
break;
}
}
}
return info;
}
static naming_info_t *
dhd_find_naming_info_by_cid(dhd_pub_t *dhdp, char *cid_info)
{
int i = 0;
char *ptr;
naming_info_t *info = NULL;
int table_size = 0;
info = select_naming_table(dhdp, &table_size);
if (!info || !table_size) {
DHD_ERROR(("%s : Can't select the naming table\n", __FUNCTION__));
return NULL;
}
/* truncate extension */
for (i = 1, ptr = cid_info; i < MODULE_NAME_INDEX_MAX && ptr; i++) {
ptr = bcmstrstr(ptr, "_");
if (ptr) {
ptr++;
}
}
for (i = 1, info++; i < table_size && ptr; info++, i++) {
DHD_INFO(("%s : info %p, %d, info->cid_ext : %s\n",
__FUNCTION__, info, i, info->cid_ext));
if (!strncmp(info->cid_ext, ptr, strlen(info->cid_ext))) {
break;
}
}
return info;
}
/*
* dhd_get_clm_name - returns clm blob name appended with the given chip id
* and chip revision.
*
* Parameters:
* clm_path = buffer to hold the clm blob file name (output arg)
*
* Returns:
* BCME_OK on success, BCME_xxx error code on failure
*/
int
dhd_get_complete_blob_name(dhd_pub_t *dhdp, char *blob_path, char *blob_name)
{
char blob_fname[MAX_FILE_LEN] = {0};
char blob_ext[MAX_EXTENSION] = {0};
char chip_revstr[MAX_REVSTRING] = {0};
bool chiprev_found = FALSE;
uint chipid = si_chipid(dhdp->bus->sih);
uint chiprev = dhdp->bus->sih->chiprev;
int i = 0, len = 0;
if (!blob_path) {
DHD_ERROR(("%s: null blob_path !\n", __FUNCTION__));
return BCME_BADARG;
}
if (chiprev >= MAX_REVS) {
DHD_ERROR(("%s: bad chip rev %u, out of bounds !\n", __FUNCTION__, chiprev));
return BCME_BADARG;
}
for (i = 0; i < ARRAYSIZE(chip_revs); ++i) {
if (chip_revs[i].chip_id == chipid &&
chip_revs[i].chip_revstr[chiprev][0] != '\0') {
memcpy_s(chip_revstr, MAX_REVSTRING,
chip_revs[i].chip_revstr[chiprev], MAX_REVSTRING);
chiprev_found = TRUE;
break;
}
}
strncpy(blob_fname, blob_name, strlen(blob_name));
len = strlen(blob_fname);
if (chiprev_found) {
snprintf(blob_ext, MAX_EXTENSION, "_%x_%s", chipid, chip_revstr);
strncpy(blob_path, blob_fname, strlen(blob_fname));
strncat(blob_path, blob_ext, strlen(blob_ext));
/* check file existence */
if (dhd_os_check_image_exists(dhdp, blob_path) == FALSE) {
DHD_ERROR(("%s: %s not found, Fallback to default BLOB name\n",
__FUNCTION__, blob_path));
strncpy(blob_path, blob_fname, strlen(blob_fname));
blob_path[len] = '\0';
}
} else {
DHD_ERROR(("%s:failed to get chip rev str for chip id 0x%x and rev %u."
" Fallback to default BLOB name\n",
__FUNCTION__, chipid, chiprev));
strncpy(blob_path, blob_fname, strlen(blob_fname));
blob_path[len] = '\0';
}
DHD_PRINT(("%s: blob path = %s\n", __FUNCTION__, blob_path));
return BCME_OK;
}
/*
* dhd_get_fw_nvram_names - returns fw name appended with the given chip id
* and chip revision. The nvram name will be appended with the module VID
* string read from the VID naming table.
* Parameters:
* chipid = chip id read from dongle
* chiprev = chip revision read from dongle
* fw_path = buffer to hold the fw file name (output arg)
* nv_path = buffer to hold the nvram file name (output arg)
* map_path - buffer to hold the map file name (output arg)
*
* Returns:
* BCME_OK on success, BCME_xxx error code on failure
*/
int
dhd_get_fw_nvram_names(dhd_pub_t *dhdp, uint chipid, uint chiprev,
char *fw_path, char *nv_path, char *map_path)
{
int board_type = 0, vid_length = 0;
unsigned char vid[MAX_VID_LEN] = {0};
dhd_bus_t *bus = dhdp->bus;
int i = 0;
char *nvram_ext = NULL;
char fw_ext[MAX_EXTENSION] = {0};
char nv_ext[MAX_EXTENSION] = {0};
char chip_revstr[MAX_REVSTRING] = {0};
bool chiprev_found = FALSE;
char *cid_info = NULL;
vid_info_t *vid_info = NULL;
uint vid_info_sz = 0;
char orig_fw_path[MAX_FILE_LEN] = {0};
char orig_nv_path[MAX_FILE_LEN] = {0};
char orig_map_path[MAX_FILE_LEN] = {0};
int nvlen = 0, fwlen = 0, maplen = 0;
if (!fw_path || !nv_path || !map_path) {
DHD_ERROR(("%s: null fw_path/nv_path !\n", __FUNCTION__));
return BCME_BADARG;
}
if (chiprev >= MAX_REVS) {
DHD_ERROR(("%s: bad chip rev %u, out of bounds !\n", __FUNCTION__, chiprev));
return BCME_BADARG;
}
/* for fallback */
strncpy(orig_fw_path, fw_path, strlen(fw_path));
strncpy(orig_nv_path, nv_path, strlen(nv_path));
strncpy(orig_map_path, map_path, strlen(map_path));
fwlen = strlen(orig_fw_path);
nvlen = strlen(orig_nv_path);
maplen = strlen(orig_map_path);
/* determine chip revision string like "b0", "c0" etc.. */
for (i = 0; i < ARRAYSIZE(chip_revs); ++i) {
if (chip_revs[i].chip_id == chipid &&
chip_revs[i].chip_revstr[chiprev][0] != '\0') {
memcpy_s(chip_revstr, MAX_REVSTRING,
chip_revs[i].chip_revstr[chiprev], MAX_REVSTRING);
chiprev_found = TRUE;
DHD_PRINT(("%s, chiprev string(%s) found for chipid:0x%x "
"chiprev:0x%x\n",
__FUNCTION__, chip_revstr, chipid, chiprev));
snprintf(nv_ext, MAX_EXTENSION, "_%x_%s", chipid, chip_revstr);
snprintf(fw_ext, MAX_EXTENSION, "_%x_%s", chipid, chip_revstr);
break;
}
}
/* read Vendor ID (VID) from dongle OTP */
if (dhd_parse_board_information_bcm(bus, &board_type, vid, &vid_length, TRUE)
!= BCME_OK) {
DHD_ERROR(("%s:failed to parse board information\n", __FUNCTION__));
/* If OTP is not programmed with vendor tuple,
* first fall back to nvram name with "_chipid_rev" as extension
*/
if (chiprev_found) {
strncat(nv_path, nv_ext, strlen(nv_ext));
DHD_ERROR(("%s: try nvram '%s'\n", __FUNCTION__, nv_path));
}
} else {
/* set vid info global variable, reflected in -
* /sys/module/bcmdhd/parameters/info_string
*/
memcpy_s(&cur_vid_info, sizeof(cur_vid_info), vid, sizeof(cur_vid_info));
switch (chipid) {
case BCM4389_CHIP_ID:
vid_info = vid_naming_table_4389;
vid_info_sz = ARRAYSIZE(vid_naming_table_4389);
break;
case BCM4397_CHIP_GRPID:
vid_info = vid_naming_table_4398;
vid_info_sz = ARRAYSIZE(vid_naming_table_4398);
break;
case BCM4390_CHIP_GRPID:
vid_info = vid_naming_table_4390;
vid_info_sz = ARRAYSIZE(vid_naming_table_4390);
break;
default:
DHD_ERROR(("%s: unrecognized chip id 0x%x !\n",
__FUNCTION__, chipid));
return BCME_NOTFOUND;
}
/* Using VID get the CID string having nvram extension at the end */
cid_info = dhd_get_cid_info(vid, vid_length, vid_info, vid_info_sz);
if (!cid_info) {
DHD_ERROR(("%s:failed to get CID information for VID 0x%x%x\n",
__FUNCTION__, vid[0], vid[1]));
/* If VID is not present in the naming table
* again fall back to nvram name with "_chipid_rev" as extension
*/
if (chiprev_found) {
strncat(nv_path, nv_ext, strlen(nv_ext));
DHD_ERROR(("%s: try nvram '%s'\n", __FUNCTION__, nv_path));
}
} else {
nvram_ext = cid_info;
strncat(nv_path, nvram_ext, strlen(nvram_ext));
/* check file existence of the nvram name with VID module string ext.
* if not present again fall back to nvram name
* with "_chipid_rev" as extension
*/
if (dhd_os_check_image_exists(dhdp, nv_path) == FALSE) {
DHD_ERROR(("%s: '%s' not found \n", __FUNCTION__, nv_path));
strncpy(nv_path, orig_nv_path, strlen(orig_nv_path));
nv_path[nvlen] = '\0';
strncat(nv_path, nv_ext, strlen(nv_ext));
DHD_ERROR(("%s: try nvram '%s'\n", __FUNCTION__, nv_path));
}
}
}
/* check file existence - second level fallback to default nvram name */
if (dhd_os_check_image_exists(dhdp, nv_path) == FALSE) {
DHD_ERROR(("%s: '%s' not found, Fallback to default NVRAM name '%s'\n",
__FUNCTION__, nv_path, orig_nv_path));
strncpy(nv_path, orig_nv_path, strlen(orig_nv_path));
nv_path[nvlen] = '\0';
}
if (chiprev_found) {
strncat(fw_path, fw_ext, strlen(fw_ext));
strncat(map_path, fw_ext, strlen(fw_ext));
/* check file existence */
if (dhd_os_check_image_exists(dhdp, fw_path) == FALSE) {
DHD_ERROR(("%s: '%s' not found, Fallback to default FW name '%s'\n",
__FUNCTION__, fw_path, orig_fw_path));
strncpy(fw_path, orig_fw_path, strlen(orig_fw_path));
fw_path[fwlen] = '\0';
strncpy(map_path, orig_map_path, strlen(orig_map_path));
map_path[maplen] = '\0';
}
} else {
DHD_ERROR(("%s:failed to get chip rev str for chip id 0x%x and rev %u."
" Fallback to default FW name\n",
__FUNCTION__, chipid, chiprev));
}
DHD_PRINT(("%s: fw path = %s; nvram path = %s; map path = %s\n", __FUNCTION__,
fw_path, nv_path, map_path));
return BCME_OK;
}