target: narrow the de-fusion claim to the backend that actually does it

1d8184f generalized from two x86 configurations to "reassoc de-fuses where
the target has no fused instruction". Three 32-bit ARM DSP configurations
falsify that: Cortex-M3 with no FPU and Cortex-A9 on VFPv3 both keep the
fmaf call under reassoc contract, and Cortex-M4F keeps vfma.f32.

So contract never de-fuses anywhere measured, and reassoc de-fuses on the
X86 backend without +fma and nowhere else. The hazard is a per-backend
expansion policy rather than a target-capability rule, which makes the case
for consuming permissions stronger, not weaker: a delegated permission
cannot be reasoned about from the target at all.

The three ARM rows are the DSP-relevant configurations, so they are worth
pinning on their own account - Cortex-M is where embedded DSP runs and has
no 64-bit variant.

Author: Chennesxu

docs/f32-contract-evidence.md

@@ -36,11 +36,11 @@ them apart:
 The audit point is the translated `.ll`: this flow runs no LLVM middle end, so
 permissions are final there. It is *not* the final point for the realized
 event graph, because `llc` still consumes fast-math flags — a `reassoc` on
-`llvm.fma` is enough for the backend to de-fuse it where the target has no
-fused instruction, and not where it has one
-(`test/Target/fp_permission_fmf.ll`). A delegated permission therefore makes
-the realized graph target dependent, which is why emitted is empty rather than
-merely bounded.
+`llvm.fma` is enough for the X86 backend without +fma to de-fuse it, while
+AArch64 and the 32-bit ARM DSP targets keep it fused even with no fused
+instruction to keep (`test/Target/fp_permission_fmf.ll`). Which graph runs is
+therefore a per-backend expansion policy that a delegated permission cannot
+bound, which is why emitted is empty rather than merely bounded.
 
 `fast` permits two rewrites: `ReassociateReductionTerms` (regroup a
 reduction's additive tree) and `FuseMultiplyAdd` (select a fused event for a

include/ondrix/Dialect/ondsp/IR/OndspSemantics.h

@@ -33,10 +33,11 @@ enum class FastPermission {
 /// the operation — hands the choice to LLVM; no lowering does, so there is no
 /// entry point for it here.
 ///
-/// Delegation is not portable: de-fusion of `llvm.fma` needs both `reassoc`
-/// and a target with no fused instruction, so a delegated permission makes the
-/// realized graph target dependent from one declaration. Measured, not derived
-/// — `test/Target/fp_permission_fmf.ll` pins it.
+/// Delegation is not portable: `reassoc` lets the X86 backend without +fma
+/// expand `llvm.fma`, while AArch64 and the 32-bit ARM DSP targets keep it
+/// fused even with no fused instruction to keep. Which graph runs is a
+/// per-backend expansion policy, so a delegated permission cannot be reasoned
+/// about from the target. Measured — `test/Target/fp_permission_fmf.ll`.
 inline mlir::arith::FastMathFlags consumeFastPermission(FastPermission permission) {
   (void)permission;
   return mlir::arith::FastMathFlags::none;

test/Target/fp_permission_fmf.ll

@@ -1,15 +1,20 @@
 ; RUN: llc --version | FileCheck %s --check-prefix=TOOLCHAIN
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=-fma,-fma4 %s -o - | FileCheck %s --check-prefix=NOFMA
 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mcpu=x86-64 -mattr=+fma %s -o - | FileCheck %s --check-prefix=X86FMA --implicit-check-not=mulss
-; RUN: llc -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=ARM --implicit-check-not=fmul
+; RUN: llc -mtriple=aarch64-unknown-linux-gnu %s -o - | FileCheck %s --check-prefix=A64 --implicit-check-not=fmul
+; RUN: llc -mtriple=thumbv7em-none-eabi -mcpu=cortex-m4 -float-abi=hard %s -o - | FileCheck %s --check-prefix=M4F --implicit-check-not=vmul
+; RUN: llc -mtriple=thumbv7m-none-eabi -mcpu=cortex-m3 %s -o - | FileCheck %s --check-prefix=M3 --implicit-check-not=vmul
+; RUN: llc -mtriple=armv7a-none-eabi -mcpu=cortex-a9 -float-abi=hard %s -o - | FileCheck %s --check-prefix=A9 --implicit-check-not=vmul
 
 ; Measured, not derived: LangRef specifies llvm.fma as one fused event and one
-; of these configurations expands it anyway. Version, triple, cpu and mattr are
-; all pinned because another toolchain has to be measured again.
+; of these configurations expands it anyway.
 ;
-; De-fusion needs both reassoc and a target with no fused instruction, so a
-; delegated permission makes the realized graph target dependent. Rationale:
-; consumeFastPermission in OndspSemantics.h.
+; contract never de-fuses. reassoc de-fuses on the X86 backend without +fma and
+; nowhere else measured - not on AArch64, and not on the 32-bit ARM DSP targets
+; even where there is no fused instruction and the fallback is a libm call. So
+; the hazard is a per-backend expansion policy, not a target-capability rule,
+; and a delegated permission cannot be reasoned about from the target alone.
+; Rationale: consumeFastPermission in OndspSemantics.h.
 
 ; TOOLCHAIN: LLVM version 17.0.6
 
@@ -19,33 +24,51 @@ declare float @llvm.fma.f32(float, float, float)
 ; NOFMA: fmaf
 ; X86FMA-LABEL: unflagged:
 ; X86FMA: vfmadd
-; ARM-LABEL: unflagged:
-; ARM: fmadd
+; A64-LABEL: unflagged:
+; A64: fmadd
+; M4F-LABEL: unflagged:
+; M4F: vfma.f32
+; M3-LABEL: unflagged:
+; M3: bl{{.*}}fmaf
+; A9-LABEL: unflagged:
+; A9: {{b|bl}}{{.*}}fmaf
 define float @unflagged(float %a, float %b, float %c) {
   %r = call float @llvm.fma.f32(float %a, float %b, float %c)
   ret float %r
 }
 
-; contract alone never licenses de-fusion, on any of the three.
+; contract alone never licenses de-fusion anywhere measured.
 ; NOFMA-LABEL: contract_only:
 ; NOFMA: fmaf
 ; X86FMA-LABEL: contract_only:
 ; X86FMA: vfmadd
-; ARM-LABEL: contract_only:
-; ARM: fmadd
+; A64-LABEL: contract_only:
+; A64: fmadd
+; M4F-LABEL: contract_only:
+; M4F: vfma.f32
+; M3-LABEL: contract_only:
+; M3: bl{{.*}}fmaf
+; A9-LABEL: contract_only:
+; A9: {{b|bl}}{{.*}}fmaf
 define float @contract_only(float %a, float %b, float %c) {
   %r = call contract float @llvm.fma.f32(float %a, float %b, float %c)
   ret float %r
 }
 
-; reassoc does, but only where there is no fused instruction to keep.
+; reassoc does, on the X86 backend without +fma and nowhere else.
 ; NOFMA-LABEL: reassoc_only:
 ; NOFMA: mulss
 ; NOFMA: addss
 ; X86FMA-LABEL: reassoc_only:
 ; X86FMA: vfmadd
-; ARM-LABEL: reassoc_only:
-; ARM: fmadd
+; A64-LABEL: reassoc_only:
+; A64: fmadd
+; M4F-LABEL: reassoc_only:
+; M4F: vfma.f32
+; M3-LABEL: reassoc_only:
+; M3: bl{{.*}}fmaf
+; A9-LABEL: reassoc_only:
+; A9: {{b|bl}}{{.*}}fmaf
 define float @reassoc_only(float %a, float %b, float %c) {
   %r = call reassoc float @llvm.fma.f32(float %a, float %b, float %c)
   ret float %r
@@ -56,8 +79,14 @@ define float @reassoc_only(float %a, float %b, float %c) {
 ; NOFMA: addss
 ; X86FMA-LABEL: reassoc_contract:
 ; X86FMA: vfmadd
-; ARM-LABEL: reassoc_contract:
-; ARM: fmadd
+; A64-LABEL: reassoc_contract:
+; A64: fmadd
+; M4F-LABEL: reassoc_contract:
+; M4F: vfma.f32
+; M3-LABEL: reassoc_contract:
+; M3: bl{{.*}}fmaf
+; A9-LABEL: reassoc_contract:
+; A9: {{b|bl}}{{.*}}fmaf
 define float @reassoc_contract(float %a, float %b, float %c) {
   %r = call reassoc contract float @llvm.fma.f32(float %a, float %b, float %c)
   ret float %r