add swiftlint, fix violations and disable some linting rules

Author: zydeco

.swiftlint.yml

@@ -0,0 +1,8 @@
+excluded:
+  - Sources/Capstone/*Enums.swift
+disabled_rules:
+  - large_tuple
+  - nesting
+  - line_length
+identifier_name:
+  min_length: 1

Package.swift

@@ -10,7 +10,7 @@ let package = Package(
         .library(
             name: "Capstone",
             targets: ["Capstone"]
-        ),
+        )
     ],
     dependencies: [
         // Dependencies declare other packages that this package depends on.
@@ -27,6 +27,6 @@ let package = Package(
             dependencies: ["Ccapstone"]),
         .testTarget(
             name: "CapstoneTests",
-            dependencies: ["Capstone"]),
+            dependencies: ["Capstone"])
     ]
 )

Sources/Capstone/Architecture.swift

@@ -65,7 +65,7 @@ public class TMS320C64xInstruction: PlatformInstruction<Tms320c64xIns, Tms320c64
 public class M680xInstruction: PlatformInstruction<M680xIns, M680xGrp, M680xReg> {}
 
 /// Ethereum Instruction
-public class EthereumInstruction: PlatformInstruction_IG<EvmIns, EvmGrp> {}
+public class EthereumInstruction: PlatformInstructionBase<EvmIns, EvmGrp> {}
 
 /// MOS65XX Instruction
 public class Mos65xxInstruction: PlatformInstruction<Mos65xxIns, Mos65xxGrp, Mos65xxReg> {}
@@ -103,15 +103,15 @@ public extension Architecture {
             return Mos65xxInstruction.self
         }
     }
-    
+
     /// The type for registers used in this architecture, if any
     var registerType: Any.Type? {
-        instructionClass.RegisterType
+        instructionClass.registerType
     }
-    
+
     /// The type for instructions used in this architecture
     var instructionType: InstructionType.Type {
-        instructionClass.InstructionType
+        instructionClass.instructionType
     }
 }
 

Sources/Capstone/Arm.swift

@@ -5,21 +5,21 @@ extension ArmInstruction: OperandContainer {
         let operands: [cs_arm_op] = readDetailsArray(array: detail?.arm.operands, size: detail?.arm.op_count)
         return operands.map({ Operand(op: $0) })
     }
-    
+
     /// User-mode registers to be loaded (for LDM/STM instructions).
     /// nil when detail mode is off
     public var usermode: Bool! { detail?.arm.usermode }
-    
+
     /// Scalar size for vector instructions
     /// nil when detail mode is off
     public var vectorSize: Int! { optionalNumericCast(detail?.arm.vector_size) }
-    
+
     /// Data type for elements of vector instructions
     /// nil when detail mode is off, or wrong instruction
     public var vectorDataType: ArmVectordata! {
         optionalEnumCast(detail?.arm.vector_data, ignoring: ARM_VECTORDATA_INVALID)
     }
-    
+
     /// CPS mode for CPS instruction
     /// nil when detail mode is off, or wrong instruction
     public var cpsMode: (mode: ArmCpsmode, flag: ArmCpsflag)! {
@@ -29,86 +29,86 @@ extension ArmInstruction: OperandContainer {
         }
         return (mode, flag)
     }
-    
+
     /// Condition code
     /// nil when detail mode is off, or instruction has no condition code
     public var conditionCode: ArmCc! {
         optionalEnumCast(detail?.arm.cc, ignoring: ARM_CC_INVALID)
     }
-    
+
     /// Does this instruction update flags?
     /// nil when detail mode is off
     public var updatesFlags: Bool! { detail?.arm.update_flags }
-    
+
     /// Does this instruction write-back?
     /// nil when detail mode is off
     public var writeBack: Bool! { detail?.arm.writeback }
-    
+
     /// Option for some memory barrier instructions
     /// nil when detail mode is off, or wrong instruction
     public var memoryBarrier: ArmMb! {
         optionalEnumCast(detail?.arm.mem_barrier, ignoring: ARM_MB_INVALID)
     }
-    
+
     public struct Operand: InstructionOperand, CustomStringConvertible {
         internal var op: cs_arm_op
-        
+
         public var type: ArmOp { enumCast(op.type) }
-        
+
         /// Operand access mode
         public var access: Access { enumCast(op.access) }
-        
+
         /// Vector Index for some vector operands
         public var vectorIndex: Int! {
             guard op.vector_index != -1 else {
                 return nil
             }
             return numericCast(op.vector_index)
         }
-        
+
         /// Operand shift
         public var shift: Shift? {
             guard op.shift.type != ARM_SFT_INVALID else {
                 return nil
             }
             return Shift(op.shift)
         }
-        
+
         /// In some instructions, an operand can be subtracted or added to the base register
         public var subtracted: Bool { op.subtracted }
-        
+
         /// Neon lane index for NEON instructions
         public var neonLane: Int! {
             guard op.neon_lane != -1 else {
                 return nil
             }
             return numericCast(op.neon_lane)
         }
-        
+
         /// Register value for register operand
         public var register: ArmReg! {
             guard type == .reg else { return nil }
             return enumCast(op.reg)
         }
-        
+
         /// Register value for system register operand
         public var systemRegister: ArmSysreg! {
             guard type == .sysreg else { return nil }
             return enumCast(op.reg)
         }
-        
+
         /// Immediate value for C-IMM, P-IMM or IMM operand
         public var immediateValue: Int32! {
             guard type.immediate else { return nil }
             return op.imm
         }
-        
+
         /// Floating point value for FP operand
         public var doubleValue: Double! {
             guard type == .fp else { return nil }
             return op.fp
         }
-        
+
         /// Base/index/scale/disp value for memory operand
         public var memory: Memory! {
             guard type == .mem else { return nil }
@@ -120,13 +120,13 @@ extension ArmInstruction: OperandContainer {
                 leftShift: op.mem.lshift == 0 ? nil : numericCast(op.mem.lshift)
             )
         }
-        
+
         /// Operand type for SETEND instruction
         public var setend: ArmSetend! {
             guard type == .setend else { return nil }
             return enumCast(op.setend)
         }
-        
+
         /// Operand value
         public var value: ArmOperandValue {
             switch type {
@@ -147,11 +147,11 @@ extension ArmInstruction: OperandContainer {
                 return 0
             }
         }
-        
+
         public var description: String {
             "\(type)<\(value)>"
         }
-        
+
         /// Instruction operand shift
         public enum Shift {
             public enum Direction: UInt8 {
@@ -166,10 +166,10 @@ extension ArmInstruction: OperandContainer {
                 /// Rotate Right with eXtend
                 case rrx = 5
             }
-            
+
             case immediate(direction: Direction, value: UInt)
             case register(direction: Direction, register: ArmReg)
-            
+
             init(_ shift: cs_arm_op.__Unnamed_struct_shift) {
                 switch shift.type.rawValue {
                 case ARM_SFT_LSL.rawValue...ARM_SFT_RRX.rawValue:
@@ -181,7 +181,7 @@ extension ArmInstruction: OperandContainer {
                 }
             }
         }
-        
+
         /// Instruction's operand referring to memory
         public struct Memory {
             /// Base register