Tang Primer 25k And JTAGSEL/BL616_jtagsel

[darkspr1te]

Sorry if i get terminology wrong, i know just enough about mcu's to be dangerous.
I am trying to understand the BL616_jtagsel/jtagsel code in the tp25k top.v
I am using a pipico ro2040 as my fpgacompanion and it works great up until commit 57a1e27 ("tc138k (#99)", 2026-03-13) where BL616_jtagsel was added and this results in black screen no boot on a default bl616 debugger+tp25k , this all the way up to current commits.
by default the bl6161 with sipeed debugger firmware has TX high and the .cst code adding the BL616_jtagsel has pull up 3.3v assigned to it.
Now i noticed that the input BL616_jtag is treated the same as the buttons i.e the are high when triggered , this results is the code in top.v not running. I also note that the companion firmware drives jtagsel (tx) high by default

If I change Bl616_jtagsel to !BL616_jtagsel then the system boots as expected, Companion works as expected and shorting bl616 tx to ground triggers a reset. Is not the expected behavior? i have not tried the companion software on my bl616 onboard as i dont want to loose the debugger and the current setup is very usable for me.

Is bl616_jtagsel and jtagsel one and the same ? should it not trigger low if both side are driving high normally? what is the purpose of bl616 if it differs from jtagsel ?

[vossstef]

@darkspr1te checked today Primer 25k using internal onboard BL616 companion firmware and it work's perfectly.

bl616_jtagsel is the input signal from BL616 GPIO output to signal to the core FPGA JTAG mode is needed
jtagsel is a virtual FPGA signal (NET_LOC "jtagseln" V_JTAGSELN;) that the core need to drive in HDL (by bl616_jtagsel) to do actualy switchover. After switchover SPI is dead and JTAG mode is active. This virtual signal can be driven by PLL, button or onboard BL616.

In case of ext MPU JTAG control (jtagsel) should be driven into JTAG mode (ext MPU is using differnt pins for SPI)

[darkspr1te]

"checked today Primer 25k using internal onboard BL616 companion firmware and it work's perfectly."
do you mean FPGA Companion or factory firmware (uart+debugger)

In my top.v the NET jtagseln is declared as a output and mentioned once below as a 'assign' and is not used elsewhere in the code. I may have to check other boards to see how they used it. This compares to bl616_jtagsel which is used in all main functions (reset, rom to ram, spi)

[vossstef]

@darkspr1te
maybe have a look here:
https://github.com/MiSTle-Dev/FPGA-Companion/blob/main/src/bl616/README.md

core:
output jtagseln,
input bl616_jtagsel,

output jtagseln is driving the virtual pin in the .cst file NET_LOC "jtagseln" V_JTAGSELN;
You can read in the Gowin Gowin Design Physical Constraints SUG935 chapter A.10.1 JTAGSEL_N Net Constraints

In case you power the Primer with a PC USB Port !!! (not a hub or AC/DC plug)
then the sipeed partner firmware with initialize the UART TX signal (re-use here as bl616_jtagsel) as '1'

In case of AC/DC / USB PD power feeding hub the partner firmware starts the companion firmware (if installed) and configure bl616_jtagsel to 0 or 1 (depending need SPI or JTAG )

There is also another dedicated firmware option that i lately added that unconditional always start the companion firmware independant of PC or AC/DC adapter detect.