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docs(dn):Ben dn 11-10-2024 (#294)
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src/design_notebooks/2024fall/zf2179.md

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I finished lab 2 this week, and review some basic verilog content like how to use clock to indicate when will the program start and how to assign output based on the what the input is.
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The verilog grammar struggle me for a while since I haven't touch it for the entire summer so I have to look up in the internet to check how to write the correct verilog code. Also, I spent some time with understanding what the question is asking for, and eventually I think I figure it out? Maybe.
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The verilog grammar struggle me for a while since I haven't touch it for the entire summer so I have to look up in the internet to check how to write the correct verilog code. Also, I spent some time with understanding what the question is asking for, and eventually I think I figure it out? Maybe.
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## week 6 of 11 October 2024
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Project work:
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* [onboarding lab 3](https://github.com/BenFeng666/onboarding-lab-3): working on it
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Working on lab 3, and had some issues with the testing process. And dicussed with Vito, he said the VM is too old and helped me set up my WSL instead. Unfortunately the WSL also doesn't work so Vito is trying to figure out the issue in WSL and hopefully it will work soon.

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