Docs(dn): Ghala Buarish 09/21/25 (#386)

* updated notebook

* design notebook

---------

Co-authored-by: Noahms12 <[email protected]>

Author: Ghqlq

src/design_notebooks/2025fall/gb2789.md

@@ -1,5 +1,6 @@
 Ghala's Design Notebook: Processor Design VIP
 -
+### Week1: 09/08/25 - 09/14/25
 ---
 ### 09/08/25 - 09/14/25
 - Attended the first meeting of the semester.
@@ -8,3 +9,14 @@ Ghala's Design Notebook: Processor Design VIP
 - Completed necessary downloads (Homebrew,CMake, Verilator). Didn't download VirtualBox because it says in the guide I don't need it if I have a macOS.
 - Downloaded VSCode and suggested add-ons.
 - Made a profile in HDLBits and completed “Getting Started” and “Verilog Language Basics”.
+
+### Week2: 09/15/25 - 09/21/25
+- Met with partner [Lucy Zheng](https://github.com/Tyjihn) to work on the RiSC-16 module Program Counter.
+- Solved the Vectors practice on HDLBits. 
+
+[RiSC-16 Project repository](https://github.com/Ghqlq/Processor-Design-Projects)
+
+My partner and I had different approach to write the PC module but very similar logic. However I am not sure how correct it is since there is no way to test it. We faced some difficulty with figuring out the logic of the module because it is unclear what are the given inputs and which operations should the PC do or not do.
+
+
+