docs(dn):Hongtai_Mar_20_2025 (#355)

Author: HongtaiDu

src/design_notebooks/2025spring/hd2609.md

@@ -19,3 +19,22 @@ Project Work:
   * I started to get familiar with the 16-bit chip project.
 
 This week was mostly spent on figuring out opcodes and diagrams in the pdf files of project. In this way, our team can meet next week and split works each person. Then we could work on verilog code of this project.
+
+## Week of 03 March 2025
+Project Work:
+  * I got the job to work on register file after group meeting. I started getting familiar with it.
+
+This week was mostly spent on figuring out register file functionality of the chip.
+
+## Week of 10 March 2025
+Project Work:
+  * I started working on verilog code of register file. It was unfinished since I have two midterms this week.
+  * I also found I misunderstood the register file, but the instructor help me make everything clear.
+
+This week was spent on clearifying my misunderstanding about register file via meeting on Thursday and bulding a frame of verilog code.
+
+## Week of 17 March 2025
+Project Work:
+  * I finished register file in verilog and updated it to out github [link](https://github.com/Noahms12/RiSC-16-project).
+
+This week was spent on coding the resigter file. In my team, each person works on different part of the chip. Since I finished register file, I will decide what to work on till next team meeting.