You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
Copy file name to clipboardexpand all lines: src/design_notebooks/2025spring/hd2609.md
+7
Original file line number
Diff line number
Diff line change
@@ -12,3 +12,10 @@ Project Work:
12
12
* I went through a few labs on the website to test if my verilog environment works on my laptop.
13
13
14
14
This week was mostly spent on setting up verilog on my computer. My teammates and I discussed together to find a time to meet together.
15
+
16
+
## Week of 24 February 2025
17
+
Project Work:
18
+
* I successfully set up the verilog environment on my laptop.
19
+
* I started to get familiar with the 16-bit chip project.
20
+
21
+
This week was mostly spent on figuring out opcodes and diagrams in the pdf files of project. In this way, our team can meet next week and split works each person. Then we could work on verilog code of this project.
0 commit comments