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arch: arm: cortex_m: Fix constraint on inline assembly for armv8-m.baseline
`mov` on armv8-m.baseline, when used with an immediate value is limited to registers `r0` to `r7`. `=r` tells the compiler any register can be used. `=l` needs to be used instead. Signed-off-by: Wilfried Chauveau <[email protected]>
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include/zephyr/arch/arm/asm_inline_gcc.h

Lines changed: 9 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,15 @@ static ALWAYS_INLINE unsigned int arch_irq_lock(void)
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"mrs %0, BASEPRI;"
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"msr BASEPRI_MAX, %1;"
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"isb;"
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: "=r"(key), "=r"(tmp)
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: "=r"(key),
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#if defined(CONFIG_ARMV8_M_BASELINE)
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/* armv8-m.baseline's mov is limited to registers r0-r7.
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* Let the compiler know we have this constraint on tmp.
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*/
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"=l"(tmp)
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#else
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"=r"(tmp)
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#endif
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: "i"(_EXC_IRQ_DEFAULT_PRIO)
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: "memory");
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#elif defined(CONFIG_ARMV7_R) || defined(CONFIG_AARCH32_ARMV8_R) \

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