drm/amdgpu: bounded mman.gtt_window_lock acquisition via gtt_lock_timeout_ms

Add a new module parameter `gtt_lock_timeout_ms` (default 0 =
unbounded, byte-identical to the current mutex_lock() behaviour) that
caps the wait time for `adev->mman.gtt_window_lock` in the three
amdgpu_ttm.c paths that take it:

  - amdgpu_ttm_copy_mem_to_mem()    (SDMA buffer<->buffer copy)
  - amdgpu_ttm_clear_buffer()       (SDMA buffer clear/wipe)
  - amdgpu_fill_buffer()            (SDMA buffer fill)

When `gtt_lock_timeout_ms > 0`, the helper `amdgpu_ttm_lock_gtt_window()`
replaces the unbounded `mutex_lock()` with a trylock-and-sleep loop
bounded by a wall-clock deadline.  On timeout the helper returns
-ETIME so the caller fails fast instead of parking on a wedged SDMA
ring.  Values below 100 ms are clamped up to 100 ms to avoid
mis-configurations turning the lock-acquisition path into a fail-only
path.  Pending signals are propagated as -ERESTARTSYS.

The default of 0 preserves stock behaviour byte-identically: the
helper degrades to a plain `mutex_lock()` and returns 0.  This avoids
any behaviour change for users who do not opt in.

## Motivation

In multi-tenant HIP/AMDGPU serving workloads, a single wedged SDMA
ring can park every caller of amdgpu_ttm_copy_mem_to_mem() /
amdgpu_ttm_clear_buffer() / amdgpu_fill_buffer() on the global
`gtt_window_lock` mutex for minutes-plus while a single in-flight
copy waits for the ring.  The hold time is bounded only by the
SDMA recovery path (which itself may need on the order of tens of
seconds).  The legacy unbounded mutex_lock() then converts the SDMA
hang into a system-wide GTT-window stall affecting all VRAM-touching
ioctls from every tenant on the device.

`gtt_lock_timeout_ms` lets operators opt the GTT window contention
path into a bounded-wait failure mode (return -ETIME) so the higher-
level survival policy can choose whether to retry, re-queue, or
surface the error to the application.

## Test plan

- gtt_lock_timeout_ms unset / 0: stock behaviour, all existing tests
  pass byte-identically.
- gtt_lock_timeout_ms=4000: under multi-tenant SDMA load, observed
  ~4 second worst-case wait on the lock (matching the configured
  deadline), with -ETIME propagated back to the caller cleanly.

Reviewers may suggest using mutex_lock_killable_timeout() if
preferred over the explicit trylock-and-sleep loop; the current form
keeps the dependency surface minimal (no API additions).

Signed-off-by: chun-wan <chun-wan@users.noreply.github.com>

Author: chun-wan

drivers/gpu/drm/amd/amdgpu/amdgpu.h

@@ -275,6 +275,7 @@ extern int amdgpu_rebar;
 extern int amdgpu_wbrf;
 extern int amdgpu_user_queue;
 extern int amdgpu_ptl;
+extern int amdgpu_gtt_lock_timeout_ms;
 
 #define AMDGPU_VM_MAX_NUM_CTX			4096
 #define AMDGPU_SG_THRESHOLD			(256*1024*1024)

drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

@@ -1157,6 +1157,32 @@ module_param_named(user_queue, amdgpu_user_queue, int, 0444);
 MODULE_PARM_DESC(ptl, "Enable PTL (-1 = auto, 0 = disable (default), 1 = enable, 2 = permanently disable)");
 module_param_named(ptl, amdgpu_ptl, int, 0444);
 
+/**
+ * DOC: gtt_lock_timeout_ms (int)
+ *
+ * Maximum milliseconds to wait acquiring `mman.gtt_window_lock` in
+ * amdgpu_ttm_copy_mem_to_mem(), amdgpu_ttm_clear_buffer() and
+ * amdgpu_fill_buffer() before returning -ETIME.
+ *
+ * Default 0 keeps the historical unbounded mutex_lock() behaviour.
+ * Any positive value converts the acquisition to a bounded
+ * trylock-and-sleep loop, returning -ETIME at the deadline so the
+ * caller can fail fast instead of parking on a wedged ring/queue.
+ * Values below 100 ms are clamped up to 100 ms to avoid mis-
+ * configurations turning the GTT window contention path into a
+ * fail-only path.
+ *
+ * Validated under multi-tenant HIP/AMDGPU serving load where SDMA
+ * ring stalls were observed to park the GTT-window holder for
+ * minutes-plus.  With gtt_lock_timeout_ms=4000 the callers exit
+ * with -ETIME and the higher-level survival policy decides whether
+ * to retry, re-queue, or surface the error to the application.
+ */
+int amdgpu_gtt_lock_timeout_ms;
+MODULE_PARM_DESC(gtt_lock_timeout_ms,
+	"Max ms to wait on mman.gtt_window_lock acquisition before returning -ETIME (default 0 = unbounded mutex_lock)");
+module_param_named(gtt_lock_timeout_ms, amdgpu_gtt_lock_timeout_ms, int, 0644);
+
 /* These devices are not supported by amdgpu.
  * They are supported by the mach64, r128, radeon drivers
  */

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

@@ -307,6 +307,51 @@ static int amdgpu_ttm_map_buffer(struct ttm_buffer_object *bo,
  * move and different for a BO to BO copy.
  *
  */
+/*
+ * amdgpu_ttm_lock_gtt_window - bounded acquire of mman.gtt_window_lock
+ * @adev: amdgpu device whose mman.gtt_window_lock to acquire
+ *
+ * If the gtt_lock_timeout_ms module parameter is 0 (the default),
+ * this function degrades to a plain mutex_lock(), preserving the
+ * historical behaviour byte-identically.
+ *
+ * If gtt_lock_timeout_ms is positive, the lock is acquired via a
+ * trylock-and-msleep loop bounded by a wall-clock deadline.  On
+ * timeout the helper returns -ETIME so the caller can fail fast.
+ * Values below 100 ms are clamped up to 100 ms.  Pending signals
+ * are propagated as -ERESTARTSYS.
+ *
+ * Return: 0 on lock acquired, -ETIME on deadline, -ERESTARTSYS on
+ * signal.  Callers must call mutex_unlock(&adev->mman.gtt_window_lock)
+ * on success.
+ */
+static int amdgpu_ttm_lock_gtt_window(struct amdgpu_device *adev)
+{
+	int timeout_ms = READ_ONCE(amdgpu_gtt_lock_timeout_ms);
+	ktime_t deadline;
+
+	if (timeout_ms <= 0) {
+		mutex_lock(&adev->mman.gtt_window_lock);
+		return 0;
+	}
+
+	if (timeout_ms < 100)
+		timeout_ms = 100;
+
+	if (mutex_trylock(&adev->mman.gtt_window_lock))
+		return 0;
+
+	deadline = ktime_add_ms(ktime_get(), timeout_ms);
+	while (!ktime_after(ktime_get(), deadline)) {
+		if (mutex_trylock(&adev->mman.gtt_window_lock))
+			return 0;
+		if (schedule_timeout_interruptible(msecs_to_jiffies(1)) ||
+		    signal_pending(current))
+			return -ERESTARTSYS;
+	}
+	return -ETIME;
+}
+
 __attribute__((nonnull))
 static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 				      const struct amdgpu_copy_mem *src,
@@ -331,7 +376,10 @@ static int amdgpu_ttm_copy_mem_to_mem(struct amdgpu_device *adev,
 	amdgpu_res_first(src->mem, src->offset, size, &src_mm);
 	amdgpu_res_first(dst->mem, dst->offset, size, &dst_mm);
 
-	mutex_lock(&adev->mman.gtt_window_lock);
+	r = amdgpu_ttm_lock_gtt_window(adev);
+	if (r)
+		return r;
+
 	while (src_mm.remaining) {
 		uint64_t from, to, cur_size, tiling_flags;
 		uint32_t num_type, data_format, max_com, write_compress_disable;
@@ -2838,7 +2886,10 @@ int amdgpu_ttm_clear_buffer(struct amdgpu_bo *bo,
 
 	amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &cursor);
 
-	mutex_lock(&adev->mman.gtt_window_lock);
+	r = amdgpu_ttm_lock_gtt_window(adev);
+	if (r)
+		return r;
+
 	while (cursor.remaining) {
 		struct dma_fence *next = NULL;
 		u64 size;
@@ -2892,7 +2943,10 @@ int amdgpu_fill_buffer(struct amdgpu_bo *bo,
 
 	amdgpu_res_first(bo->tbo.resource, 0, amdgpu_bo_size(bo), &dst);
 
-	mutex_lock(&adev->mman.gtt_window_lock);
+	r = amdgpu_ttm_lock_gtt_window(adev);
+	if (r)
+		return r;
+
 	while (dst.remaining) {
 		struct dma_fence *next;
 		uint64_t cur_size, to;