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| 1 | +.. _key-writer-lite-label: |
| 2 | + |
| 3 | +############### |
| 4 | +Key Writer Lite |
| 5 | +############### |
| 6 | + |
| 7 | +This OTP (One Time Programmable) key writer lite guide describes |
| 8 | +the procedure to be followed to populate customer keys in eFuses |
| 9 | +of the SoC. |
| 10 | + |
| 11 | +.. caution:: |
| 12 | + |
| 13 | + Once the SoC eFuses are programmed using keywriter lite, |
| 14 | + there is no going back. This action of burning the OTP fields is |
| 15 | + irreversible. |
| 16 | + |
| 17 | +**High Security (HS) Device Sub-types** |
| 18 | + |
| 19 | +*HS-FS (High Security - Field Securable)*: |
| 20 | +Device type before customer keys are programmed (the state in which |
| 21 | +the device leaves TI factory). In this state, device protects the |
| 22 | +ROM code, TI keys and certain security peripherals. HS-FS devices do |
| 23 | +not enforce secure boot process. |
| 24 | + |
| 25 | +*HS-SE Lite (High Security - Security Enforced Lite)*: |
| 26 | +Device type after only the customer public key hashes are programmed. |
| 27 | +HS-SE Lite devices enforce secure boot (without encryption). |
| 28 | + |
| 29 | +**HS-FS to HS-SE Lite Conversion** |
| 30 | + |
| 31 | +In order to convert a HS-FS device to HS-SE Lite device, one has to |
| 32 | +program the customer root key (optionally backup key) on the target |
| 33 | +device, using OTP Keywriter Lite. |
| 34 | + |
| 35 | +Customer key information is put in a structured format to create a |
| 36 | +binary blob (Uboot key writer lite structure). |
| 37 | + |
| 38 | +**Uboot Key Writer Lite Structure** |
| 39 | + |
| 40 | +.. code-block:: c |
| 41 | +
|
| 42 | + struct fuse_otp_header { |
| 43 | + uint32_t version_info; |
| 44 | + uint32_t fuse_mode; |
| 45 | + } __attribute__((packed)); |
| 46 | +
|
| 47 | + struct fuse_otp { |
| 48 | + struct fuse_otp_header fuse_otp_hdr; |
| 49 | + struct fuse_otp_blob fuse_otp_blb; |
| 50 | + } __attribute__((packed)); |
| 51 | +
|
| 52 | +* version_info : Customer can use this field to denote the version of uboot fuse programming. |
| 53 | +* fuse_mode : Fuse mode with value 0x00009045. |
| 54 | + |
| 55 | +The overall fuse_otp structure is shown below: |
| 56 | + |
| 57 | +.. Image:: /images/Uboot_fuse_writebuff_OTP_structure.png |
| 58 | + |
| 59 | +.. attention:: |
| 60 | + |
| 61 | + For information on the fuse_otp_blob structure, |
| 62 | + visit `keywriter_lite_cert_gen_procedure`_. |
| 63 | + |
| 64 | +.. _keywriter_lite_cert_gen_procedure: https://software-dl.ti.com/tisci/esd/latest/6_topic_user_guides/key_writer_lite.html |
| 65 | + |
| 66 | +**Generate the Binary Blob** |
| 67 | + |
| 68 | +Generate the binary blob based out of Uboot Key Writer Lite |
| 69 | +structure by populating the structure and extracting the |
| 70 | +.data section to a bin file and copy it to SD card. |
| 71 | + |
| 72 | +**Typical Key Writer Lite Flow** |
| 73 | + |
| 74 | +A typical flow to do OTP key writer lite is as follows: |
| 75 | + |
| 76 | +#. Addr 0x82000000 is the dedicated address to store the generated |
| 77 | + key writer lite binary blob. Clear out 1Kb of memory starting |
| 78 | + from 0x82000000: |
| 79 | + |
| 80 | + .. code-block:: text |
| 81 | +
|
| 82 | + => mw 0x82000000 0 0x400 |
| 83 | +
|
| 84 | +#. The binary blob copied to SD card can be loaded into memory using |
| 85 | + commands like: |
| 86 | + |
| 87 | + .. code-block:: text |
| 88 | +
|
| 89 | + => fatload mmc 1:1 0x82000000 key_writer_lite_blob.bin |
| 90 | +
|
| 91 | +#. If the cache has to be flushed, then enable the config |
| 92 | + CONFIG_CMD_CACHE=y in <path-to-tisdk>/board-support/<ti-u-boot-source-code>/configs/<device_defconfig> |
| 93 | + and re-build uboot. |
| 94 | + |
| 95 | + .. code-block:: text |
| 96 | +
|
| 97 | + => dcache flush |
| 98 | + => md 0x82000000 |
| 99 | +
|
| 100 | +#. Efuse modification requires a voltage to be applied on a specific pin (Vpp) during the programming. |
| 101 | + To program the efuses, the Vpp pin on the System-on-Chip (SoC) must be powered at 1.8V. It is the |
| 102 | + responsibility of the SoC user to design a suitable circuit that enables the Vpp pin to be powered. |
| 103 | + |
| 104 | + Texas Instruments (TI) EVMs feature an I2C-based IO expander, which has one of its IO pins |
| 105 | + connected to the SoC's Vpp pin. The software required to control the power to the Vpp pin depends |
| 106 | + on the specific circuit implementation. |
| 107 | + |
| 108 | + In the case of TI AM62L PROC181E1 EVMs, an I2C driver is necessary to send command packets to the IO expander, |
| 109 | + which then toggles the IO pin connected to the Vpp pin, thereby controlling the power supply to the pin. |
| 110 | + On TI EVM, Vpp pin can be turned on using the below commands: |
| 111 | + |
| 112 | + .. rubric:: Select i2c bus 2, as chip 22 is connected to it, and probe the chip: |
| 113 | + |
| 114 | + .. code-block:: text |
| 115 | +
|
| 116 | + => i2c dev 2 |
| 117 | + => i2c probe 22 |
| 118 | +
|
| 119 | + .. rubric:: To turn off Vpp: |
| 120 | + |
| 121 | + .. code-block:: text |
| 122 | +
|
| 123 | + => i2c mw 0x22 0x04 0x00 |
| 124 | +
|
| 125 | + .. rubric:: To configure Vpp (port 04) as output: |
| 126 | + |
| 127 | + .. code-block:: text |
| 128 | +
|
| 129 | + => i2c mw 0x22 0xC 0xEF |
| 130 | +
|
| 131 | + .. rubric:: To turn on Vpp: |
| 132 | + |
| 133 | + .. code-block:: text |
| 134 | +
|
| 135 | + => i2c mw 0x22 0x04 0x10 |
| 136 | +
|
| 137 | +#. Call fuse writebuff sub-system command with the address 0x82000000: |
| 138 | + |
| 139 | + .. code-block:: text |
| 140 | +
|
| 141 | + => fuse writebuff -y 0x82000000 |
| 142 | +
|
| 143 | +#. Turn off Vpp after programming is successful: |
| 144 | + |
| 145 | + .. code-block:: text |
| 146 | +
|
| 147 | + => i2c mw 0x22 0x04 0x00 |
| 148 | +
|
| 149 | +.. note:: |
| 150 | + |
| 151 | + Changes made to efuses, by programming them, take effect (like become |
| 152 | + visible in Memory-Mapped Registers (MMRs), device type change etc.) |
| 153 | + after a complete System-on-Chip (SoC) power cycle. |
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