Fmax and latency on PicoRV32

[SyedFahimuddinAlavi]

I have modified the Pico RISC-V core with crypto algorithms and want to get updated Fmax. Is there any way to calculate the latency introduced without running on FPGA using any example or test in simulation?

[KrystalDelusion]

It may be out of date, but the fmax tables in the readme were apparently generated with the makefile in scripts/vivado/Makefile?