@@ -89,9 +89,36 @@ void tud_cdc_rx_cb(uint8_t itf) {
8989}
9090#endif // CIRCUITPY_USB_DEVICE
9191
92+
93+ #if defined(CONFIG_IDF_TARGET_ESP32S3 )
94+ // TEMPORARY WORKAROUND for https://github.com/hathach/tinyusb/issues/2943
95+ #include "soc/rtc_cntl_struct.h"
96+ #include "soc/usb_wrap_struct.h"
97+ #endif
98+
9299void init_usb_hardware (void ) {
93100 #if CIRCUITPY_USB_DEVICE
94101 // Configure USB PHY
102+
103+ // TEMPORARY WORKAROUND for https://github.com/hathach/tinyusb/issues/2943
104+ #if defined(CONFIG_IDF_TARGET_ESP32S3 )
105+
106+ (void )phy_hdl ;
107+ periph_module_reset (PERIPH_USB_MODULE );
108+ periph_module_enable (PERIPH_USB_MODULE );
109+
110+ USB_WRAP .otg_conf .pad_enable = 1 ;
111+ // USB_OTG use internal PHY
112+ USB_WRAP .otg_conf .phy_sel = 0 ;
113+ // phy_sel is controlled by the following register value
114+ RTCCNTL .usb_conf .sw_hw_usb_phy_sel = 1 ;
115+ // phy_sel=sw_usb_phy_sel=1, USB_OTG is connected with internal PHY
116+ RTCCNTL .usb_conf .sw_usb_phy_sel = 1 ;
117+
118+ gpio_set_drive_capability (USBPHY_DM_NUM , GPIO_DRIVE_CAP_3 );
119+ gpio_set_drive_capability (USBPHY_DP_NUM , GPIO_DRIVE_CAP_3 );
120+ #else
121+
95122 usb_phy_config_t phy_conf = {
96123 .controller = USB_PHY_CTRL_OTG ,
97124 .target = USB_PHY_TARGET_INT ,
@@ -104,6 +131,7 @@ void init_usb_hardware(void) {
104131 #endif
105132 };
106133 usb_new_phy (& phy_conf , & phy_hdl );
134+ #endif
107135
108136 // Pin the USB task to the same core as CircuitPython. This way we leave
109137 // the other core for networking.
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