arty_a7: add missing constraints

Author: slan

nmigen_boards/arty_a7.py

@@ -204,7 +204,11 @@ def toolchain_prepare(self, fragment, name, **kwargs):
                 "write_cfgmem -force -format bin -interface spix4 -size 16 "
                 "-loadbit \"up 0x0 {name}.bit\" -file {name}.bin".format(name=name),
             "add_constraints":
-                "set_property INTERNAL_VREF 0.675 [get_iobanks 34]"
+                """
+                set_property INTERNAL_VREF 0.675 [get_iobanks 34]
+                set_property CFGBVS VCCO [current_design]
+                set_property CONFIG_VOLTAGE 3.3 [current_design]
+                """
         }
         return super().toolchain_prepare(fragment, name, **overrides, **kwargs)