projects/ad7405fmc:Add READMEs

Signed-off-by: Capota Bianca <[email protected]>

Author: BCapota

projects/ad7405_fmc/README.md

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+# AD7405-FMC HDL Project
+
+- Evaluation board product page: [EVAL-AD7405](https://www.analog.com/eval-ad7405)
+- System documentation: TO BE ADDED
+- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad7405_fmc/index.html
+
+## Supported parts
+
+| Part name                                   | Description                                            |
+|---------------------------------------------|--------------------------------------------------------|
+| [AD7405](https://www.analog.com/ad7405)     | 16-Bit, Isolated Sigma-Delta Modulator, LVDS Interface |
+| [AD7403](https://www.analog.com/ad7403)     | 16-Bit, Isolated Sigma-Delta Modulator                 |
+
+## Building the project
+
+Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/ad7405_fmc/Readme.md

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+# AD7405-FMC/ZED HDL Project
+
+## Building the project
+
+The parameter configurable through the `make` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration.
+
+```
+cd projects/ad7405_fmc/zed
+make
+```
+
+The overwritable parameter from the environment:
+
+- LVDS_CMOS_N - specific to the type of the data and clock signals
+  - 0 - Single-ended data and clock signals (default)
+  - 1 - Differential data and clock signals