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project: Add xcvr_wizard project
The project is designed to automatically generate xcvr parameters for specific configurations. Signed-off-by: Elena-Hadarau_adi <[email protected]>
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‎projects/xcvr_wizard/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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include ../scripts/project-toplevel.mk

‎projects/xcvr_wizard/common/xcvr_wizard_bd.tcl

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###############################################################################
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## Copyright (C) 2018-2024 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################

‎projects/xcvr_wizard/kc705/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := xcvr_wizard_kc705
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include ../../scripts/project-xilinx.mk

‎projects/xcvr_wizard/kc705/system_bd.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set LANE_RATE $ad_project_params(LANE_RATE) ; # [gbps]
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set PLL_TYPE $ad_project_params(PLL_TYPE) ; # [CPLL/QPLL]
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set REF_CLK $ad_project_params(REF_CLK) ; # [MHz]
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source $ad_hdl_dir/projects/scripts/gtwizard_generator.tcl
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get_diff_params $LANE_RATE $PLL_TYPE $REF_CLK

‎projects/xcvr_wizard/kc705/system_project.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source ../../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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# Parameter description:
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# LANE_RATE: Value of lane rate [gbps]
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# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
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# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL]
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adi_project xcvr_wizard_kc705 0 [list \
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LANE_RATE [get_env_param LANE_RATE 10 ] \
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REF_CLK [get_env_param REF_CLK 500 ] \
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PLL_TYPE [get_env_param PLL_TYPE QPLL ] \
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]

‎projects/xcvr_wizard/kcu105/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := xcvr_wizard_kcu105
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include ../../scripts/project-xilinx.mk

‎projects/xcvr_wizard/kcu105/system_bd.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set LANE_RATE $ad_project_params(LANE_RATE) ; # [gbps]
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set PLL_TYPE $ad_project_params(PLL_TYPE) ; # [CPLL/QPLL0/QPLL1]
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set REF_CLK $ad_project_params(REF_CLK) ; # [MHz]
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source $ad_hdl_dir/projects/scripts/gtwizard_generator.tcl
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get_diff_params $LANE_RATE $PLL_TYPE $REF_CLK

‎projects/xcvr_wizard/kcu105/system_project.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source ../../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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# Parameter description:
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# LANE_RATE: Value of lane rate [gbps]
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# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
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# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
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adi_project xcvr_wizard_kcu105 0 [list \
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LANE_RATE [get_env_param LANE_RATE 10 ] \
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REF_CLK [get_env_param REF_CLK 500 ] \
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PLL_TYPE [get_env_param PLL_TYPE QPLL0 ] \
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]

‎projects/xcvr_wizard/vcu118/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := xcvr_wizard_vcu118
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include ../../scripts/project-xilinx.mk

‎projects/xcvr_wizard/vcu118/system_bd.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set LANE_RATE $ad_project_params(LANE_RATE) ; # [gbps]
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set PLL_TYPE $ad_project_params(PLL_TYPE) ; # [CPLL/QPLL0/QPLL1]
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set REF_CLK $ad_project_params(REF_CLK) ; # [MHz]
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source $ad_hdl_dir/projects/scripts/gtwizard_generator.tcl
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get_diff_params $LANE_RATE $PLL_TYPE $REF_CLK

‎projects/xcvr_wizard/vcu118/system_project.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source ../../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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# Parameter description:
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# LANE_RATE: Value of lane rate [gbps]
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# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
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# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
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adi_project xcvr_wizard_vcu118 0 [list \
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LANE_RATE [get_env_param LANE_RATE 10 ] \
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REF_CLK [get_env_param REF_CLK 500 ] \
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PLL_TYPE [get_env_param PLL_TYPE QPLL0 ] \
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]

‎projects/xcvr_wizard/zc706/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := xcvr_wizard_zc706
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include ../../scripts/project-xilinx.mk

‎projects/xcvr_wizard/zc706/system_bd.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set LANE_RATE $ad_project_params(LANE_RATE) ; # [gbps]
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set PLL_TYPE $ad_project_params(PLL_TYPE) ; # [CPLL/QPLL]
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set REF_CLK $ad_project_params(REF_CLK) ; # [MHz]
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source $ad_hdl_dir/projects/scripts/gtwizard_generator.tcl
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get_diff_params $LANE_RATE $PLL_TYPE $REF_CLK

‎projects/xcvr_wizard/zc706/system_project.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source ../../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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# Parameter description:
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# LANE_RATE: Value of lane rate [gbps]
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# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
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# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL]
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adi_project xcvr_wizard_zc706 0 [list \
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LANE_RATE [get_env_param LANE_RATE 10 ] \
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REF_CLK [get_env_param REF_CLK 500 ] \
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PLL_TYPE [get_env_param PLL_TYPE QPLL ] \
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]

‎projects/xcvr_wizard/zcu102/Makefile

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####################################################################################
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## Copyright (c) 2018 - 2023 Analog Devices, Inc.
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### SPDX short identifier: BSD-1-Clause
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## Auto-generated, do not modify!
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####################################################################################
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PROJECT_NAME := xcvr_wizard_zcu102
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include ../../scripts/project-xilinx.mk

‎projects/xcvr_wizard/zcu102/system_bd.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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set LANE_RATE $ad_project_params(LANE_RATE) ; # [gbps]
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set PLL_TYPE $ad_project_params(PLL_TYPE) ; # [CPLL/QPLL0/QPLL1]
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set REF_CLK $ad_project_params(REF_CLK) ; # [MHz]
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source $ad_hdl_dir/projects/scripts/gtwizard_generator.tcl
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get_diff_params $LANE_RATE $PLL_TYPE $REF_CLK

‎projects/xcvr_wizard/zcu102/system_project.tcl

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###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source ../../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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# Parameter description:
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# LANE_RATE: Value of lane rate [gbps]
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# REF_CLK: Value of the reference clock [MHz] (usually LANE_RATE/20 or LANE_RATE/40)
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# PLL_TYPE: The PLL used for driving the link [CPLL/QPLL0/QPLL1]
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adi_project xcvr_wizard_zcu102 0 [list \
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LANE_RATE [get_env_param LANE_RATE 10 ] \
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REF_CLK [get_env_param REF_CLK 500 ] \
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PLL_TYPE [get_env_param PLL_TYPE QPLL0 ] \
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]

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