projects/ad411x_ad717x: Add READMEs

Signed-off-by: Capota Bianca <[email protected]>

Author: BCapota

projects/ad411x_ad717x/README.md

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+# AD411X-AD717X HDL Project
+
+- Evaluation boards product page:
+  - [EVAL-AD4111](https://www.analog.com/eval-ad4111)
+  - [EVAL-AD4112](https://www.analog.com/eval-ad4112)
+  - [EVAL-AD4114](https://www.analog.com/eval-ad4114)
+  - [EVAL-AD4115](https://www.analog.com/eval-ad4115)
+  - [EVAL-AD4116](https://www.analog.com/eval-ad4116)
+  - [EVAL-AD7172-2](https://www.analog.com/ad7172-2)
+  - [EVAL-AD7172-4](https://www.analog.com/ad7172-4)
+  - [EVAL-AD7173-8](https://www.analog.com/ad7173-8)
+  - [EVAL-AD7175-2](https://www.analog.com/ad7175-2)
+  - [EVAL-AD7175-8](https://www.analog.com/ad7175-8)
+  - [EVAL-AD7176-2](https://www.analog.com/ad7176-2)
+  - [EVAL-AD7177-2](https://www.analog.com/ad7177-2)
+- System documentation: https://wiki.analog.com/resources/tools-software/product-support-software/ad717x_ad411x_mbed_example
+- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad411x_ad717x/index.html
+
+## Supported parts
+
+| Part name                                   | Description                                                                                          |
+|---------------------------------------------|------------------------------------------------------------------------------------------------------|
+| [AD4111](https://www.analog.com/ad4111)     | Single Supply, 24-Bit, Sigma-Delta ADC with ±10 V and 0 mA to 20 mA Inputs, Open Wire Detection      |
+| [AD4112](https://www.analog.com/ad4112)     | Single Supply, 24-Bit, Sigma-Delta ADC with ±10 V and 0 mA to 20 mA Inputs                           |
+| [AD4114](https://www.analog.com/ad4114)     | Single Supply, Multichannel, 31.25 kSPS, 24-Bit, Sigma-Delta ADC with ±10 V Inputs                   |
+| [AD4115](https://www.analog.com/ad4115)     | Single-Supply, Multichannel, 125 kSPS, 24-Bit, Sigma-Delta ADC with ±10 V Inputs                     |
+| [AD4116](https://www.analog.com/ad4116)     | Single Supply, 24-Bit, Sigma-Delta ADC with ±10 V, 10 MΩ Inputs and Buffered Low Level Inputs        |
+| [AD7172-2](https://www.analog.com/ad7172-2) | Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers                        |
+| [AD7172-4](https://www.analog.com/ad7172-4) | Low Power,  with 4- or 8-channel, 24-bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers |
+| [AD7173-8](https://www.analog.com/ad7173-8) | Low Power, 8-/16-Channel, 31.25 kSPS, 24-Bit, Highly Integrated Sigma-Delta ADC                      |
+| [AD7175-2](https://www.analog.com/ad7175-2) | 24-Bit, 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers                  |
+| [AD7175-8](https://www.analog.com/ad7175-8) | 24-Bit, 8-/16-Channel, 250 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers                      |
+| [AD7176-2](https://www.analog.com/ad7176-2) | 24-Bit, 250 kSPS Sigma Delta ADC with 20 µs Settling                                                 |
+| [AD7177-2](https://www.analog.com/ad7177-2) | 32-Bit, 10 kSPS, Sigma-Delta ADC with 100 µs Settling and True Rail-to-Rail Buffers                  |
+
+## Building the project
+
+Please enter the folder for the FPGA carrier you want to use and read the README.md.

projects/ad411x_ad717x/de10nano/README.md

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+# AD411X-AD717X/DE10NANO HDL Project
+
+## Building the project
+
+```
+cd projects/ad411x_ad717x/de10nano
+make
+```