From 007976f973591c0461b13baf8561810b2b066bac Mon Sep 17 00:00:00 2001 From: Capota Bianca Date: Wed, 16 Apr 2025 15:41:24 +0300 Subject: [PATCH 1/2] docs/projects/adrv9026:Add supported devices Signed-off-by: Capota Bianca --- docs/projects/adrv9026/index.rst | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/docs/projects/adrv9026/index.rst b/docs/projects/adrv9026/index.rst index 8f12d3cfea1..36e49632774 100644 --- a/docs/projects/adrv9026/index.rst +++ b/docs/projects/adrv9026/index.rst @@ -17,6 +17,13 @@ Supported boards - :adi:`ADRV9026/ADRV9029 ` +Supported devices +------------------------------------------------------------------------------- + +- :adi:`ADRV9026` +- :adi:`ADRV9029` +- ADRV9025 (OBSOLETE) + Supported carriers ------------------------------------------------------------------------------- @@ -30,12 +37,12 @@ Supported carriers * - :adi:`ADRV9026/ADRV9029 ` - :intel:`A10SoC ` - FMCA - * - - - :xilinx:`ZCU102` - - FMC HPC1 * - - :xilinx:`VCU118` - FMCP + * - + - :xilinx:`ZCU102` + - FMC HPC1 Block design ------------------------------------------------------------------------------- From 3e6f779683350437445b3464dd2a44f7c4aac394 Mon Sep 17 00:00:00 2001 From: Capota Bianca Date: Wed, 16 Apr 2025 15:25:18 +0300 Subject: [PATCH 2/2] projects/adrv9026:Add READMEs Signed-off-by: Capota Bianca --- projects/adrv9026/README.md | 16 ++++++++++++ projects/adrv9026/a10soc/README.md | 10 ++++++++ projects/adrv9026/vcu118/README.md | 41 ++++++++++++++++++++++++++++++ projects/adrv9026/zcu102/README.md | 41 ++++++++++++++++++++++++++++++ 4 files changed, 108 insertions(+) create mode 100644 projects/adrv9026/README.md create mode 100644 projects/adrv9026/a10soc/README.md create mode 100644 projects/adrv9026/vcu118/README.md create mode 100644 projects/adrv9026/zcu102/README.md diff --git a/projects/adrv9026/README.md b/projects/adrv9026/README.md new file mode 100644 index 00000000000..89dcd44bf79 --- /dev/null +++ b/projects/adrv9026/README.md @@ -0,0 +1,16 @@ +# ADRV9026 HDL Project + +- Evaluation board product page: [EVAL-ADRV9026/ADRV9029](https://www.analog.com/eval-adrv9026) +- System documentation: https://wiki.analog.com/resources/eval/user-guides/adrv9026/quickstart +- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/adrv9026/index.html + +## Supported parts + +| Part name | Description | +|---------------------------------------------|-----------------------------------------------------------| +| [ADRV9026](https://www.analog.com/ADRV9026) | Integrated, Quad RF Transceiver with Observation Path | +| [ADRV9029](https://www.analog.com/ADRV9029) | Integrated, Quad RF Transceiver with Observation Path | + +## Building the project + +Please enter the folder for the FPGA carrier you want to use and read the README.md. \ No newline at end of file diff --git a/projects/adrv9026/a10soc/README.md b/projects/adrv9026/a10soc/README.md new file mode 100644 index 00000000000..9014ce96a5b --- /dev/null +++ b/projects/adrv9026/a10soc/README.md @@ -0,0 +1,10 @@ +# ADRV9026/A10SOC HDL Project + +## Building the project + +``` +cd projects/adrv9026/a10soc +make +``` + +Corresponding device tree: [socfpga_arria10_socdk_adrv9025.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_socdk_adrv9025.dts) \ No newline at end of file diff --git a/projects/adrv9026/vcu118/README.md b/projects/adrv9026/vcu118/README.md new file mode 100644 index 00000000000..91859d3eecb --- /dev/null +++ b/projects/adrv9026/vcu118/README.md @@ -0,0 +1,41 @@ +# ADRV9026/VCU118 HDL Project + +## Building the project + +``` +cd projects/adrv9026/vcu118 +make +``` + +All of the RX/TX link modes can be found in the [ADRV9026 data sheet](https://www.analog.com/media/radioverse-adrv9026/adrv9026.pdf). We offer support for only a few of them. + +The overwritable parameters from the environment: + +- JESD_MODE - link layer encoder mode used; + - 8B10B - 8b10b link layer defined in JESD204B, uses ADI IP as Physical layer + - 64B66B - 64b66b link layer defined in JESD204C, uses Xilinx IP as Physical layer +- [RX/TX]_LANE_RATE - lane rate of the [RX/TX] link (RX: MxFE to FPGA/TX: FPGA to MxFE) +- [RX/TX]_NUM_LINKS - [RX/TX] number of links, which matches the number of MxFE devices +- [RX/TX]_JESD_M - [RX/TX] number of converters per link +- [RX/TX]_JESD_L - [RX/TX] number of lanes per link +- [RX/TX]_JESD_S - [RX/TX] number of samples per converter per frame + +### Example configurations + +#### JESD204B subclass 1, TX mode 17, RX mode 18 (default) + +This specific command is equivalent to running `make` only: + +``` +make JESD_MODE=8B10B \ +RX_LANE_RATE=9.83 \ +TX_LANE_RATE=9.83 \ +RX_JESD_M=8 \ +RX_JESD_L=4 \ +RX_JESD_S=1 \ +TX_JESD_M=8 \ +TX_JESD_L=4 \ +TX_JESD_S=1 +``` + +Corresponding device tree: [vcu118_adrv9025.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/microblaze/boot/dts/vcu118_adrv9025.dts) \ No newline at end of file diff --git a/projects/adrv9026/zcu102/README.md b/projects/adrv9026/zcu102/README.md new file mode 100644 index 00000000000..b261703005f --- /dev/null +++ b/projects/adrv9026/zcu102/README.md @@ -0,0 +1,41 @@ +# ADRV9026/ZCU102 HDL Project + +## Building the project + +``` +cd projects/adrv9026/zcu102 +make +``` + +All of the RX/TX link modes can be found in the [ADRV9026 data sheet](https://www.analog.com/media/radioverse-adrv9026/adrv9026.pdf). We offer support for only a few of them. + +The overwritable parameters from the environment: + +- JESD_MODE - link layer encoder mode used; + - 8B10B - 8b10b link layer defined in JESD204B, uses ADI IP as Physical layer + - 64B66B - 64b66b link layer defined in JESD204C, uses Xilinx IP as Physical layer +- [RX/TX]_LANE_RATE - lane rate of the [RX/TX] link (RX: MxFE to FPGA/TX: FPGA to MxFE) +- [RX/TX]_NUM_LINKS - [RX/TX] number of links, which matches the number of MxFE devices +- [RX/TX]_JESD_M - [RX/TX] number of converters per link +- [RX/TX]_JESD_L - [RX/TX] number of lanes per link +- [RX/TX]_JESD_S - [RX/TX] number of samples per converter per frame + +### Example configurations + +#### JESD204B subclass 1, TX mode 17, RX mode 18 (default) + +This specific command is equivalent to running `make` only: + +``` +make JESD_MODE=8B10B \ +RX_LANE_RATE=9.83 \ +TX_LANE_RATE=9.83 \ +RX_JESD_M=8 \ +RX_JESD_L=4 \ +RX_JESD_S=1 \ +TX_JESD_M=8 \ +TX_JESD_L=4 \ +TX_JESD_S=1 +``` + +Corresponding device tree: [zynqmp-zcu102-rev10-adrv9025.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9025.dts) \ No newline at end of file