22 *
33 * Copyright (C) 2022-2023 Maxim Integrated Products, Inc. (now owned by
44 * Analog Devices, Inc.),
5- * Copyright (C) 2023-2024 Analog Devices, Inc.
5+ * Copyright (C) 2023-2026 Analog Devices, Inc.
66 *
77 * Licensed under the Apache License, Version 2.0 (the "License");
88 * you may not use this file except in compliance with the License.
3232#define MXC_CONVERSION_REQ_INTERRUPT 0X2
3333#define MXC_MONITOR_INTERRUPT 0X4
3434#define MXC_CONVERSION_SPEED_6MHZ 5847
35+ #define MXC_ADC_SRC_THRESHOLD_FREQ 24000000
3536// Mask for all Interrupt Enable Fields
3637#define ADC_IE_MASK \
3738 (MXC_F_ADC_REVA_INTR_DONE_IE | MXC_F_ADC_REVA_INTR_REF_READY_IE | \
@@ -52,9 +53,14 @@ volatile uint8_t flag; //indicates to irqhandler where to store data
5253
5354int MXC_ADC_RevA_Init (mxc_adc_reva_regs_t * adc )
5455{
55- //set adc frequency to work at approximately 6 MHZ
5656 //NOTE: cannot use RevA version because MCR registers must be set
57- MXC_ADC_SetConversionSpeed (MXC_CONVERSION_SPEED_6MHZ );
57+ if (SystemCoreClock < MXC_ADC_SRC_THRESHOLD_FREQ ) {
58+ //set adc frequency to work at maximum speed if SYS_CLK < 24MHZ
59+ MXC_ADC_SetConversionSpeed (PeripheralClock / (1024U * 2U ));
60+ } else {
61+ //set adc frequency to work at approximately 6 MHZ if SYS_CLK >= 24MHZ
62+ MXC_ADC_SetConversionSpeed (MXC_CONVERSION_SPEED_6MHZ );
63+ }
5864 //clear adc reference ready interrupt flag
5965 MXC_ADC_RevA_ClearFlags (adc , MXC_F_ADC_REVA_INTR_REF_READY_IF );
6066
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