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| 1 | +AD9434 no-OS driver |
| 2 | +=================== |
| 3 | + |
| 4 | +Supported Devices |
| 5 | +----------------- |
| 6 | + |
| 7 | +- :adi:`AD9434` |
| 8 | + |
| 9 | +Overview |
| 10 | +-------- |
| 11 | + |
| 12 | +The AD9434 is a high-performance 12-bit ADC designed for applications |
| 13 | +demanding fast conversion rates up to 500 MSPS. It integrates essential |
| 14 | +features such as a sample-and-hold circuit and voltage reference |
| 15 | +on-chip, ensuring comprehensive signal conversion. This ADC requires a |
| 16 | +1.8 V analog supply and uses a differential clock for optimal |
| 17 | +functionality. Its digital output is compatible with LVDS standards, |
| 18 | +supporting formats including twos complement, offset binary, or Gray |
| 19 | +code. Additionally, it features a data clock output for accurate data |
| 20 | +timing. Available in a 56-lead LFCSP, the AD9434 is suitable for |
| 21 | +industrial environments with temperatures ranging from -40°C to +85°C. |
| 22 | + |
| 23 | +Applications |
| 24 | +------------ |
| 25 | + |
| 26 | +- Wireless and wired broadband communications |
| 27 | +- Cable reverse path |
| 28 | +- Communications test equipment |
| 29 | +- Radar and satellite subsystems |
| 30 | +- Power amplifier linearization |
| 31 | + |
| 32 | +Operation Modes |
| 33 | +---------------- |
| 34 | + |
| 35 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 36 | +| Mode Name | Description | Configuration | Typical Use | |
| 37 | +| | | Bits | Case | |
| 38 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 39 | +| OUTPUT_MODE_E | Represents the | 0x0 | General ADC | |
| 40 | +| _OFFSET_BINARY | output mode for | | operation using | |
| 41 | +| | the ADC when | | offset binary | |
| 42 | +| | configured to | | output. | |
| 43 | +| | use offset | | | |
| 44 | +| | binary format. | | | |
| 45 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 46 | +| OUTPUT_MODE | Represents the | 0x1 | General ADC | |
| 47 | +| _TWOS_COMPLEMENT | two’s | | operation using | |
| 48 | +| | complement | | two’s | |
| 49 | +| | output mode for | | complement | |
| 50 | +| | the ADC. | | output. | |
| 51 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 52 | +| OUTPUT_MODE_GRAY_CODE | Represents the | 0x2 | Used in | |
| 53 | +| | gray code | | applications | |
| 54 | +| | output mode for | | requiring | |
| 55 | +| | the ADC. | | gray-coded | |
| 56 | +| | | | output. | |
| 57 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 58 | +| OUTPUT_EVEN_ODD_MODE_EN | Enable even-odd | 0x20 | Used when | |
| 59 | +| | output mode in | | alternating | |
| 60 | +| | the ADC’s | | even and odd | |
| 61 | +| | output phase | | outputs is | |
| 62 | +| | register. | | required. | |
| 63 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 64 | +| TESTMODE_OFF | Indicates that | 0x0 | Standard | |
| 65 | +| | the test mode | | operation | |
| 66 | +| | for the ADC is | | without test | |
| 67 | +| | turned off. | | modes. | |
| 68 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 69 | +| TESTMODE_MIDSCALE_SHORT | Configures the | 0x1 | Testing ADC | |
| 70 | +| | ADC for a | | functionality | |
| 71 | +| | midscale short | | at midscale. | |
| 72 | +| | test mode. | | | |
| 73 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 74 | +| TESTMODE_POS_FULLSCALE | Positive | 0x2 | Verify ADC | |
| 75 | +| | full-scale test | | response at | |
| 76 | +| | mode. | | positive full | |
| 77 | +| | | | scale. | |
| 78 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 79 | +| TESTMODE_NEG_FULLSCALE | Negative | 0x3 | Verify ADC | |
| 80 | +| | full-scale test | | response at | |
| 81 | +| | mode. | | negative full | |
| 82 | +| | | | scale. | |
| 83 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 84 | +| TESTMODE_ALT_CHECKERBOARD| Enables an | 0x4 | Testing ADC | |
| 85 | +| | alternating | | with a | |
| 86 | +| | checkerboard | | checkerboard | |
| 87 | +| | pattern in test | | pattern input. | |
| 88 | +| | mode. | | | |
| 89 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 90 | +| TESTMODE_PN23_SEQ | PN23 sequence | 0x5 | Using PN23 | |
| 91 | +| | test mode. | | sequences for | |
| 92 | +| | | | ADC testing. | |
| 93 | ++--------------------------+-----------------+-----------------+-----------------+ |
| 94 | + |
| 95 | +Device Configuration |
| 96 | +--------------------- |
| 97 | + |
| 98 | +Device Management |
| 99 | +~~~~~~~~~~~~~~~~~ |
| 100 | + |
| 101 | +The ``ad9434_setup`` function is responsible for initializing the AD9434 |
| 102 | +ADC device. It begins by allocating memory for an ``ad9434_dev`` |
| 103 | +structure, which represents the device context, and initializes SPI |
| 104 | +communication using the settings provided in the ``ad9434_init_param`` |
| 105 | +structure. The function verifies the communication by reading the chip |
| 106 | +ID from the device and comparing it with the expected |
| 107 | +``AD9434_CHIP_ID``. If the ID does not match, it returns an error with a |
| 108 | +status code of -1. Following successful verification, the default output |
| 109 | +mode is configured using ``ad9434_outputmode_set``. The memory |
| 110 | +allocation and SPI initialization must succeed for the function to |
| 111 | +complete, with each step’s result contributing to the final return |
| 112 | +value. The initialized ``ad9434_dev`` structure is then assigned to the |
| 113 | +provided device pointer, and a success message is printed upon |
| 114 | +successful execution, returning 0 to indicate success or -1 upon |
| 115 | +failure. |
| 116 | + |
| 117 | +SPI Communication |
| 118 | +~~~~~~~~~~~~~~~~~ |
| 119 | + |
| 120 | +Key to the AD9434 driver’s functionality are the SPI communication |
| 121 | +operations, ``ad9434_spi_read`` and ``ad9434_spi_write``. These |
| 122 | +functions handle low-level reading and writing of the ADC’s registers |
| 123 | +over SPI, facilitating both configuration and data acquisition. |
| 124 | +``ad9434_spi_read`` constructs a read command, while |
| 125 | +``ad9434_spi_write`` sends data to specified registers, both reporting |
| 126 | +operation status. |
| 127 | + |
| 128 | +Output Mode and Test Configuration |
| 129 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 130 | + |
| 131 | +The driver enables output mode adjustments and test scenarios through |
| 132 | +functions like ``ad9434_outputmode_set`` and ``ad9434_testmode_set``. |
| 133 | +``ad9434_outputmode_set`` writes the required configuration to the |
| 134 | +output register for proper data formatting, whereas |
| 135 | +``ad9434_testmode_set`` configures the ADC into various test modes by |
| 136 | +writing specific values to the test register. These functions allow |
| 137 | +customization of the ADC for diverse application needs. |
| 138 | + |
| 139 | +Data Delay and Phase Adjustment |
| 140 | +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 141 | + |
| 142 | +To enhance ADC performance, the driver offers the ``ad9434_data_delay`` |
| 143 | +function to adjust output data delay, synchronizing with system |
| 144 | +components by writing to the delay register. Macros for phase and offset |
| 145 | +adjustments are defined, though specific functions for these were not |
| 146 | +detailed in the content provided. These settings enable precise control |
| 147 | +for optimized ADC functioning across various conditions. |
| 148 | + |
| 149 | +Driver Initialization Example |
| 150 | +----------------------------- |
| 151 | + |
| 152 | +.. code-block:: C |
| 153 | +
|
| 154 | + #include <stdio.h> |
| 155 | + #include <stdint.h> |
| 156 | + #include <stdlib.h> |
| 157 | + #include "no_os_spi.h" |
| 158 | + #include "no_os_delay.h" |
| 159 | + #include "no_os_alloc.h" |
| 160 | + #include "ad9434.h" |
| 161 | +
|
| 162 | + struct ad9434_dev *device; |
| 163 | + int32_t ret; |
| 164 | + struct ad9434_init_param init_param = { |
| 165 | + .spi_init = { |
| 166 | + .device_id = 0, |
| 167 | + .max_speed_hz = 10000000u, |
| 168 | + .chip_select = 0, |
| 169 | + .mode = NO_OS_SPI_MODE_0, |
| 170 | + .platform_ops = &xil_spi_ops, |
| 171 | + .extra = &xil_spi_init_param, |
| 172 | + } |
| 173 | + }; |
| 174 | +
|
| 175 | + ret = ad9434_setup(&device, init_param); |
| 176 | + if (ret) |
| 177 | + goto err; |
| 178 | + printf("AD9434 initialization successful\n"); |
| 179 | + goto done; |
| 180 | + err: |
| 181 | + printf("AD9434 initialization failed with error: %ld\n", ret); |
| 182 | + done: |
| 183 | + ; |
| 184 | +
|
| 185 | +IIO Support |
| 186 | +----------- |
| 187 | + |
| 188 | +IIO Device Initialization |
| 189 | +~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 190 | + |
| 191 | +To efficiently manage the setup of IIO devices using the AD9434, the |
| 192 | +initialization begins with the ``ad9434_setup`` function. This function |
| 193 | +allocates an ``ad9434_dev`` structure to establish the device context, |
| 194 | +involving SPI setup parameters for communication. It checks the chip ID |
| 195 | +via ``ad9434_spi_read`` and sets the default output mode through SPI |
| 196 | +writes. The ``iio_axi_adc_init`` function is responsible for |
| 197 | +initializing the IIO device. It takes parameters such as the |
| 198 | +``iio_axi_adc_desc`` and initializes them with the structures like |
| 199 | +``iio_axi_adc_init_param``, which encompasses ADC and DMAC cores and |
| 200 | +cache invalidation settings. |
| 201 | + |
| 202 | +Upon any failure, error codes prompt the ``ad9434_remove`` function, |
| 203 | +which cleans up resources by deallocating memory and releasing SPI |
| 204 | +components. Error handling via return codes is essential for device |
| 205 | +integrity. |
| 206 | + |
| 207 | +IIO Application Execution |
| 208 | +~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 209 | + |
| 210 | +The ``iio_app_init`` function sets up the IIO application, incorporating |
| 211 | +UART initialization parameters from ``no_os_uart_init_param``. Running of |
| 212 | +the IIO app is handled by ``iio_app_run``, using settings defined in |
| 213 | +``iio_app_init_param``, including buffer details for data access. These |
| 214 | +functions collectively manage the complete life cycle of IIO device |
| 215 | +initialization and configuration, ensuring seamless communication and |
| 216 | +data processing for the AD9434. |
| 217 | + |
| 218 | +IIO Device Initialization Example |
| 219 | +--------------------------------- |
| 220 | + |
| 221 | +.. code-block:: C |
| 222 | +
|
| 223 | + struct xil_uart_init_param platform_uart_init_par = { |
| 224 | + .type = UART_PS, |
| 225 | + .irq_id = UART_IRQ_ID |
| 226 | + }; |
| 227 | +
|
| 228 | + struct no_os_uart_init_param iio_uart_ip = { |
| 229 | + .device_id = UART_DEVICE_ID, |
| 230 | + .irq_id = UART_IRQ_ID, |
| 231 | + .baud_rate = UART_BAUDRATE, |
| 232 | + .size = NO_OS_UART_CS_8, |
| 233 | + .parity = NO_OS_UART_PAR_NO, |
| 234 | + .stop = NO_OS_UART_STOP_1_BIT, |
| 235 | + .extra = &platform_uart_init_par, |
| 236 | + .platform_ops = &xil_uart_ops |
| 237 | + }; |
| 238 | +
|
| 239 | + struct iio_axi_adc_desc *iio_axi_adc_desc; |
| 240 | + struct iio_device *dev_desc; |
| 241 | + struct iio_axi_adc_init_param iio_axi_adc_init_par; |
| 242 | + iio_axi_adc_init_par = (struct iio_axi_adc_init_param) { |
| 243 | + .rx_adc = ad9434_core, |
| 244 | + .rx_dmac = ad9434_dmac, |
| 245 | + .dcache_invalidate_range = (void (*)(uint32_t, |
| 246 | + uint32_t))Xil_DCacheInvalidateRange |
| 247 | + }; |
| 248 | + struct iio_app_desc *app; |
| 249 | + struct iio_app_init_param app_init_param = { 0 }; |
| 250 | +
|
| 251 | + status = iio_axi_adc_init(&iio_axi_adc_desc, &iio_axi_adc_init_par); |
| 252 | + if (status < 0) |
| 253 | + return status; |
| 254 | +
|
| 255 | + iio_axi_adc_get_dev_descriptor(iio_axi_adc_desc, &dev_desc); |
| 256 | + struct iio_data_buffer read_buff = { |
| 257 | + .buff = (void *)ADC_DDR_BASEADDR, |
| 258 | + .size = 0xFFFFFFFF, |
| 259 | + }; |
| 260 | + struct iio_app_device devices[] = { |
| 261 | + IIO_APP_DEVICE("ad9434_dev", iio_axi_adc_desc, dev_desc, |
| 262 | + &read_buff, NULL, NULL), |
| 263 | + }; |
| 264 | +
|
| 265 | + app_init_param.devices = devices; |
| 266 | + app_init_param.nb_devices = NO_OS_ARRAY_SIZE(devices); |
| 267 | + app_init_param.uart_init_params = iio_uart_ip; |
| 268 | +
|
| 269 | + status = iio_app_init(&app, app_init_param); |
| 270 | + if (status) |
| 271 | + return status; |
| 272 | +
|
| 273 | + return iio_app_run(app); |
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