diff --git a/.github/workflows/build armbian.yml b/.github/workflows/build armbian.yml new file mode 100644 index 000000000000..2b6132d0b695 --- /dev/null +++ b/.github/workflows/build armbian.yml @@ -0,0 +1,333 @@ +name: "Build One by One (anyone)" +on: + workflow_dispatch: + inputs: + + armbian_target: + type: choice + description: 'Build' + required: false + options: + - kernel + - build + default: build + + armbian_kernel_branch: + type: choice + description: 'Kernel branch' + options: + - legacy + - current + - edge + default: 'current' + + armbian_release: + type: choice + description: 'Userspace' + options: + - jammy + - mantic + - bookworm + - trixie + - sid + default: 'jammy' + + armbian_ui: + type: choice + description: 'User interface (not all works)' + options: + - minimal + - server + - xfce + - gnome + - cinnamon + - i3-wm + - kde-plasma + default: 'minimal' + + armbian_version: + description: 'Version' + required: false + default: '' + + armbian_board: + type: choice + description: 'Board' + options: + - aml-a311d-cc + - aml-s905d3-cc + - armsom-aim7-io + - armsom-cm5-io + - armsom-cm5-rpi-cm4-io + - armsom-sige1 + - armsom-sige3 + - armsom-sige5 + - armsom-sige7 + - armsom-w3 + - avaota-a1 + - bananapi + - bananapicm4io + - bananapif3 + - bananapim1plus + - bananapim2plus + - bananapim2pro + - bananapim2s + - bananapim2ultra + - bananapim2zero + - bananapim3 + - bananapim4zero + - bananapim5 + - bananapim64 + - bananapim7 + - bananapipro + - bananapir2 + - bananapir2pro + - beaglev + - bigtreetech-cb1 + - bigtreetech-cb2 + - cherryba-m1 + - clearfogbase + - clearfogpro + - clockworkpi-a06 + - cm3588-nas + - coolpi-cm5 + - coolpi-genbook + - core3566 + - cubieboard + - cubieboard2 + - cubieboard4 + - cubietruck + - cubox-i + - cyber-aib-rk3588 + - dshanpi-r1 + - fine3399 + - firefly-itx-3588j + - firefly-rk3399 + - fxblox-rk1 + - gateway-gz80x + - helios4 + - helios64 + - hikey960 + - hinlink-h28k + - hinlink-h66k + - hinlink-h68k + - hinlink-h88k + - hinlink-hnas + - hinlink-ht2 + - indiedroid-nova + - inovato-quadra + - jethubj100 + - jethubj200 + - jethubj80 + - jetson-nano + - khadas-edge + - khadas-edge2 + - khadas-vim1 + - khadas-vim1s + - khadas-vim2 + - khadas-vim3 + - khadas-vim3l + - khadas-vim4 + - lafrite + - lckfb-taishanpi + - leez-p710 + - lepotato + - lime-a33 + - lime-a64 + - lime + - lime2 + - longanpi-3h + - longanpi-4b + - lubancat2 + - luckfox-core3566 + - macchiatobin-doubleshot + - mangopi-m28k + - mba8mpxl-ras314 + - mba8mpxl + - mekotronics-r58-minipc + - mekotronics-r58x-4g + - mekotronics-r58x-pro + - mekotronics-r58x + - melea1000 + - mixtile-blade3 + - mixtile-edge2 + - mk808c + - mkspi + - nanopct4 + - nanopct6-lts + - nanopct6 + - nanopi-m6 + - nanopi-r1 + - nanopi-r1s-h5 + - nanopi-r2c + - nanopi-r2s + - nanopi-r4s + - nanopi-r4se + - nanopi-r5c + - nanopi-r5s + - nanopi-r6c + - nanopi-r6s + - nanopia64 + - nanopiair + - nanopiduo + - nanopiduo2 + - nanopik1plus + - nanopik2-s905 + - nanopim4 + - nanopim4v2 + - nanopineo + - nanopineo2 + - nanopineo2black + - nanopineo3 + - nanopineo4 + - nanopineocore2 + - nanopineoplus2 + - odroidc1 + - odroidc2 + - odroidc4 + - odroidhc4 + - odroidm1 + - odroidn2 + - odroidn2l + - odroidxu4 + - olimex-a20-olinuxino-micro + - olimex-teres-a64 + - olinux-som-a13 + - onecloud + - oneplus-kebab + - orangepi-r1 + - orangepi-r1plus-lts + - orangepi-r1plus + - orangepi-rk3399 + - orangepi2 + - orangepi3-lts + - orangepi3 + - orangepi3b + - orangepi4-lts + - orangepi4 + - orangepi5-max + - orangepi5-plus + - orangepi5 + - orangepi5pro + - orangepilite + - orangepilite2 + - orangepione + - orangepioneplus + - orangepipc + - orangepipc2 + - orangepipcplus + - orangepiplus + - orangepiplus2e + - orangepiprime + - orangepiwin + - orangepizero + - orangepizero2 + - orangepizero2w + - orangepizero3 + - orangepizeroplus + - orangepizeroplus2-h3 + - orangepizeroplus2-h5 + - panther-x2 + - pcduino3 + - phytiumpi + - pine64 + - pine64so + - pinebook-a64 + - pinebook-pro + - pinecube + - pineh64-b + - pineh64 + - pocketchip-sd + - qemu-uboot-arm64 + - qemu-uboot-x86 + - qemu-uefi-x86 + - quartz64a + - quartz64b + - radxa-e20c + - radxa-e25 + - radxa-e52c + - radxa-zero + - radxa-zero2 + - radxa-zero3 + - recore + - renegade + - retro-lite-cm5 + - retroidpocket-rp5 + - retroidpocket-rpmini + - rk3328-heltec + - roc-rk3399-pc + - rock-3a + - rock-3c + - rock-4se + - rock-5-cm-rpi-cm4-io + - rock-5-cmio + - rock-5-itx + - rock-5a + - rock-5b-plus + - rock-5b + - rock-5c + - rock-s0 + - rock64 + - rockpi-4a + - rockpi-4b + - rockpi-4bplus + - rockpi-4c + - rockpi-4cplus + - rockpi-e + - rockpi-n10 + - rockpi-s + - rockpro64 + - rpi4b + - rpi5b + - sakurapi-rk3308b + - sk-am62b + - sk-am64b + - sk-am68 + - sk-tda4vm + - station-m1 + - station-m2 + - station-m3 + - station-p1 + - station-p2 + - sweet-potato + - thinkpad-x13s + - tinker-edge-r + - tinkerboard-2 + - tinkerboard + - tritium-h3 + - tritium-h5 + - turing-rk1 + - udoo + - uefi-arm64 + - uefi-riscv64 + - uefi-x86 + - unleashed + - unmatched + - visionfive + - wdk2023 + - wsl2-arm64 + - wsl2-x86 + - xiaobao-nas + - xiaomi-elish + - youyeetoo-r1-v3 + - zeropi + - oec-box-wxy4 +jobs: + + build: + name: "Build Armbian" + runs-on: ubuntu-latest + steps: + + - uses: armbian/build@v24.8.1 + with: + armbian_token: "${{secrets.GITHUB_TOKEN}}" + armbian_target: "${{inputs.armbian_target}}" + armbian_release: "${{inputs.armbian_release}}" + armbian_kernel_branch: "${{inputs.armbian_kernel_branch}}" + armbian_ui: "${{inputs.armbian_ui}}" + armbian_board: "${{inputs.armbian_board}}" + armbian_release_tittle: "Armbian SDK" + armbian_release_body: "Virtual images for x86 and arm64" + armbian_pgp_key: "${{secrets.GPG_KEY1}}" + armbian_pgp_password: "${{secrets.GPG_PASSPHRASE1}}" diff --git a/.gitignore b/.gitignore index f599d5086fa7..d59784c0b19f 100644 --- a/.gitignore +++ b/.gitignore @@ -15,8 +15,7 @@ ubuntu-*-cloudimg-console.log /.tmp/ /output/ /cache/ -/*userpatches*/ -/userpatches + ### General annoyances ### .DS_Store diff --git a/config/boards/dg-tn3568.csc b/config/boards/dg-tn3568.csc new file mode 100644 index 000000000000..f244222fd908 --- /dev/null +++ b/config/boards/dg-tn3568.csc @@ -0,0 +1,77 @@ +# Rockchip RK3568 nas-lite 4GB RAM SoC NVME eMMC USB2 USB3 SATA +BOARD_NAME="dg-tn3568" +BOARDFAMILY="rk35xx" +BOARD_MAINTAINER="R-mt" +BOOTCONFIG="rk3568-nas-lite_defconfig" +BOOT_SOC="rk3568" +KERNEL_TARGET="legacy,vendor" +BOOT_FDT_FILE="rockchip/rk3568-dg-tn3568.dtb" +IMAGE_PARTITION_TABLE="gpt" +BOOT_SCENARIO="spl-blobs" + +DDR_BLOB="rk35/rk3568_ddr_1056MHz_v1.13.bin" +BL31_BLOB="rk35/rk3568_bl31_v1.33.elf" # NOT a typo, bl31 is shared across 68 and 66 + +# Override family config for this board; let's avoid conditionals in family config. +function post_family_config__dg-tn3568_use_mainline_uboot() { + display_alert "$BOARD" "mainline u-boot overrides" "info" + + BOOTSOURCE="https://github.com/orangepi-xunlong/u-boot-orangepi.git" + BOOTBRANCH="commit:752ac3f2fdcfe9427ca8868d95025aacd48fc00b" # specific commit, from "branch:rk3568-2023.10" + BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory + BOOTPATCHDIR="v2017.09-rk3588-nas-lite" # fix npu-boot + BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc +} + +function post_family_config__nas-lite_kernel() { + display_alert "$BOARD" "mainline BOOTPATCHDIR" "info" + if [[ ${BRANCH} = "legacy" ]] ; then + KERNELPATCHDIR="rockchip-5.10-dg-tn3568" + else + KERNELPATCHDIR="rockchip-6.1-dg-tn3568" + fi +} + +function custom_kernel_config__dg-tn3568_cpuinfo() { + if [[ ${BRANCH} = "vendor" ]]; then + display_alert "dg-tn3568" "vendor Enabling ROCKCHIP_CPUINFO HASH" "info" + kernel_config_modifying_hashes+=( + "CONFIG_NVMEM_RMEM=y" + "CONFIG_NVMEM_ROCKCHIP_EFUSE=y" + "CONFIG_NVMEM_ROCKCHIP_OTP=y" + "CONFIG_ROCKCHIP_CPUINFO=y" + ) + if [[ -f .config ]] && [[ "${KERNEL_CONFIGURE:-yes}" != "yes" ]]; then + display_alert "dg-tn3568" "vendor Enabling ROCKCHIP_CPUINFO CONFIG" "info" + kernel_config_set_y CONFIG_NVMEM_RMEM + kernel_config_set_y CONFIG_NVMEM_ROCKCHIP_EFUSE + kernel_config_set_y CONFIG_NVMEM_ROCKCHIP_OTP + kernel_config_set_y CONFIG_ROCKCHIP_CPUINFO + run_kernel_make olddefconfig + fi + fi +} + +function post_family_tweaks__dg-tn3568_enable_services() { + display_alert "fix armbian upgrade; hold kernel and dtb" + if [[ ${BRANCH} = "legacy" ]] ; then + display_alert "$BOARD" "Enabling dg-tn3568 upgrade lock dtb adn kernel" "info" + chroot_sdcard apt-mark hold linux-dtb-legacy-rk35xx + chroot_sdcard apt-mark hold linux-image-legacy-rk35xx + chroot_sdcard apt-mark hold linux-u-boot-dg-tn3568-legacy + chroot_sdcard ssh-keygen -A + else + display_alert "$BOARD" "Enabling dg-tn3568 upgrade lock dtb adn kernel" "info" + chroot_sdcard apt-mark hold linux-dtb-vendor-rk35xx + chroot_sdcard apt-mark hold linux-image-vendor-rk35xx + chroot_sdcard apt-mark hold linux-u-boot-dg-tn3568-vendor + fi + return 0 +} + +function pre_umount_final_image__fix_extlinux() { + display_alert "fix_extlinux" + cd ${MOUNT}/boot/ + ln -sf ./dtb/rockchip/rk3568-dg-tn3568.dtb rk-kernel.dtb # fix npu-boot + cd $SRC +} \ No newline at end of file diff --git a/config/boards/dr4-rk3566.csc b/config/boards/dr4-rk3566.csc new file mode 100644 index 000000000000..79d809b745ec --- /dev/null +++ b/config/boards/dr4-rk3566.csc @@ -0,0 +1,41 @@ +# Rockchip RK3566 quad core 8GB RAM SoC WIFI/BT eMMC USB2/3 SATA +BOARD_NAME="dr4-rk3566" +BOARDFAMILY="rk35xx" +BOARD_MAINTAINER="" +BOOTCONFIG="dr4-rk3566_defconfig" +BOOT_SOC="rk3566" +KERNEL_TARGET="legacy" +FULL_DESKTOP="yes" +BOOT_LOGO="desktop" +BOOT_FDT_FILE="rockchip/rk3566-dr4.dtb" +IMAGE_PARTITION_TABLE="gpt" +#BOOTFS_TYPE="fat" +BOOT_SCENARIO="spl-blobs" +#enable_extension "mesa-vpu" + +# Newer blobs. Tested to work with opi3b +DDR_BLOB="rk35/rk3566_ddr_1056MHz_v1.13.bin" +BL31_BLOB="rk35/rk3568_bl31_v1.33.elf" # NOT a typo, bl31 is shared across 68 and 66 +ROCKUSB_BLOB="rk35/rk3566_spl_loader_1.14.bin" # For `EXT=rkdevflash` flashing + +# Override family config for this board; let's avoid conditionals in family config. +function post_family_config__dr4-rk3566_uboot() { + display_alert "$BOARD" "mainline u-boot overrides" "info" + + BOOTSOURCE="https://github.com/orangepi-xunlong/u-boot-orangepi.git" + BOOTBRANCH="commit:752ac3f2fdcfe9427ca8868d95025aacd48fc00b" # specific commit, from "branch:rk3568-2023.10" + BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory + BOOTPATCHDIR="v2017.09-rk3588-dr4" + + BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc +} + +function post_family_config__dr4-rk3566_kernel() { + display_alert "$BOARD" "mainline BOOTPATCHDIR" "info" + if [[ ${BRANCH} = "legacy" ]]; then + KERNELPATCHDIR="rockchip-5.10-dr4" + elif [[ ${BRANCH} = "vendor" ]]; then + KERNELPATCHDIR="rockchip-6.1-dr4" + #CRUSTCONFIG="rockchip-6.1.config" + fi +} \ No newline at end of file diff --git a/config/boards/firefly-itx-3588j.csc b/config/boards/firefly-itx-3588j.csc index f31f41290089..937b131ef807 100644 --- a/config/boards/firefly-itx-3588j.csc +++ b/config/boards/firefly-itx-3588j.csc @@ -3,13 +3,16 @@ BOARD_NAME="Firefly ITX-3588J" BOARDFAMILY="rockchip-rk3588" BOOT_SOC="rk3588" BOARD_MAINTAINER="SeeleVolleri" -KERNEL_TARGET="vendor" +KERNEL_TARGET="legacy,vendor" BOOTCONFIG="rk3588_defconfig" BOOT_FDT_FILE="rockchip/rk3588-firefly-itx-3588j.dtb" BOOT_LOGO="desktop" FULL_DESKTOP="yes" IMAGE_PARTITION_TABLE="gpt" - +#BOOTFS_TYPE="fat" +#BOOTSIZE="300" +#FIXED_IMAGE_SIZE=8807 +#declare -g UEFI_EDK2_BOARD_ID="itx-3588j" # This _only_ used for uefi-edk2-rk3588 extension function post_family_tweaks_bsp__firefly_itx_3588j() { display_alert "$BOARD" "Installing rk3588-bluetooth.service" "info" diff --git a/config/boards/jp-tvbox-3566.tvb b/config/boards/jp-tvbox-3566.tvb index b084517b59a6..e3e7076557b2 100644 --- a/config/boards/jp-tvbox-3566.tvb +++ b/config/boards/jp-tvbox-3566.tvb @@ -1,13 +1,95 @@ # Rockchip RK3566 quad core 8GB RAM SoC WIFI/BT eMMC USB2/3 SATA -BOARD_NAME="JP-TVbox-3566" +BOARD_NAME="jp-tvbox-3566" BOARDFAMILY="rk35xx" +<<<<<<< HEAD +BOARD_MAINTAINER="" +BOOTCONFIG="jp-tvbox-3566_defconfig" +BOOT_SOC="rk3566" +KERNEL_TARGET="legacy,vendor,edge" +======= BOARD_MAINTAINER="tdleiyao" #BOOTCONFIG="rock-3c-rk3566_defconfig" BOOTCONFIG="rk3568_defconfig" KERNEL_TARGET="current,edge" KERNEL_TEST_TARGET="current" +>>>>>>> upstream/main FULL_DESKTOP="yes" BOOT_LOGO="desktop" BOOT_FDT_FILE="rockchip/rk3566-jp-tvbox.dtb" IMAGE_PARTITION_TABLE="gpt" BOOT_SCENARIO="spl-blobs" +ENABLE_EXTENSIONS="open-vfd" + + +# Newer blobs. Tested to work with opi3b +DDR_BLOB="rk35/rk3566_ddr_1056MHz_v1.13.bin" +BL31_BLOB="rk35/rk3568_bl31_v1.33.elf" # NOT a typo, bl31 is shared across 68 and 66 +ROCKUSB_BLOB="rk35/rk3566_spl_loader_1.14.bin" # For `EXT=rkdevflash` flashing + +# Override family config for this board; let's avoid conditionals in family config. +function post_family_config__jp-tvbox-3566_uboot() { + display_alert "$BOARD" "mainline u-boot overrides" "info" + + BOOTSOURCE="https://github.com/orangepi-xunlong/u-boot-orangepi.git" + BOOTBRANCH="commit:752ac3f2fdcfe9427ca8868d95025aacd48fc00b" # specific commit, from "branch:rk3568-2023.10" + BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory + BOOTPATCHDIR="v2017.09-rk3588-jp-tvbox" + + BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc +} + +function post_family_config__jp-tvbox_kernel() { + display_alert "$BOARD" "mainline BOOTPATCHDIR" "info" + if [[ ${BRANCH} = "legacy" ]]; then + KERNELPATCHDIR="rockchip-5.10-jp-tvbox" + elif [[ ${BRANCH} = "vendor" ]]; then + KERNELPATCHDIR="rockchip-6.1-jp-tvbox" + #CRUSTCONFIG="rockchip-6.1.config" + fi +} + +function custom_kernel_config__jp-tvbox_cpuinfo() { + if [[ ${BRANCH} = "vendor" ]]; then + display_alert "jp-tvbox" "vendor Enabling ROCKCHIP_CPUINFO HASH" "info" + kernel_config_modifying_hashes+=( + "CONFIG_NVMEM_RMEM=y" + "CONFIG_NVMEM_ROCKCHIP_EFUSE=y" + "CONFIG_NVMEM_ROCKCHIP_OTP=y" + "CONFIG_ROCKCHIP_CPUINFO=y" + ) + + if [[ -f .config ]] && [[ "${KERNEL_CONFIGURE:-yes}" != "yes" ]]; then + display_alert "jp-tvbox" "vendor Enabling ROCKCHIP_CPUINFO CONFIG" "info" + kernel_config_set_y CONFIG_NVMEM_RMEM + kernel_config_set_y CONFIG_NVMEM_ROCKCHIP_EFUSE + kernel_config_set_y CONFIG_NVMEM_ROCKCHIP_OTP + kernel_config_set_y CONFIG_ROCKCHIP_CPUINFO + #run_host_command_logged ./scripts/config --set-val CONFIG_ARCH_MMAP_RND_BITS 18 + #run_host_command_logged ./scripts/config --set-val CONFIG_ARCH_MMAP_RND_COMPAT_BITS 11 + run_kernel_make olddefconfig + fi + fi +} + + +function post_family_tweaks_bsp__jp-tvbox-3566() { + display_alert "$BOARD" "Installing jp-boxtv led bluetooth service" "info" + + install -m 755 $SRC/packages/bsp/jp-tvbox/brcm_patchram_plus $destination/usr/bin + install -m 755 $SRC/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.sh $destination/usr/bin + mkdir -p $destination/usr/lib/firmware/ + cp $SRC/packages/bsp/jp-tvbox/bcm4339a0.hcd $destination/usr/lib/firmware/ + cp $SRC/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.service $destination/lib/systemd/system/ +# cp $SRC/packages/bsp/jp-tvbox/jp-tvbox-led.service $destination/lib/systemd/system/ + cp $SRC/packages/bsp/jp-tvbox/vfd.conf $destination/etc/ + cp $SRC/packages/bsp/jp-tvbox/openvfd.service $destination/lib/systemd/system/ + return 0 +} + +function post_family_tweaks__jp-tvbox-3566_enable_services() { + display_alert "$BOARD" "Enabling jp-boxtv led bluetooth service" "info" + chroot_sdcard systemctl enable jp-tvbox-bluetooth.service +# chroot_sdcard systemctl enable jp-tvbox-led.service + chroot_sdcard systemctl enable openvfd.service + return 0 +} \ No newline at end of file diff --git a/config/boards/nas-lite.csc b/config/boards/nas-lite.csc new file mode 100644 index 000000000000..ae2ee1c99e5f --- /dev/null +++ b/config/boards/nas-lite.csc @@ -0,0 +1,57 @@ +# Rockchip RK3568 nas-lite 4GB RAM SoC NVME eMMC USB2 USB3 SATA +BOARD_NAME="nas-lite" +BOARDFAMILY="rk35xx" +BOARD_MAINTAINER="" +BOOTCONFIG="rk3568-nas-lite_defconfig" +BOOT_SOC="rk3568" +KERNEL_TARGET="legacy,vendor" +FULL_DESKTOP="yes" +BOOT_LOGO="desktop" +BOOT_FDT_FILE="rockchip/rk3568-nas-lite.dtb" +IMAGE_PARTITION_TABLE="gpt" +BOOT_SCENARIO="spl-blobs" +ENABLE_EXTENSIONS="mesa-vpu" + +DDR_BLOB="rk35/rk3568_ddr_1056MHz_v1.13.bin" +BL31_BLOB="rk35/rk3568_bl31_v1.33.elf" # NOT a typo, bl31 is shared across 68 and 66 +#ROCKUSB_BLOB="rk35/rk3566_spl_loader_1.14.bin" # For `EXT=rkdevflash` flashing + +# Override family config for this board; let's avoid conditionals in family config. +function post_family_config__nas-lite_use_mainline_uboot() { + display_alert "$BOARD" "mainline u-boot overrides" "info" + + BOOTSOURCE="https://github.com/orangepi-xunlong/u-boot-orangepi.git" + BOOTBRANCH="commit:752ac3f2fdcfe9427ca8868d95025aacd48fc00b" # specific commit, from "branch:rk3568-2023.10" + BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory + BOOTPATCHDIR="v2017.09-rk3588-nas-lite" # fix npu-boot + BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc +} + +function post_family_config__nas-lite_kernel() { + display_alert "$BOARD" "mainline BOOTPATCHDIR" "info" + # if [[ ${BRANCH} = "legacy" ]] || [[ ${BRANCH} = "vendor" ]]; then + # KERNELPATCHDIR="rockchip-5.10-nas-lite" + # fi + + if [[ ${BRANCH} = "legacy" ]] ; then + KERNELPATCHDIR="rockchip-5.10-nas-lite" + else + KERNELPATCHDIR="rockchip-6.1-nas-lite" + fi + + +} + +function post_family_tweaks__nas-lite() { + display_alert "$BOARD" "Installing board tweaks" "info" + cp -R $SRC/packages/blobs/rtl8723bt_fw/* $SDCARD/lib/firmware/rtl_bt/ + cp -R $SRC/packages/blobs/station/firmware/* $SDCARD/lib/firmware/ + return 0 +} + +function pre_umount_final_image__fix_extlinux() { + display_alert "fix_extlinux" + cd ${MOUNT}/boot/ + ln -sf ./dtb/rockchip/rk3568-nas-lite.dtb rk-kernel.dtb # fix npu-boot + cd $SRC +} \ No newline at end of file diff --git a/config/boards/oec-box-wxy4.csc b/config/boards/oec-box-wxy4.csc new file mode 100644 index 000000000000..a3cd77db8c2e --- /dev/null +++ b/config/boards/oec-box-wxy4.csc @@ -0,0 +1,57 @@ +# Rockchip RK3566 oec-box-wxy4 2GB RAM SoC eMMC USB2 USB3 SATA +BOARD_NAME="oec-box-wxy4" +BOARDFAMILY="rk35xx" +BOARD_MAINTAINER="" +BOOTCONFIG="rk3566-oec-box-wxy4_defconfig" +BOOT_SOC="rk3566" +KERNEL_TARGET="legacy,vendor,edge" +BOOT_FDT_FILE="rockchip/rk3566-oec-box-wxy4.dtb" +IMAGE_PARTITION_TABLE="gpt" +BOOT_SCENARIO="spl-blobs" +ENABLE_EXTENSIONS="oec-wxy4-lib" +#FIXED_IMAGE_SIZE=4096 + +SRC_EXTLINUX="yes" +SRC_CMDLINE="rootwait rootfstype=ext4 console=ttyFIQ0 console=tty1 loglevel=7 cgroup_enable=cpuset cgroup_memory=1 cgroup_enable=memory swapaccount=1 earlycon=uart8250,mmio32,0xfe660000" +#6.8.9 +#SRC_CMDLINE="rootwait rootfstype=ext4 console=ttyFIQ0 console=tty1 loglevel=7 cgroup_enable=cpuset cgroup_memory=1 cgroup_enable=memory swapaccount=1 " +# Newer blobs. Tested to work with opi3b +DDR_BLOB="rk35/rk3566_ddr_1056MHz_v1.13.bin" +BL31_BLOB="rk35/rk3568_bl31_v1.33.elf" # NOT a typo, bl31 is shared across 68 and 66 +ROCKUSB_BLOB="rk35/rk3566_spl_loader_1.14.bin" # For `EXT=rkdevflash` flashing + +# Override family config for this board; let's avoid conditionals in family config. +function post_family_config__oec-box-wxy4_use_mainline_uboot() { + display_alert "$BOARD" "mainline u-boot overrides" "info" + + BOOTSOURCE="https://github.com/orangepi-xunlong/u-boot-orangepi.git" + BOOTBRANCH="commit:752ac3f2fdcfe9427ca8868d95025aacd48fc00b" # specific commit, from "branch:rk3568-2023.10" + BOOTDIR="u-boot-${BOARD}" # do not share u-boot directory + BOOTPATCHDIR="v2017.09-rk3588" # empty, patches are already in Kwiboo's branch:rk3568-2023.10 + BOOTDELAY=1 # Wait for UART interrupt to enter UMS/RockUSB mode etc +# KERNELPATCHDIR="rockchip-5.10-wxy4" +} + +function post_family_config__oec-box-wxy4_kernel() { + display_alert "$BOARD" "mainline BOOTPATCHDIR" "info" + if [[ ${BRANCH} = "legacy" ]] ; then + KERNELPATCHDIR="rockchip-5.10-wxy4" + else + KERNELPATCHDIR="rockchip-6.1-wxy4" + fi + +} + + +function pre_umount_final_image__fix_extlinux() { + + if [[ $SRC_EXTLINUX == yes ]]; then + display_alert "fix_extlinux" + cd ${MOUNT}/boot/ + initrd_file="$(find ./ -name initrd.img-*)" + initrd_file_name="$(basename "$initrd_file")" + ln -sf $initrd_file_name uInitrd + cd $SRC + fi +} + diff --git a/config/boards/rock-5c.conf b/config/boards/rock-5c.conf index f9adf907a16a..72292cd6b4c8 100644 --- a/config/boards/rock-5c.conf +++ b/config/boards/rock-5c.conf @@ -3,14 +3,15 @@ BOARD_NAME="Rock 5C" BOARDFAMILY="rockchip-rk3588" BOARD_MAINTAINER="schwar3kat" BOOTCONFIG="rock-5c-rk3588s_defconfig" -KERNEL_TARGET="vendor,edge" +KERNEL_TARGET="legacy,vendor,edge" FULL_DESKTOP="yes" BOOT_LOGO="desktop" BOOT_FDT_FILE="rockchip/rk3588s-rock-5c.dtb" BOOT_SCENARIO="spl-blobs" BOOT_SOC="rk3588" IMAGE_PARTITION_TABLE="gpt" -enable_extension "radxa-aic8800" +ENABLE_EXTENSIONS="radxa-aic8800 mesa-vpu" +#enable_extension "radxa-aic8800" AIC8800_TYPE="usb" ASOUND_STATE="asound.state.rock-5c" diff --git a/config/boards/yjh-jm10-3588.csc b/config/boards/yjh-jm10-3588.csc new file mode 100644 index 000000000000..ea6f02cc188d --- /dev/null +++ b/config/boards/yjh-jm10-3588.csc @@ -0,0 +1,160 @@ +# Yijiahe JM10-3588 Rockchip RK3588 Octa core 4GB-32GB eMMC GBE HDMI PCIe SATA USB3 WiFi 4G 5G +BOARD_NAME="Yijiahe JM10-3588" +BOARDFAMILY="rockchip-rk3588" +BOOT_SOC="rk3588" +BOARD_MAINTAINER="r-mt" +KERNEL_TARGET="legacy,vendor" +BOOTCONFIG="rk3588_defconfig" +BOOT_FDT_FILE="rockchip/rk3588-yjh-jm10.dtb" +BOOT_LOGO="desktop" +FULL_DESKTOP="no" +#硬改dsa交换机 设置 JM10_DSA_88E6390="yes" 内核版本这里使用vendor 6.1x, legacy 5.10内核未测试 +#./compile.sh BOARD=yjh-jm10-3588 BRANCH=vendor BUILD_DESKTOP=no BUILD_MINIMAL=yes KERNEL_CONFIGURE=no RELEASE=noble JM10_DSA_88E6390=yes +JM10_DSA_88E6390="no" +IMAGE_PARTITION_TABLE="gpt" +ENABLE_EXTENSIONS="mesa-vpu" +# SRC_EXTLINUX="yes" +# SRC_CMDLINE="rootwait earlycon=uart8250,mmio32,0xfeb50000 console=ttyFIQ0 irqchip.gicv3_pseudo_nmi=0 rootfstype=ext4" + +function post_family_config__nas-lite_kernel() { + display_alert "$BOARD" "mainline BOOTPATCHDIR" "info" + if [[ ${BRANCH} = "legacy" ]] ; then + KERNELPATCHDIR="rockchip-5.10-yjh-jm10" + else + KERNELPATCHDIR="rockchip-6.1-yjh-jm10" + fi +} + +function post_family_tweaks_bsp__JM10-3588() { + display_alert "$BOARD" "Installing rk3588-bluetooth.service" "info" + + # Bluetooth on this board is handled by a Broadcom (AP6275PR3) chip and requires + # a custom brcm_patchram_plus binary, plus a systemd service to run it at boot time + install -m 755 $SRC/packages/bsp/rk3399/brcm_patchram_plus_rk3399 $destination/usr/bin + cp $SRC/packages/bsp/rk3399/rk3399-bluetooth.service $destination/lib/systemd/system/rk3588-bluetooth.service + + # Reuse the service file, ttyS0 -> ttyS6; BCM4345C5.hcd -> BCM4362A2.hcd + sed -i 's/ttyS0/ttyS1/g' $destination/lib/systemd/system/rk3588-bluetooth.service + sed -i 's/BCM4345C5.hcd/BCM4362A2.hcd/g' $destination/lib/systemd/system/rk3588-bluetooth.service + return 0 +} + +function post_family_tweaks__JM10-3588_naming_audios() { + display_alert "$BOARD" "Renaming JM10-3588 audios" "info" + mkdir -p $SDCARD/etc/udev/rules.d/ + echo 'SUBSYSTEM=="sound", ENV{ID_PATH}=="platform-hdmi0-sound", ENV{SOUND_DESCRIPTION}="HDMI0 Audio"' > $SDCARD/etc/udev/rules.d/90-naming-audios.rules + return 0 +} + +function extension_prepare_config__dsa() { + if [[ ${JM10_DSA_88E6390} = "yes" ]] && [[ ${BRANCH} = "vendor" || ${BRANCH} = "legacy" ]] && [[ ${BUILD_DESKTOP} = "no" ]]; then + display_alert "jm10-3588" "Only for Jm10 Hard Change Enabling MV88E6XXX Img Name -dsa" "info" + EXTRA_IMAGE_SUFFIXES+=("-dsa") + fi +} + +function custom_kernel_config__JM10-3588_MV88E6XXX() { + #if [[ ${JM10_DSA_88E6390} = "yes" ]] && [[ ${BRANCH} = "vendor" || ${BRANCH} = "legacy" ]]; then + display_alert "jm10-3588" "Only for Jm10 Hard Change Enabling MV88E6XXX HASH" "info" + kernel_config_modifying_hashes+=( + "CONFIG_NET_VENDOR_MARVELL=y" + "CONFIG_NET_DSA=m" + "CONFIG_NET_DSA_MV88E6XXX=m" + "CONFIG_NET_DSA_MV88E6XXX_PTP=y" + "CONFIG_MVMDIO=y" + ) + + if [[ -f .config ]] && [[ "${KERNEL_CONFIGURE:-yes}" != "yes" ]]; then + display_alert "jm10-3588" "Only for Jm10 Hard Change Enabling dsa MV88E6XXX" "info" + kernel_config_set_y CONFIG_NET_VENDOR_MARVELL + kernel_config_set_m CONFIG_NET_DSA + kernel_config_set_m CONFIG_NET_DSA_MV88E6XXX + kernel_config_set_y CONFIG_NET_DSA_MV88E6XXX_PTP + kernel_config_set_y CONFIG_MVMDIO + run_kernel_make olddefconfig + fi + #fi +} + + +function post_family_tweaks__JM10-3588_enable_services() { + display_alert "fix armbian upgrade; hold kernel and dtb" + if [[ ${BRANCH} = "legacy" ]] ; then + display_alert "$BOARD" "Enabling JM10-3588 upgrade lock dtb adn kernel" "info" + chroot_sdcard apt-mark hold linux-image-legacy-rk35xx + chroot_sdcard apt-mark hold linux-dtb-legacy-rk35xx + chroot_sdcard apt-mark hold linux-u-boot-yjh-jm10-3588-legacy + else + display_alert "$BOARD" "Enabling JM10-3588 upgrade lock dtb adn kernel" "info" + chroot_sdcard apt-mark hold linux-image-vendor-rk35xx + chroot_sdcard apt-mark hold linux-dtb-vendor-rk35xx + chroot_sdcard apt-mark hold linux-u-boot-yjh-jm10-3588-vendor + fi + + display_alert "$BOARD" "Enabling rk3588-bluetooth.service" "info" + chroot_sdcard_apt_get_install rfkill + chroot_sdcard systemctl enable rk3588-bluetooth.service + + if [[ ${JM10_DSA_88E6390} = "yes" ]] && [[ ${BRANCH} = "vendor" || ${BRANCH} = "legacy" ]] && [[ ${BUILD_DESKTOP} = "no" ]]; then + #Only for Jm10 Hard Change. del /etc/netplan/10-dhcp-all-interfaces.yaml and add 10-dsa-MV88E6XXX-br0.yaml + #桌面配置 网络使用NetworkManager,自行图形化配置网桥,暂不用10-dsa-MV88E6XXX-br0.yaml配置网桥 + display_alert "$BOARD" "Only for Jm10 Hard Change del 10-dhcp-all-interfaces.yaml and add 10-dsa-MV88E6XXX-br0.yaml" "info" + rm -rf ${SDCARD}/etc/netplan/*.yaml + cat <<- EOF > "${SDCARD}/etc/netplan/10-dsa-MV88E6XXX-br0.yaml" +# Let NetworkManager manage all devices on this system +network: + version: 2 + renderer: networkd + ethernets: + eth1: + dhcp4: no + dhcp6: no + eth2: + dhcp4: no + dhcp6: no + eth3: + dhcp4: no + dhcp6: no + eth4: + dhcp4: no + dhcp6: no + eth5: + dhcp4: no + dhcp6: no + eth6: + dhcp4: no + dhcp6: no + eth7: + dhcp4: no + dhcp6: no + eth8: + dhcp4: no + dhcp6: no + bridges: + br0: + interfaces: + - eth1 + - eth2 + - eth3 + - eth4 + - eth5 + - eth6 + - eth7 + - eth8 + dhcp4: yes + dhcp6: yes + #addresses: + # - 192.168.3.166/24 + #routes: + # - to: default + # via: 192.168.3.1 + #nameservers: + # addresses: [192.168.3.1, 8.8.8.8] + parameters: + stp: false +EOF + chmod 600 "${SDCARD}/etc/netplan/10-dsa-MV88E6XXX-br0.yaml" + fi + + return 0 +} \ No newline at end of file diff --git a/config/bootenv/rk356x.txt b/config/bootenv/rk356x.txt index 472418799e60..ecd0763f24b7 100644 --- a/config/bootenv/rk356x.txt +++ b/config/bootenv/rk356x.txt @@ -1,4 +1,4 @@ -verbosity=1 +verbosity=7 bootlogo=false console=both extraargs=cma=256M diff --git a/extensions/oec-wxy4-lib.sh b/extensions/oec-wxy4-lib.sh new file mode 100644 index 000000000000..0823fadc1670 --- /dev/null +++ b/extensions/oec-wxy4-lib.sh @@ -0,0 +1,9 @@ +function post_install_kernel_debs__install_oecwxy4_lib() { + use_clean_environment="yes" chroot_sdcard "wget http://debian.mirror.ac.za/debian/pool/main/o/openssl/libssl1.1_1.1.1n-0+deb10u3_arm64.deb -P /tmp" + use_clean_environment="yes" chroot_sdcard "wget https://github.com/wxzmz/aic8800/releases/download/3.0%2Bgit20240116.ec460377-8/fw_printenv-tools.tgz -P /tmp" + display_alert "Install oec-wxy4 libssl1.1" "info" + use_clean_environment="yes" chroot_sdcard_apt_get_install "/tmp/libssl1.1_1.1.1n-0+deb10u3_arm64.deb " + use_clean_environment="yes" chroot_sdcard "rm -f /tmp/libssl1.1_1.1.1n-0+deb10u3_arm64.deb" + use_clean_environment="yes" chroot_sdcard "tar zxf /tmp/fw_printenv-tools.tgz -C /" + use_clean_environment="yes" chroot_sdcard "rm -f /tmp/fw_printenv-tools.tgz" +} diff --git a/extensions/open-vfd.sh b/extensions/open-vfd.sh new file mode 100644 index 000000000000..4e02d25ee22b --- /dev/null +++ b/extensions/open-vfd.sh @@ -0,0 +1,26 @@ +function extension_finish_config__install_kernel_headers_for_open-vfd_dkms() { + if [[ "${KERNEL_HAS_WORKING_HEADERS}" != "yes" ]]; then + display_alert "Kernel version has no working headers package" "skipping open-vfd dkms for kernel v${KERNEL_MAJOR_MINOR}" "warn" + return 0 + fi + declare -g INSTALL_HEADERS="yes" + display_alert "Forcing INSTALL_HEADERS=yes; for use with open-vfd dkms" "${EXTENSION}" "debug" +} + +function post_install_kernel_debs__install_open-vfd_dkms_package() { + [[ "${INSTALL_HEADERS}" != "yes" ]] || [[ "${KERNEL_HAS_WORKING_HEADERS}" != "yes" ]] && return 0 + api_url="https://api.github.com/repos/wxzmz/linux_openvfd/releases/latest" + latest_version=$(curl -s "${api_url}" | jq -r '.tag_name') + openvfd_url="https://github.com/wxzmz/linux_openvfd/releases/download/${latest_version}/open-vfd-dkms_${latest_version}_arm64.deb" + if [[ "${GITHUB_MIRROR}" == "ghproxy" ]];then + ghproxy_header="https://mirror.ghproxy.com/" + openvfd_url=${ghproxy_header}${openvfd_url} + fi + openvfd_dkms_deb_file_name="open-vfd-dkms_${latest_version}_arm64.deb" + use_clean_environment="yes" chroot_sdcard "wget ${openvfd_url} -P /tmp" + + display_alert "Install open-vfd packages, will build kernel module in chroot" "${EXTENSION}" "info" + declare -ag if_error_find_files_sdcard=("/var/lib/dkms/open-vfd*/*/build/*.log") + use_clean_environment="yes" chroot_sdcard_apt_get_install "/tmp/${openvfd_dkms_deb_file_name}" + use_clean_environment="yes" chroot_sdcard "rm -f /tmp/open-vfd*.deb" +} diff --git a/extensions/radxa-aic8800.sh b/extensions/radxa-aic8800.sh index 9e4df52ea613..3fef7b101106 100644 --- a/extensions/radxa-aic8800.sh +++ b/extensions/radxa-aic8800.sh @@ -47,4 +47,4 @@ function post_install_kernel_debs__install_aic8800_dkms_package() { declare -ag if_error_find_files_sdcard=("/var/lib/dkms/aic8800*/*/build/*.log") use_clean_environment="yes" chroot_sdcard_apt_get_install "/tmp/${aic8800_dkms_file_name} /tmp/aic8800-firmware_${latest_version}_all.deb" use_clean_environment="yes" chroot_sdcard "rm -f /tmp/aic8800*.deb" -} +} \ No newline at end of file diff --git a/lib/functions/artifacts/artifacts-obtain.sh b/lib/functions/artifacts/artifacts-obtain.sh index 1a60f4867ce6..173bf16704b6 100644 --- a/lib/functions/artifacts/artifacts-obtain.sh +++ b/lib/functions/artifacts/artifacts-obtain.sh @@ -533,7 +533,7 @@ function is_artifact_available_in_remote_cache() { display_alert "Artifact is not available in remote cache" "${artifact_full_oci_target}" "info" artifact_exists_in_remote_cache="no" fi - + artifact_exists_in_remote_cache="no" return 0 } diff --git a/lib/functions/general/bat-cat.sh b/lib/functions/general/bat-cat.sh index f389909efa2a..1dc4486045d0 100644 --- a/lib/functions/general/bat-cat.sh +++ b/lib/functions/general/bat-cat.sh @@ -9,7 +9,7 @@ function run_tool_batcat() { # Default version - BATCAT_VERSION=${BATCAT_VERSION:-0.24.0} # https://github.com/sharkdp/bat/releases + BATCAT_VERSION=${BATCAT_VERSION:-0.25.0} # https://github.com/sharkdp/bat/releases declare non_cache_dir="/armbian-tools/batcat" # To deploy/reuse cached batcat in a Docker image. diff --git a/packages/bsp/jp-tvbox/bcm4339a0.hcd b/packages/bsp/jp-tvbox/bcm4339a0.hcd new file mode 100644 index 000000000000..9832507a8ae6 Binary files /dev/null and b/packages/bsp/jp-tvbox/bcm4339a0.hcd differ diff --git a/packages/bsp/jp-tvbox/brcm_patchram_plus b/packages/bsp/jp-tvbox/brcm_patchram_plus new file mode 100755 index 000000000000..974b68729131 Binary files /dev/null and b/packages/bsp/jp-tvbox/brcm_patchram_plus differ diff --git a/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.service b/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.service new file mode 100644 index 000000000000..22af0480e766 --- /dev/null +++ b/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.service @@ -0,0 +1,15 @@ +[Unit] +Description=Bluetooth Rockpi +After=bluetooth.target + +[Service] +Type=simple + +ExecStart=/bin/jp-tvbox-bluetooth.sh +TimeoutSec=0 +RemainAfterExit=yes +SysVStartPriority=99 + +[Install] +WantedBy=multi-user.target + diff --git a/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.sh b/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.sh new file mode 100755 index 000000000000..52fc6fd01bb6 --- /dev/null +++ b/packages/bsp/jp-tvbox/jp-tvbox-bluetooth.sh @@ -0,0 +1,24 @@ +#! /bin/sh + +PATH=/sbin:/bin:/usr/sbin:/usr/bin +blue_mac=9d:ac:$(cat /sys/class/net/eth0/address | cut -d : -f 3-6) +modprobe hci_uart +modprobe rfcomm + +killall brcm_patchram_plus + +echo 0 > /sys/class/rfkill/rfkill0/state +sleep 2 +echo 1 > /sys/class/rfkill/rfkill0/state +sleep 2 + +#brcm_patchram_plus --bd_addr "9D:AC:DE:98:3C:15" --enable_hci --no2bytes --use_baudrate_for_download --tosleep 200000 --baudrate 1500000 --patchram /lib/firmware/ /dev/ttyS1 & +brcm_patchram_plus --bd_addr "$blue_mac" --enable_hci --no2bytes --use_baudrate_for_download --tosleep 200000 --baudrate 1500000 --patchram /lib/firmware/ /dev/ttyS1 & +sleep 1 +hciconfig hci0 up + +echo ok + +exit 0 + + diff --git a/packages/bsp/jp-tvbox/jp-tvbox-led.service b/packages/bsp/jp-tvbox/jp-tvbox-led.service new file mode 100644 index 000000000000..96271ffca045 --- /dev/null +++ b/packages/bsp/jp-tvbox/jp-tvbox-led.service @@ -0,0 +1,21 @@ +# Armbian led state save and restore +# Stores the current led state at shutdown and restores +# it during bootstrap + +[Unit] +Description=Armbian leds state +After=timers.target +Conflicts=shutdown.target +DefaultDependencies=no + +[Service] +Type=simple +Restart=on-failure +ExecStartPre=/usr/sbin/modprobe openvfd +ExecStart=/usr/bin/OpenVFDService & +ExecReload=/usr/bin/OpenVFDService & + + +[Install] +WantedBy=basic.target + diff --git a/packages/bsp/jp-tvbox/openvfd.service b/packages/bsp/jp-tvbox/openvfd.service new file mode 100644 index 000000000000..6a14e0468e21 --- /dev/null +++ b/packages/bsp/jp-tvbox/openvfd.service @@ -0,0 +1,14 @@ +[Unit] +Description=openvfd +Wants=network-online.target + +[Service] +Type=simple +EnvironmentFile=/etc/vfd.conf +ExecStartPre=/bin/sh -c ". /etc/vfd.conf; /sbin/modprobe openvfd vfd_gpio_clk=$vfd_gpio_clk vfd_gpio_dat=$vfd_gpio_dat vfd_gpio_stb=$vfd_gpio_stb vfd_chars=$vfd_chars vfd_dot_bits=$vfd_dot_bits vfd_display_type=$vfd_display_type vfd_gpio_chip_name=$vfd_gpio_chip_name;" +ExecStart=/usr/bin/YAopenvfD $openvfD_args +ExecStop=/usr/bin/killall YAopenvfD +ExecStopPost=-/sbin/rmmod openvfd + +[Install] +WantedBy=multi-user.target diff --git a/packages/bsp/jp-tvbox/vfd.conf b/packages/bsp/jp-tvbox/vfd.conf new file mode 100644 index 000000000000..2bedc8dd70fb --- /dev/null +++ b/packages/bsp/jp-tvbox/vfd.conf @@ -0,0 +1,16 @@ +# Please set the following configurations up according to one of the following source: +# - Arthur Libreman's official OpenVFD configurations, a lot of configs available, but some older ones might have wrong gpio +# https://github.com/arthur-liberman/vfd-configurations +# - Ophub's Armbian repo, only a few configs, but some of them might have different yet correct gpio, some LED dots info are also correct +# https://github.com/ophub/amlogic-s9xxx-armbian/tree/main/build-armbian/armbian-files/platform-files/amlogic/rootfs/usr/share/openvfd/conf +#vfd_gpio_stb=0,0,0xFF +# This is the OpenVFD module config for Jp-TvBox (rk3566), it would probably not work on your box so you'll need to update it by yourself + +vfd_gpio_clk='0,11,0' +vfd_gpio_dat='0,12,0' +vfd_gpio_stb='0,0,0xff' +vfd_chars='0,4,3,2,1' +vfd_dot_bits='0,1,3,2,4,5,6' +vfd_display_type='0x00,0x00,0x00,0x06' +vfd_gpio_chip_name='gpio0' +openvfD_args=--dots-order 0,1,3,2,4,5,6 3:date:year 3:date:month_day 3:date:weekday 10@alarm:date:24h 10:date:12h @eth:net_carrier:eth0 @wifi:net_carrier:wlan0 @usb:file:/sys/bus/usb/devices/1-1 @usb:file:/sys/bus/usb/devices/3-1 @usb:file:/sys/bus/usb/devices/4-1 @play:dev:sda @pause:dev:ttyUSB0 \ No newline at end of file diff --git a/patch/kernel/rk35xx-legacy/kernel-rk35xx-legacy-03-5c.patch b/patch/kernel/rk35xx-legacy/kernel-rk35xx-legacy-03-5c.patch new file mode 100644 index 000000000000..e53650aefd62 --- /dev/null +++ b/patch/kernel/rk35xx-legacy/kernel-rk35xx-legacy-03-5c.patch @@ -0,0 +1,940 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Mon, 20 May 2024 09:43:24 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts | 905 ++++++++++ + 2 files changed, 906 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 66f65557331c..b956cb0ad343 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,8 +1,8 @@ + # SPDX-License-Identifier: GPL-2.0 + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v11-linux.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +new file mode 100644 +index 000000000000..2d90bb417e20 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5c.dts +@@ -0,0 +1,905 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2022 Rockchip Electronics Co., Ltd. ++ * Copyright (c) 2022 Radxa Limited ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3588s.dtsi" ++#include "rk3588-rk806-single.dtsi" ++#include "rk3588-linux.dtsi" ++ ++/ { ++ model = "Radxa ROCK 5C"; ++ compatible = "radxa,rock-5c", "rockchip,rk3588"; ++ ++ /delete-node/ chosen; ++ ++ fan0: pwm-fan { ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ cooling-levels = <0 60 100 160 185 255 255>; ++ pwms = <&pwm3 0 10000 0>; ++ rockchip,temp-trips = < ++ 35000 1 ++ 40000 2 ++ 50000 3 ++ 60000 4 ++ 70000 5 ++ 75000 6 ++ >; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ ++ vcc_5v0: vcc-5v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-boot-on; ++ regulator-always-on; ++ enable-active-high; ++ gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc_5v0_en>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ wifibt-power { ++ compatible = "regulator-fixed"; ++ regulator-name = "wifibt_power"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifibt_en>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ hdmi0_sound: hdmi0-sound { ++ status = "okay"; ++ compatible = "rockchip,hdmi"; ++ rockchip,mclk-fs = <128>; ++ rockchip,card-name = "rockchip-hdmi0"; ++ rockchip,cpu = <&i2s5_8ch>; ++ rockchip,codec = <&hdmi0>; ++ rockchip,jack-det; ++ }; ++ ++ es8316_sound: es8316-sound { ++ status = "okay"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip-es8316"; ++ rockchip,format = "i2s"; ++ rockchip,mclk-fs = <256>; ++ rockchip,cpu = <&i2s0_8ch >; ++ rockchip,codec = <&es8316>; ++ io-channels = <&saradc 3>; ++ io-channel-names = "adc-detect"; ++ keyup-threshold-microvolt = <1800000>; ++ play-pause-key { ++ label = "playpause"; ++ linux,code = <164>; ++ press-threshold-microvolt = <2000>; ++ }; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_otg"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_pcie: vcc3v3-pcie { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <5000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ gpio-leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ ++ user-led1 { ++ gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-on"; ++ default-state = "on"; ++ }; ++ ++ user-led2 { ++ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c0m2_xfer>; ++ ++ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { ++ compatible = "rockchip,rk8603"; ++ reg = <0x43>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c2 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c2m0_xfer>; ++ ++ vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_npu_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++/* CPU */ ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++ mem-supply = <&vdd_cpu_big0_mem_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++ mem-supply = <&vdd_cpu_big1_mem_s0>; ++}; ++ ++/* GPU */ ++ ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ mem-supply = <&vdd_gpu_mem_s0>; ++ status = "okay"; ++}; ++ ++/* NPU */ ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu_s0>; ++ mem-supply = <&vdd_npu_mem_s0>; ++ status = "okay"; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ status = "okay"; ++ center-supply = <&vdd_ddr_s0>; ++ mem-supply = <&vdd_log_s0>; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&jpege_ccu { ++ status = "okay"; ++}; ++ ++&jpege0 { ++ status = "okay"; ++}; ++ ++&jpege0_mmu { ++ status = "okay"; ++}; ++ ++&jpege1 { ++ status = "okay"; ++}; ++ ++&jpege1_mmu { ++ status = "okay"; ++}; ++ ++&jpege2 { ++ status = "okay"; ++}; ++ ++&jpege2_mmu { ++ status = "okay"; ++}; ++ ++&jpege3 { ++ status = "okay"; ++}; ++ ++&jpege3_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&rga3_core0 { ++ status = "okay"; ++}; ++ ++&rga3_0_mmu { ++ status = "okay"; ++}; ++ ++&rga3_core1 { ++ status = "okay"; ++}; ++ ++&rga3_1_mmu { ++ status = "okay"; ++}; ++ ++&rga2 { ++ status = "okay"; ++}; ++ ++&rkvdec_ccu { ++ status = "okay"; ++}; ++ ++&rkvdec0 { ++ status = "okay"; ++}; ++ ++&rkvdec0_mmu { ++ status = "okay"; ++}; ++ ++&rkvdec1 { ++ status = "okay"; ++}; ++ ++&rkvdec1_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc_ccu { ++ status = "okay"; ++}; ++ ++&rkvenc0 { ++ status = "okay"; ++}; ++ ++&rkvenc0_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc1 { ++ status = "okay"; ++}; ++ ++&rkvenc1_mmu { ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&avcc_1v8_s0>; ++}; ++ ++/* Storage */ ++/* eMMC */ ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs200-1_8v; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ status = "okay"; ++}; ++ ++/* SD */ ++ ++&sdmmc { ++ max-frequency = <200000000>; ++ no-sdio; ++ no-mmc; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc_3v3_s0>; ++ vqmmc-supply = <&vccio_sd_s0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>; ++ status = "okay"; ++}; ++ ++/* ADC */ ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++/* HDMI */ ++ ++&hdmi0 { ++ status = "okay"; ++ cec-enable = "true"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hdmim0_tx0_cec &hdmim1_tx0_hpd &hdmim0_tx0_scl &hdmim0_tx0_sda>; ++}; ++ ++&hdmi0_in_vp0 { ++ status = "okay"; ++}; ++ ++&route_hdmi0 { ++ status = "okay"; ++}; ++ ++&hdptxphy_hdmi0 { ++ status = "okay"; ++}; ++ ++&i2s5_8ch { ++ status = "okay"; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++/* Video Ports */ ++ ++&vop { ++ status = "okay"; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++/* vp0 & vp1 splice for 8K output */ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp1 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp2 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp3 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; ++ rockchip,primary-plane = ; ++}; ++ ++&display_subsystem { ++ clocks = <&hdptxphy_hdmi_clk0>; ++ clock-names = "hdmi0_phy_pll"; ++}; ++ ++&hdptxphy_hdmi_clk0 { ++ status = "okay"; ++}; ++ ++/* USB */ ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ status = "okay"; ++ phy-supply = <&vcc5v0_host>; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usbhost3_0 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3_0 { ++ status = "okay"; ++}; ++ ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++ vbus-supply = <&vcc5v0_otg>; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbdp_phy0 { ++ status = "okay"; ++}; ++ ++&usbdp_phy0_u3 { ++ status = "okay"; ++}; ++ ++/* PCIe */ ++ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&pcie2x1l2 { ++ status = "okay"; ++ reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_pcie>; ++}; ++ ++/* Ethernet */ ++ ++&mdio1 { ++ rgmii_phy1: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ }; ++}; ++ ++&gmac1 { ++ status = "okay"; ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ // Reset time is 20ms, 100ms for rtl8211f ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1_miim ++ &gmac1_tx_bus2 ++ &gmac1_rx_bus2 ++ &gmac1_rgmii_clk ++ &gmac1_rgmii_bus>; ++ ++ tx_delay = <0x3a>; ++ rx_delay = <0x3e>; ++ ++ phy-handle = <&rgmii_phy1>; ++}; ++ ++/* I2C */ ++ ++&i2c7 { ++ status = "okay"; ++ ++ es8316: es8316@11 { ++ compatible = "everest,es8316"; ++ reg = <0x11>; ++ clocks = <&mclkout_i2s0>; ++ clock-names = "mclk"; ++ assigned-clocks = <&mclkout_i2s0>; ++ assigned-clock-rates = <12288000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_mclk>; ++ #sound-dai-cells = <0>; ++ status = "okay"; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++ rockchip,playback-channels = <2>; ++ rockchip,capture-channels = <2>; ++ #sound-dai-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++}; ++ ++&pwm3 { ++ status = "okay"; ++ pinctrl-0 = <&pwm3m1_pins>; ++}; ++ ++&threshold { ++ temperature = <60000>; ++}; ++ ++&soc_thermal { ++ sustainable-power = <5000>; /* milliwatts */ ++ cooling-maps { ++ map3 { ++ trip = <&target>; ++ cooling-device = ++ <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ contribution = <8192>; ++ }; ++ map4 { ++ trip = <&threshold>; ++ cooling-device = ++ <&fan0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; ++ contribution = <8192>; ++ }; ++ }; ++}; ++ ++&rockchip_suspend { ++ compatible = "rockchip,pm-rk3588"; ++ status = "okay"; ++ rockchip,sleep-debug-en = <1>; ++ rockchip,sleep-mode-config = < ++ (0 ++ | RKPM_SLP_ARMOFF_DDRPD ++ ) ++ >; ++ rockchip,wakeup-config = < ++ (0 ++ | RKPM_GPIO_WKUP_EN ++ | RKPM_USB_WKUP_EN ++ ) ++ >; ++}; ++ ++&avdd_0v75_s0 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <837500>; ++ }; ++}; ++ ++&avcc_1v8_s0 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++}; ++ ++&vcc_1v8_s0 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++}; ++ ++&vcc_3v3_s0 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++}; ++ ++&vdd_log_s0 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <750000>; ++ }; ++}; ++ ++&vdd_ddr_pll_s0 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <850000>; ++ }; ++}; ++ ++&pinctrl { ++ ++ power { ++ vcc_5v0_en: vcc-5v0-en { ++ rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wifibt { ++ wifibt_en: wifibit-en { ++ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ host_wake_wl: host-wake-wl { ++ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_output_high>; ++ }; ++ ++ wl_wake_host: wl-wake-host { ++ rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ host_wake_bt: host-wake-bt { ++ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>; ++ }; ++ ++ bt_wake_host: bt-wake-host { ++ rockchip,pins = <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&gpio0 { ++ gpio-line-names = ++ /* GPIO0_A0-A3 */ ++ "", "", "", "", ++ /* GPIO0_A4-A7 */ ++ "", "", "", "", ++ ++ /* GPIO0_B0-B3 */ ++ "", "", "", "", ++ /* GPIO0_B4-B7 */ ++ "", "PIN_8", "PIN_10", "", ++ ++ /* GPIO0_C0-C3 */ ++ "", "", "", "", ++ /* GPIO0_C4-C7 */ ++ "", "", "", "PIN_27", ++ ++ /* GPIO0_D0-D3 */ ++ "PIN_28", "", "", "", ++ /* GPIO0_D4-D7 */ ++ "", "", "", ""; ++}; ++ ++&gpio1 { ++ gpio-line-names = ++ /* GPIO1_A0-A3 */ ++ "PIN_21", "PIN_19", "PIN_23", "PIN_24", ++ /* GPIO1_A4-A7 */ ++ "PIN_26", "PIN_16", "", "", ++ ++ /* GPIO1_B0-B3 */ ++ "PIN_18", "PIN_31", "PIN_29", "PIN_7", ++ /* GPIO1_B4-B7 */ ++ "PIN_33", "PIN_22", "", "", ++ ++ /* GPIO1_C0-C3 */ ++ "", "", "", "", ++ /* GPIO1_C4-C7 */ ++ "", "", "", "", ++ ++ /* GPIO1_D0-D3 */ ++ "", "", "", "", ++ /* GPIO1_D4-D7 */ ++ "", "", "PIN_5", "PIN_3"; ++}; ++ ++&gpio2 { ++ gpio-line-names = ++ /* GPIO2_A0-A3 */ ++ "", "", "", "", ++ /* GPIO2_A4-A7 */ ++ "", "", "", "", ++ ++ /* GPIO2_B0-B3 */ ++ "", "", "", "", ++ /* GPIO2_B4-B7 */ ++ "", "", "", "", ++ ++ /* GPIO2_C0-C3 */ ++ "", "", "", "", ++ /* GPIO2_C4-C7 */ ++ "", "", "", "", ++ ++ /* GPIO2_D0-D3 */ ++ "", "", "", "", ++ /* GPIO2_D4-D7 */ ++ "", "", "", ""; ++}; ++ ++&gpio3 { ++ gpio-line-names = ++ /* GPIO3_A0-A3 */ ++ "", "", "", "", ++ /* GPIO3_A4-A7 */ ++ "", "", "", "", ++ ++ /* GPIO3_B0-B3 */ ++ "", "", "", "", ++ /* GPIO3_B4-B7 */ ++ "", "", "", "", ++ ++ /* GPIO3_C0-C3 */ ++ "", "", "", "", ++ /* GPIO3_C4-C7 */ ++ "", "", "", "", ++ ++ /* GPIO3_D0-D3 */ ++ "", "", "", "", ++ /* GPIO3_D4-D7 */ ++ "", "", "", ""; ++}; ++ ++&gpio4 { ++ gpio-line-names = ++ /* GPIO4_A0-A3 */ ++ "PIN_35", "PIN_12", "PIN_36", "", ++ /* GPIO4_A4-A7 */ ++ "", "PIN_38", "", "", ++ ++ /* GPIO4_B0-B3 */ ++ "PIN_32", "PIN_40", "PIN_13", "PIN_11", ++ /* GPIO4_B4-B7 */ ++ "PIN_15", "", "", "", ++ ++ /* GPIO4_C0-C3 */ ++ "", "", "", "", ++ /* GPIO4_C4-C7 */ ++ "", "", "", "", ++ ++ /* GPIO4_D0-D3 */ ++ "", "", "", "", ++ /* GPIO4_D4-D7 */ ++ "", "", "", ""; ++}; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_rock-5c/reopen_disabled_nodes.patch b/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_rock-5c/reopen_disabled_nodes.patch index 831e1af444ae..400ce06dc1b0 100644 --- a/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_rock-5c/reopen_disabled_nodes.patch +++ b/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_rock-5c/reopen_disabled_nodes.patch @@ -55,7 +55,7 @@ index f7928a7f2..3c4d1e2f2 100644 - fdt_rm_path(blob, "/thermal-zones/soc-thermal/cooling-maps/map3"); - debug("rm: gpu\n"); + /* If one core is bad, disable gpu */ -+ if ((BAD_GPU(mask, 0)) || (BAD_GPU(mask, 1)) || (BAD_GPU(mask, 2)) || (BAD_GPU(mask, 3))) ++ if ((BAD_GPU(mask, 0)) && (BAD_GPU(mask, 1)) && (BAD_GPU(mask, 2)) && (BAD_GPU(mask, 3))) + { + fdt_rm_path(blob, "/gpu@fb000000"); + fdt_rm_path(blob, "/thermal-zones/soc-thermal/cooling-maps/map3"); diff --git a/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_yjh-jm10-3588/u-boot-rk35xx-legacy-001-change-config.patch b/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_yjh-jm10-3588/u-boot-rk35xx-legacy-001-change-config.patch new file mode 100644 index 000000000000..c38489dddc09 --- /dev/null +++ b/patch/u-boot/legacy/u-boot-radxa-rk35xx/board_yjh-jm10-3588/u-boot-rk35xx-legacy-001-change-config.patch @@ -0,0 +1,25 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 8 Dec 2024 22:34:39 +0800 +Subject: Patching u-boot rk35xx files configs/rk3588_defconfig + +Signed-off-by: John Doe +--- + configs/rk3588_defconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/configs/rk3588_defconfig b/configs/rk3588_defconfig +index b5a8234a710..c17e58612ce 100644 +--- a/configs/rk3588_defconfig ++++ b/configs/rk3588_defconfig +@@ -231,6 +231,6 @@ CONFIG_AVB_LIBAVB_AB=y + CONFIG_AVB_LIBAVB_ATX=y + CONFIG_AVB_LIBAVB_USER=y + CONFIG_RK_AVB_LIBAVB_USER=y + CONFIG_OPTEE_CLIENT=y + CONFIG_OPTEE_V2=y +-CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y ++CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=n +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/customize-image.sh b/userpatches/customize-image.sh new file mode 100644 index 000000000000..06204959c853 --- /dev/null +++ b/userpatches/customize-image.sh @@ -0,0 +1,244 @@ +#!/bin/bash + +# arguments: $RELEASE $LINUXFAMILY $BOARD $BUILD_DESKTOP +# +# This is the image customization script + +# NOTE: It is copied to /tmp directory inside the image +# and executed there inside chroot environment +# so don't reference any files that are not already installed + +# NOTE: If you want to transfer files between chroot and host +# userpatches/overlay directory on host is bind-mounted to /tmp/overlay in chroot +# The sd card's root path is accessible via $SDCARD variable. + +RELEASE=$1 +LINUXFAMILY=$2 +BOARD=$3 +BUILD_DESKTOP=$4 + +Main() { + case $RELEASE in + stretch) + # your code here + # InstallOpenMediaVault # uncomment to get an OMV 4 image + ;; + buster) + # your code here + ;; + bullseye) + # your code here + ;; + bionic) + # your code here + ;; + focal) + # your code here + ;; + esac +} # Main + +InstallOpenMediaVault() { + # use this routine to create a Debian based fully functional OpenMediaVault + # image (OMV 3 on Jessie, OMV 4 with Stretch). Use of mainline kernel highly + # recommended! + # + # Please note that this variant changes Armbian default security + # policies since you end up with root password 'openmediavault' which + # you have to change yourself later. SSH login as root has to be enabled + # through OMV web UI first + # + # This routine is based on idea/code courtesy Benny Stark. For fixes, + # discussion and feature requests please refer to + # https://forum.armbian.com/index.php?/topic/2644-openmediavault-3x-customize-imagesh/ + + echo root:openmediavault | chpasswd + rm /root/.not_logged_in_yet + . /etc/default/cpufrequtils + export LANG=C LC_ALL="en_US.UTF-8" + export DEBIAN_FRONTEND=noninteractive + export APT_LISTCHANGES_FRONTEND=none + + case ${RELEASE} in + jessie) + OMV_Name="erasmus" + OMV_EXTRAS_URL="https://github.com/OpenMediaVault-Plugin-Developers/packages/raw/master/openmediavault-omvextrasorg_latest_all3.deb" + ;; + stretch) + OMV_Name="arrakis" + OMV_EXTRAS_URL="https://github.com/OpenMediaVault-Plugin-Developers/packages/raw/master/openmediavault-omvextrasorg_latest_all4.deb" + ;; + esac + + # Add OMV source.list and Update System + cat > /etc/apt/sources.list.d/openmediavault.list <<- EOF + deb https://openmediavault.github.io/packages/ ${OMV_Name} main + ## Uncomment the following line to add software from the proposed repository. + deb https://openmediavault.github.io/packages/ ${OMV_Name}-proposed main + + ## This software is not part of OpenMediaVault, but is offered by third-party + ## developers as a service to OpenMediaVault users. + # deb https://openmediavault.github.io/packages/ ${OMV_Name} partner + EOF + + # Add OMV and OMV Plugin developer keys, add Cloudshell 2 repo for XU4 + if [ "${BOARD}" = "odroidxu4" ]; then + add-apt-repository -y ppa:kyle1117/ppa + sed -i 's/jessie/xenial/' /etc/apt/sources.list.d/kyle1117-ppa-jessie.list + fi + mount --bind /dev/null /proc/mdstat + apt-get update + apt-get --yes --force-yes --allow-unauthenticated install openmediavault-keyring + apt-key adv --keyserver hkp://keyserver.ubuntu.com:80 --recv-keys 7AA630A1EDEE7D73 + apt-get update + + # install debconf-utils, postfix and OMV + HOSTNAME="${BOARD}" + debconf-set-selections <<< "postfix postfix/mailname string ${HOSTNAME}" + debconf-set-selections <<< "postfix postfix/main_mailer_type string 'No configuration'" + apt-get --yes --force-yes --allow-unauthenticated --fix-missing --no-install-recommends \ + -o Dpkg::Options::="--force-confdef" -o Dpkg::Options::="--force-confold" install \ + debconf-utils postfix + # move newaliases temporarely out of the way (see Ubuntu bug 1531299) + cp -p /usr/bin/newaliases /usr/bin/newaliases.bak && ln -sf /bin/true /usr/bin/newaliases + sed -i -e "s/^::1 localhost.*/::1 ${HOSTNAME} localhost ip6-localhost ip6-loopback/" \ + -e "s/^127.0.0.1 localhost.*/127.0.0.1 ${HOSTNAME} localhost/" /etc/hosts + sed -i -e "s/^mydestination =.*/mydestination = ${HOSTNAME}, localhost.localdomain, localhost/" \ + -e "s/^myhostname =.*/myhostname = ${HOSTNAME}/" /etc/postfix/main.cf + apt-get --yes --force-yes --allow-unauthenticated --fix-missing --no-install-recommends \ + -o Dpkg::Options::="--force-confdef" -o Dpkg::Options::="--force-confold" install \ + openmediavault + + # install OMV extras, enable folder2ram and tweak some settings + FILE=$(mktemp) + wget "$OMV_EXTRAS_URL" -qO $FILE && dpkg -i $FILE + + /usr/sbin/omv-update + # Install flashmemory plugin and netatalk by default, use nice logo for the latter, + # tweak some OMV settings + . /usr/share/openmediavault/scripts/helper-functions + apt-get -y -q install openmediavault-netatalk openmediavault-flashmemory + AFP_Options="mimic model = Macmini" + SMB_Options="min receivefile size = 16384\nwrite cache size = 524288\ngetwd cache = yes\nsocket options = TCP_NODELAY IPTOS_LOWDELAY" + xmlstarlet ed -L -u "/config/services/afp/extraoptions" -v "$(echo -e "${AFP_Options}")" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/services/smb/extraoptions" -v "$(echo -e "${SMB_Options}")" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/services/flashmemory/enable" -v "1" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/services/ssh/enable" -v "1" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/services/ssh/permitrootlogin" -v "0" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/system/time/ntp/enable" -v "1" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/system/time/timezone" -v "UTC" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/system/network/dns/hostname" -v "${HOSTNAME}" /etc/openmediavault/config.xml + xmlstarlet ed -L -u "/config/system/monitoring/perfstats/enable" -v "0" /etc/openmediavault/config.xml + echo -e "OMV_CPUFREQUTILS_GOVERNOR=${GOVERNOR}" >>/etc/default/openmediavault + echo -e "OMV_CPUFREQUTILS_MINSPEED=${MIN_SPEED}" >>/etc/default/openmediavault + echo -e "OMV_CPUFREQUTILS_MAXSPEED=${MAX_SPEED}" >>/etc/default/openmediavault + for i in netatalk samba flashmemory ssh ntp timezone interfaces cpufrequtils monit collectd rrdcached ; do + /usr/sbin/omv-mkconf $i + done + /sbin/folder2ram -enablesystemd || true + sed -i 's|-j /var/lib/rrdcached/journal/ ||' /etc/init.d/rrdcached + + # Fix multiple sources entry on ARM with OMV4 + sed -i '/stretch-backports/d' /etc/apt/sources.list + + # rootfs resize to 7.3G max and adding omv-initsystem to firstrun -- q&d but shouldn't matter + echo 15500000s >/root/.rootfs_resize + sed -i '/systemctl\ disable\ armbian-firstrun/i \ + mv /usr/bin/newaliases.bak /usr/bin/newaliases \ + export DEBIAN_FRONTEND=noninteractive \ + sleep 3 \ + apt-get install -f -qq python-pip python-setuptools || exit 0 \ + pip install -U tzupdate \ + tzupdate \ + read TZ >/etc/modules + + # Special treatment for ODROID-XU4 (and later Amlogic S912, RK3399 and other big.LITTLE + # based devices). Move all NAS daemons to the big cores. With ODROID-XU4 a lot + # more tweaks are needed. CS2 repo added, CS1 workaround added, coherent_pool=1M + # set: https://forum.odroid.com/viewtopic.php?f=146&t=26016&start=200#p197729 + # (latter not necessary any more since we fixed it upstream in Armbian) + case ${BOARD} in + odroidxu4) + HMP_Fix='; taskset -c -p 4-7 $i ' + # Cloudshell stuff (fan, lcd, missing serials on 1st CS2 batch) + echo "H4sIAKdXHVkCA7WQXWuDMBiFr+eveOe6FcbSrEIH3WihWx0rtVbUFQqCqAkYGhJn + tF1x/vep+7oebDfh5DmHwJOzUxwzgeNIpRp9zWRegDPznya4VDlWTXXbpS58XJtD + i7ICmFBFxDmgI6AXSLgsiUop54gnBC40rkoVA9rDG0SHHaBHPQx16GN3Zs/XqxBD + leVMFNAz6n6zSWlEAIlhEw8p4xTyFtwBkdoJTVIJ+sz3Xa9iZEMFkXk9mQT6cGSQ + QL+Cr8rJJSmTouuuRzfDtluarm1aLVHksgWmvanm5sbfOmY3JEztWu5tV9bCXn4S + HB8RIzjoUbGvFvPw/tmr0UMr6bWSBupVrulY2xp9T1bruWnVga7DdAqYFgkuCd3j + vORUDQgej9HPJxmDDv+3WxblBSuYFH8oiNpHz8XvPIkU9B3JVCJ/awIAAA==" \ + | tr -d '[:blank:]' | base64 --decode | gunzip -c >/usr/local/sbin/cloudshell2-support.sh + chmod 755 /usr/local/sbin/cloudshell2-support.sh + apt install -y i2c-tools odroid-cloudshell cloudshell2-fan + sed -i '/systemctl\ disable\ armbian-firstrun/i \ + lsusb | grep -q -i "05e3:0735" && sed -i "/exit\ 0/i echo 20 > /sys/class/block/sda/queue/max_sectors_kb" /etc/rc.local \ + /usr/sbin/i2cdetect -y 1 | grep -q "60: 60" && /usr/local/sbin/cloudshell2-support.sh' /usr/lib/armbian/armbian-firstrun + ;; + bananapim3|nanopifire3|nanopct3plus|nanopim3) + HMP_Fix='; taskset -c -p 4-7 $i ' + ;; + edge*|ficus|firefly-rk3399|nanopct4|nanopim4|nanopineo4|renegade-elite|roc-rk3399-pc|rockpro64|station-p1) + HMP_Fix='; taskset -c -p 4-5 $i ' + ;; + esac + echo "* * * * * root for i in \`pgrep \"ftpd|nfsiod|smbd|afpd|cnid\"\` ; do ionice -c1 -p \$i ${HMP_Fix}; done >/dev/null 2>&1" \ + >/etc/cron.d/make_nas_processes_faster + chmod 600 /etc/cron.d/make_nas_processes_faster + + # add SATA port multiplier hint if appropriate + [ "${LINUXFAMILY}" = "sunxi" ] && \ + echo -e "#\n# If you want to use a SATA PM add \"ahci_sunxi.enable_pmp=1\" to bootargs above" \ + >>/boot/boot.cmd + + # Filter out some log messages + echo ':msg, contains, "do ionice -c1" ~' >/etc/rsyslog.d/omv-armbian.conf + echo ':msg, contains, "action " ~' >>/etc/rsyslog.d/omv-armbian.conf + echo ':msg, contains, "netsnmp_assert" ~' >>/etc/rsyslog.d/omv-armbian.conf + echo ':msg, contains, "Failed to initiate sched scan" ~' >>/etc/rsyslog.d/omv-armbian.conf + + # Fix little python bug upstream Debian 9 obviously ignores + if [ -f /usr/lib/python3.5/weakref.py ]; then + wget -O /usr/lib/python3.5/weakref.py \ + https://raw.githubusercontent.com/python/cpython/9cd7e17640a49635d1c1f8c2989578a8fc2c1de6/Lib/weakref.py + fi + + # clean up and force password change on first boot + umount /proc/mdstat + chage -d 0 root +} # InstallOpenMediaVault + +UnattendedStorageBenchmark() { + # Function to create Armbian images ready for unattended storage performance testing. + # Useful to use the same OS image with a bunch of different SD cards or eMMC modules + # to test for performance differences without wasting too much time. + + rm /root/.not_logged_in_yet + + apt-get -qq install time + + wget -qO /usr/local/bin/sd-card-bench.sh https://raw.githubusercontent.com/ThomasKaiser/sbc-bench/master/sd-card-bench.sh + chmod 755 /usr/local/bin/sd-card-bench.sh + + sed -i '/^exit\ 0$/i \ + /usr/local/bin/sd-card-bench.sh &' /etc/rc.local +} # UnattendedStorageBenchmark + +InstallAdvancedDesktop() +{ + apt-get install -yy transmission libreoffice libreoffice-style-tango meld remmina thunderbird kazam avahi-daemon + [[ -f /usr/share/doc/avahi-daemon/examples/sftp-ssh.service ]] && cp /usr/share/doc/avahi-daemon/examples/sftp-ssh.service /etc/avahi/services/ + [[ -f /usr/share/doc/avahi-daemon/examples/ssh.service ]] && cp /usr/share/doc/avahi-daemon/examples/ssh.service /etc/avahi/services/ + apt clean +} # InstallAdvancedDesktop + +Main "$@" diff --git a/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-001.patch b/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-001.patch new file mode 100644 index 000000000000..f57fdb0057c6 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-001.patch @@ -0,0 +1,1169 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Tue, 26 Nov 2024 14:45:04 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts | 1039 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 51 +- + 3 files changed, 1079 insertions(+), 13 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index aa008a5d35e7..2768e0de02b4 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-dg-tn3568.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +new file mode 100644 +index 000000000000..95010d4b5d5f +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +@@ -0,0 +1,1039 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3568.dtsi" ++#include "rk3568-linux.dtsi" ++ ++/ { ++ ++ model = "Rockchip RK3568 DG TN 3568"; ++ compatible = "rockchip,DG-tn3568", "rockchip,rk3568"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <1750>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <297500>; ++ }; ++ ++ menu-key { ++ label = "menu"; ++ linux,code = ; ++ press-threshold-microvolt = <980000>; ++ }; ++ ++ back-key { ++ label = "back"; ++ linux,code = ; ++ press-threshold-microvolt = <1305500>; ++ }; ++ }; ++ ++ audiopwmout_diff: audiopwmout-diff { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,audiopwmout-diff"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,bitclock-master = <&master>; ++ simple-audio-card,frame-master = <&master>; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s3_2ch>; ++ }; ++ master: simple-audio-card,codec { ++ sound-dai = <&dig_acodec>; ++ }; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ ++ ++ pdmics: dummy-codec { ++ status = "disabled"; ++ compatible = "rockchip,dummy-codec"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ pdm_mic_array: pdm-mic-array { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "rockchip,pdm-mic-array"; ++ simple-audio-card,cpu { ++ sound-dai = <&pdm>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&pdmics>; ++ }; ++ }; ++ ++ rk809_sound: rk809-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,rk809-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rk809_codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "disabled"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ vad_sound: vad-sound { ++ status = "disabled"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip,rk3568-vad"; ++ rockchip,cpu = <&i2s1_8ch>; ++ rockchip,codec = <&rk809_codec>, <&vad>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ vin-supply = <&vcc5v0_sys>; ++ ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_status: led-status { ++ label = "led-status"; ++ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_sys_h>; ++ }; ++ ++ led_on_board: led-on-board { ++ label = "led-on-board"; ++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ //linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_on_board_h>; ++ }; ++ ++ led_eth_y: led-eth-y { ++ label = "led-eth-y"; ++ gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; ++ //linux,default-trigger = "default-on"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_eth_y_h>; ++ }; ++ ++ led_eth_g: led-eth-g { ++ label = "led-eth-g"; ++ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; ++ //linux,default-trigger = "default-on"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_eth_g_h>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ pwms = <&pwm12 0 40000 0>; ++ fan-supply = <&dc_12v>; ++ interrupt-parent = <&gpio3>; ++ interrupts = <11 IRQ_TYPE_EDGE_FALLING>; ++ pulses-per-revolution = <2>; ++ cooling-levels = <0 50 100 150 200 255>; ++ rockchip,temp-trips = < ++ 40000 1 ++ 50000 2 ++ 55000 3 ++ 60000 4 ++ 70000 5 ++ >; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&can0 { ++ assigned-clocks = <&cru CLK_CAN0>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can0m1_pins>; ++ status = "disabled"; ++}; ++ ++&can1 { ++ assigned-clocks = <&cru CLK_CAN1>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can1m1_pins>; ++ status = "disabled"; ++}; ++ ++&can2 { ++ assigned-clocks = <&cru CLK_CAN2>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can2m1_pins>; ++ status = "disabled"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++ ++ system-status-level = < ++ /*system status freq level*/ ++ SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH ++ >; ++ ++ auto-freq-en = <0>; ++ ++}; ++ ++&gpu { ++ //clock-names = "gpu", "bus"; ++ //interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&pwm12 { ++ pinctrl-0 = <&pwm12m1_pins>; ++ pinctrl-names = "active"; ++ status = "okay"; ++}; ++ ++&pwm4 { ++ status = "disabled"; ++}; ++ ++&pwm5 { ++ status = "disabled"; ++}; ++ ++&csi2_dphy_hw { ++ status = "disabled"; ++}; ++ ++&csi2_dphy0 { ++ status = "disabled"; ++}; ++ ++&rkisp { ++ status = "disabled"; ++}; ++ ++&rkisp_mmu { ++ status = "disabled"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ ++ vdd_cpu: regulator@1c { ++ compatible = "tcs,tcs4525"; ++ reg = <0x1c>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1150000>; ++ regulator-ramp-delay = <2300>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ rk809_codec: codec { ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; ++ clocks = <&cru I2S1_MCLKOUT>; ++ clock-names = "mclk"; ++ assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; ++ assigned-clock-rates = <12288000>; ++ assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_mclk>; ++ hp-volume = <20>; ++ spk-volume = <3>; ++ mic-in-differential; ++ status = "okay"; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "okay"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "disabled"; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&sata0 { ++ status = "disabled"; ++}; ++ ++&sata1 { ++ status = "okay"; ++}; ++ ++/* PCIE */ ++&combphy2_psq { ++ status = "disabled"; ++}; ++ ++&uart0 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>; ++}; ++ ++&uart3 { ++ status = "disabled"; ++}; ++ ++&uart4 { ++ status = "disabled"; ++}; ++ ++&uart5 { ++ status = "disabled"; ++}; ++ ++&uart7 { ++ status = "disabled"; ++}; ++ ++&uart8 { ++ status = "disabled"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ }; ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x2a>; ++ rx_delay = <0x2a>; ++ ++ phy-handle = <&rgmii_phy0>; ++ phy-supply = <&vcc_3v3>; ++ status = "okay"; ++}; ++ ++ ++ ++&gmac1 { ++ status = "disabled"; ++}; ++ ++&can1 { ++ assigned-clocks = <&cru CLK_CAN1>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can1m1_pins>; ++ status = "disabled"; ++}; ++ ++&can2 { ++ assigned-clocks = <&cru CLK_CAN2>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can2m1_pins>; ++ status = "disabled"; ++}; ++ ++ ++&pcie2x1 { ++ status = "disabled"; ++}; ++ ++&pcie30phy { ++ status = "disabled"; ++}; ++ ++&pcie3x2 { ++ status = "disabled"; ++}; ++ ++&rk809_codec { ++ status = "disabled"; ++ spk-mute-delay-ms = <30>; ++}; ++ ++&rk809_sound { ++ status = "disabled"; ++}; ++ ++ ++ ++/* 瀵瑰簲lede usb2phy0_host */ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲lede usb2phy0_otg */ ++&u2phy0_otg { ++ vbus-supply = <&vcc5v0_host>; ++ status = "disabled"; ++}; ++ ++/* lede usb2phy1_host */ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* lede usb2phy1_otg */ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ vbus-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++/*USB3.0 controller 瀵瑰簲lede usb_host0_xhci */ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ //extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++/*USB3.0 OTG PHY*/ ++&combphy0_us { ++ status = "okay"; ++ phy-supply = <&vcc5v0_host>; ++}; ++ ++/*USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲lede usb_host1_xhci */ ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲lede combphy1 */ ++&combphy1_usq { ++// rockchip,dis-u3otg1-port; ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++ ++&pinctrl { ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA2 1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA2 2 &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_eth_y_h: led_eth_y_h { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_eth_g_h: led_eth_g_h { ++ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_sys_h: led_sys_h { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_on_board_h: led_on_board_h { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ status = "okay"; ++ ++// /delete-property/ pmuio1-supply; ++// /delete-property/ vccio2-supply; ++ ++ ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs200-1_8v; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sfc { ++ status = "okay"; ++}; ++ ++&spdif_8ch { ++ status = "disabled"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&its { ++ status = "okay"; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <&i2s1_8ch>; ++ rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; +\ No newline at end of file +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index cf9c46ea426e..b845b1b9e870 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -25,12 +25,14 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 ++static int dev_num = 0; + + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); +@@ -2709,10 +2711,35 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2727,25 +2754,25 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- random_ether_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); ++ + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-002-dts.patch b/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-002-dts.patch new file mode 100644 index 000000000000..fbdb38ed10b5 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-002-dts.patch @@ -0,0 +1,859 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 1 Dec 2024 17:47:47 +0800 +Subject: Patching kernel rk35xx files + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts | 474 ++-------- + 1 file changed, 95 insertions(+), 379 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +index 95010d4b5d5f..95b5fc9ca08a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +@@ -25,128 +25,20 @@ / { + + chosen: chosen { + bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; + }; + +- adc_keys: adc-keys { +- compatible = "adc-keys"; +- io-channels = <&saradc 0>; +- io-channel-names = "buttons"; +- keyup-threshold-microvolt = <1800000>; +- poll-interval = <100>; +- +- vol-up-key { +- label = "volume up"; +- linux,code = ; +- press-threshold-microvolt = <1750>; +- }; +- +- vol-down-key { +- label = "volume down"; +- linux,code = ; +- press-threshold-microvolt = <297500>; +- }; +- +- menu-key { +- label = "menu"; +- linux,code = ; +- press-threshold-microvolt = <980000>; +- }; +- +- back-key { +- label = "back"; +- linux,code = ; +- press-threshold-microvolt = <1305500>; +- }; +- }; +- +- audiopwmout_diff: audiopwmout-diff { +- status = "disabled"; +- compatible = "simple-audio-card"; +- simple-audio-card,format = "i2s"; +- simple-audio-card,name = "rockchip,audiopwmout-diff"; +- simple-audio-card,mclk-fs = <256>; +- simple-audio-card,bitclock-master = <&master>; +- simple-audio-card,frame-master = <&master>; +- simple-audio-card,cpu { +- sound-dai = <&i2s3_2ch>; +- }; +- master: simple-audio-card,codec { +- sound-dai = <&dig_acodec>; +- }; +- }; + + dc_12v: dc-12v { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + +- +- +- pdmics: dummy-codec { +- status = "disabled"; +- compatible = "rockchip,dummy-codec"; +- #sound-dai-cells = <0>; +- }; +- +- pdm_mic_array: pdm-mic-array { +- status = "disabled"; +- compatible = "simple-audio-card"; +- simple-audio-card,name = "rockchip,pdm-mic-array"; +- simple-audio-card,cpu { +- sound-dai = <&pdm>; +- }; +- simple-audio-card,codec { +- sound-dai = <&pdmics>; +- }; +- }; +- +- rk809_sound: rk809-sound { +- status = "okay"; +- compatible = "simple-audio-card"; +- simple-audio-card,format = "i2s"; +- simple-audio-card,name = "rockchip,rk809-codec"; +- simple-audio-card,mclk-fs = <256>; +- +- simple-audio-card,cpu { +- sound-dai = <&i2s1_8ch>; +- }; +- simple-audio-card,codec { +- sound-dai = <&rk809_codec>; +- }; +- }; +- +- spdif-sound { +- status = "disabled"; +- compatible = "simple-audio-card"; +- simple-audio-card,name = "ROCKCHIP,SPDIF"; +- simple-audio-card,cpu { +- sound-dai = <&spdif_8ch>; +- }; +- simple-audio-card,codec { +- sound-dai = <&spdif_out>; +- }; +- }; +- +- spdif_out: spdif-out { +- status = "disabled"; +- compatible = "linux,spdif-dit"; +- #sound-dai-cells = <0>; +- }; +- +- vad_sound: vad-sound { +- status = "disabled"; +- compatible = "rockchip,multicodecs-card"; +- rockchip,card-name = "rockchip,rk3568-vad"; +- rockchip,cpu = <&i2s1_8ch>; +- rockchip,codec = <&rk809_codec>, <&vad>; +- }; +- + vcc3v3_sys: vcc3v3-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; +@@ -176,10 +68,19 @@ vcc5v0_host: vcc5v0-host-regulator { + + vin-supply = <&vcc5v0_sys>; + + }; + ++ vbus: vbus-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vbus"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ }; ++ + test-power { + status = "okay"; + }; + + leds { +@@ -202,19 +103,19 @@ led_on_board: led-on-board { + }; + + led_eth_y: led-eth-y { + label = "led-eth-y"; + gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; +- //linux,default-trigger = "default-on"; ++ linux,default-trigger = "default-on"; + pinctrl-names = "default"; + pinctrl-0 = <&led_eth_y_h>; + }; + + led_eth_g: led-eth-g { + label = "led-eth-g"; + gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; +- //linux,default-trigger = "default-on"; ++ linux,default-trigger = "default-on"; + pinctrl-names = "default"; + pinctrl-0 = <&led_eth_g_h>; + }; + }; + +@@ -235,38 +136,25 @@ fan: pwm-fan { + >; + }; + + }; + +-&bus_npu { +- bus-supply = <&vdd_logic>; +- pvtm-supply = <&vdd_cpu>; +- status = "okay"; +-}; +- +-&can0 { +- assigned-clocks = <&cru CLK_CAN0>; +- assigned-clock-rates = <150000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&can0m1_pins>; +- status = "disabled"; ++/* 瀵瑰簲涓荤嚎 combphy1 */ ++&combphy1_usq { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; + }; + +-&can1 { +- assigned-clocks = <&cru CLK_CAN1>; +- assigned-clock-rates = <150000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&can1m1_pins>; +- status = "disabled"; ++/* 瀵瑰簲涓荤嚎 combphy2 */ ++&combphy2_psq { ++ status = "okay"; + }; + +-&can2 { +- assigned-clocks = <&cru CLK_CAN2>; +- assigned-clock-rates = <150000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&can2m1_pins>; +- status = "disabled"; ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; + }; + + &cpu0 { + cpu-supply = <&vdd_cpu>; + }; +@@ -281,10 +169,17 @@ &cpu2 { + + &cpu3 { + cpu-supply = <&vdd_cpu>; + }; + ++&gpu { ++ //clock-names = "gpu", "bus"; ++ //interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ + &dfi { + status = "okay"; + }; + + &dmc { +@@ -298,50 +193,16 @@ SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH + + auto-freq-en = <0>; + + }; + +-&gpu { +- //clock-names = "gpu", "bus"; +- //interrupt-names = "gpu", "mmu", "job"; +- mali-supply = <&vdd_gpu>; +- status = "okay"; +-}; +- + &pwm12 { + pinctrl-0 = <&pwm12m1_pins>; + pinctrl-names = "active"; + status = "okay"; + }; + +-&pwm4 { +- status = "disabled"; +-}; +- +-&pwm5 { +- status = "disabled"; +-}; +- +-&csi2_dphy_hw { +- status = "disabled"; +-}; +- +-&csi2_dphy0 { +- status = "disabled"; +-}; +- +-&rkisp { +- status = "disabled"; +-}; +- +-&rkisp_mmu { +- status = "disabled"; +-}; +- +-&rkisp_vir0 { +- status = "disabled"; +-}; + + &i2c0 { + status = "okay"; + + +@@ -360,33 +221,22 @@ vdd_cpu: regulator@1c { + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + +- + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; +- interrupts = <3 IRQ_TYPE_LEVEL_LOW>; +- +- pinctrl-names = "default", "pmic-sleep", +- "pmic-power-off", "pmic-reset"; +- pinctrl-0 = <&pmic_int>; +- pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; +- pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; +- pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; +- +- rockchip,system-power-controller; +- wakeup-source; ++ interrupts = ; + #clock-cells = <1>; ++ #sound-dai-cells = <0>; + clock-output-names = "rk808-clkout1", "rk808-clkout2"; +- //fb-inner-reg-idxs = <2>; +- /* 1: rst regs (default in codes), 0: rst the pmic */ +- pmic-reset-func = <0>; +- /* not save the PMIC_POWER_EN register in uboot */ +- not-save-power-en = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; + + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; +@@ -425,33 +275,33 @@ rk817_slppin_rst: rk817_slppin_rst { + }; + }; + + regulators { + vdd_logic: DCDC_REG1 { ++ regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; +- regulator-name = "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { ++ regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; + regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; +- regulator-name = "vdd_gpu"; +- regulator-state-mem { ++ regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { +@@ -468,21 +318,20 @@ vdd_npu: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-init-microvolt = <900000>; +- regulator-ramp-delay = <6001>; + regulator-initial-mode = <0x2>; + regulator-name = "vdd_npu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { +- regulator-boot-on; + regulator-always-on; ++ regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + regulator-name = "vdda0v9_image"; + regulator-state-mem { + regulator-off-in-suspend; +@@ -522,61 +371,64 @@ regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { ++ regulator-name = "vccio_sd"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; +- regulator-name = "vccio_sd"; ++ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { ++ regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +- regulator-name = "vcc3v3_pmu"; ++ + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { ++ regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +- regulator-name = "vcca_1v8"; ++ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { ++ regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +- regulator-name = "vcca1v8_pmu"; ++ + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { +- regulator-always-on; +- regulator-boot-on; ++ regulator-name = "vcca1v8_image"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; +- regulator-name = "vcca1v8_image"; ++ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + +@@ -590,43 +442,29 @@ regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { ++ regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; +- regulator-name = "vcc_3v3"; ++ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { ++ regulator-name = "vcc3v3_sd"; + regulator-always-on; + regulator-boot-on; +- regulator-name = "vcc3v3_sd"; ++ + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; +- +- rk809_codec: codec { +- #sound-dai-cells = <0>; +- compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; +- clocks = <&cru I2S1_MCLKOUT>; +- clock-names = "mclk"; +- assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; +- assigned-clock-rates = <12288000>; +- assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; +- pinctrl-names = "default"; +- pinctrl-0 = <&i2s1m0_mclk>; +- hp-volume = <20>; +- spk-volume = <3>; +- mic-in-differential; +- status = "okay"; +- }; + }; + }; + + &i2s0_8ch { + status = "okay"; +@@ -640,23 +478,14 @@ &i2s1_8ch { + &i2s1m0_lrcktx + &i2s1m0_sdi0 + &i2s1m0_sdo0>; + }; + +- +-&i2c2 { +- status = "disabled"; +-}; +- + &i2c3 { + status = "okay"; + }; + +-&i2c4 { +- status = "disabled"; +-}; +- + &iep { + status = "okay"; + }; + + &iep_mmu { +@@ -673,63 +502,21 @@ &jpegd_mmu { + + &mpp_srv { + status = "okay"; + }; + +-&sata0 { +- status = "disabled"; +-}; +- + &sata1 { + status = "okay"; + }; + +-/* PCIE */ +-&combphy2_psq { +- status = "disabled"; +-}; +- +-&uart0 { +- status = "disabled"; +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_xfer>; +-}; +- +-&uart3 { +- status = "disabled"; +-}; +- +-&uart4 { +- status = "disabled"; +-}; +- +-&uart5 { +- status = "disabled"; +-}; +- +-&uart7 { +- status = "disabled"; +-}; +- +-&uart8 { +- status = "disabled"; +-}; +- + &mdio0 { + rgmii_phy0: phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; + }; + +-&mdio1 { +- rgmii_phy1: phy@1 { +- compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <0x1>; +- }; +-}; +- + &gmac0 { + phy-mode = "rgmii"; + clock_in_out = "input"; + + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; +@@ -752,165 +539,106 @@ &gmac0_rgmii_clk + rx_delay = <0x2a>; + + phy-handle = <&rgmii_phy0>; + phy-supply = <&vcc_3v3>; + status = "okay"; +-}; +- +- +- +-&gmac1 { +- status = "disabled"; +-}; +- +-&can1 { +- assigned-clocks = <&cru CLK_CAN1>; +- assigned-clock-rates = <150000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&can1m1_pins>; +- status = "disabled"; +-}; +- +-&can2 { +- assigned-clocks = <&cru CLK_CAN2>; +- assigned-clock-rates = <150000000>; +- pinctrl-names = "default"; +- pinctrl-0 = <&can2m1_pins>; +- status = "disabled"; +-}; +- +- +-&pcie2x1 { +- status = "disabled"; +-}; ++}; + +-&pcie30phy { +- status = "disabled"; +-}; +- +-&pcie3x2 { +- status = "disabled"; +-}; +- +-&rk809_codec { +- status = "disabled"; +- spk-mute-delay-ms = <30>; +-}; +- +-&rk809_sound { +- status = "disabled"; +-}; +- +- +- +-/* 瀵瑰簲lede usb2phy0_host */ +-&u2phy0_host { +- phy-supply = <&vcc5v0_host>; +- status = "okay"; +-}; +- +-/* 瀵瑰簲lede usb2phy0_otg */ ++/* ++// 瀵瑰簲lede usb2phy0_otg + &u2phy0_otg { + vbus-supply = <&vcc5v0_host>; + status = "disabled"; + }; + +-/* lede usb2phy1_host */ +-&u2phy1_host { +- phy-supply = <&vcc5v0_host>; ++// lede usb2phy1_otg ++&u2phy1_otg { + status = "okay"; + }; + +-/* lede usb2phy1_otg */ +-&u2phy1_otg { ++&usb_host0_ehci { + status = "okay"; + }; + +-&usb2phy0 { ++&usb_host0_ohci { + status = "okay"; + }; + +-&usb2phy1 { +- vbus-supply = <&vcc5v0_host>; ++&usb_host1_ehci { + status = "okay"; + }; + +-&usb_host0_ehci { ++&usb_host1_ohci { + status = "okay"; + }; + +-&usb_host0_ohci { ++//USB3.0 OTG PHY 瀵瑰簲涓荤嚎combphy0 ++&combphy0_us { + status = "okay"; ++ phy-supply = <&vcc5v0_host>; + }; + +-&usb_host1_ehci { ++//涓荤嚎鏃 ++&usbdrd30 { + status = "okay"; + }; + +-&usb_host1_ohci { ++//涓荤嚎鏃 ++&usbhost30 { + status = "okay"; + }; ++*/ + +-/*USB3.0 controller 瀵瑰簲lede usb_host0_xhci */ ++/*USB3.0 controller 瀵瑰簲涓荤嚎 usb_host0_xhci */ + &usbdrd_dwc3 { + dr_mode = "host"; +- //extcon = <&usb2phy0>; + status = "okay"; + }; + +-&usbdrd30 { ++&usb2phy0 { + status = "okay"; + }; + +-&usbhost_dwc3 { ++/* 瀵瑰簲涓荤嚎 usb2phy0_host */ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; + status = "okay"; + }; + +-&usbhost30 { +- status = "okay"; ++/*USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲涓荤嚎 usb_host1_xhci */ ++&usbhost_dwc3 { ++ status = "okay"; + }; + +-/*USB3.0 OTG PHY*/ +-&combphy0_us { ++&usb2phy1 { ++ vbus-supply = <&vcc5v0_host>; + status = "okay"; +- phy-supply = <&vcc5v0_host>; + }; + +-/*USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲lede usb_host1_xhci */ ++/* 瀵瑰簲涓荤嚎 usb2phy1_host */ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; + +-&usbhost_dwc3 { +- status = "okay"; ++/* 瀵瑰簲涓荤嚎 usb2phy1_host */ ++&u2phy1_otg { ++ //dg-r phy-supply = <&vcc5v0_host>; ++ status = "okay"; + }; + +-/* 瀵瑰簲lede combphy1 */ +-&combphy1_usq { +-// rockchip,dis-u3otg1-port; +- phy-supply = <&vcc5v0_host>; ++/* USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲涓荤嚎 usb_host1_xhci */ ++&usbhost_dwc3 { + status = "okay"; + }; + +- + &pinctrl { +- pmic { +- pmic_int: pmic_int { +- rockchip,pins = +- <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; +- }; +- +- soc_slppin_gpio: soc_slppin_gpio { +- rockchip,pins = +- <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; +- }; + +- soc_slppin_slp: soc_slppin_slp { +- rockchip,pins = +- <0 RK_PA2 1 &pcfg_pull_up>; +- }; + +- soc_slppin_rst: soc_slppin_rst { +- rockchip,pins = +- <0 RK_PA2 2 &pcfg_pull_none>; ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + leds { + led_eth_y_h: led_eth_y_h { +@@ -939,16 +667,11 @@ &pmu_io_domains { + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_1v8>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; +- status = "okay"; +- +-// /delete-property/ pmuio1-supply; +-// /delete-property/ vccio2-supply; +- +- ++ status = "okay"; + }; + + &rk_rga { + status = "okay"; + }; +@@ -1013,17 +736,10 @@ &its { + + &rng { + status = "okay"; + }; + +-&vad { +- rockchip,audio-src = <&i2s1_8ch>; +- rockchip,buffer-time-ms = <128>; +- rockchip,det-channel = <0>; +- rockchip,mode = <0>; +-}; +- + &vdpu { + status = "okay"; + }; + + &vdpu_mmu { +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-003-dts-usb.patch b/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-003-dts-usb.patch new file mode 100644 index 000000000000..926601e52d85 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-dg-tn3568/kernel-rk35xx-legacy-dg-tn3568-003-dts-usb.patch @@ -0,0 +1,85 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Thu, 26 Dec 2024 13:39:45 +0800 +Subject: Patching kernel rk35xx files + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts | 23 +++------- + 1 file changed, 7 insertions(+), 16 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +index 95b5fc9ca08a..2a24b26f0b01 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +@@ -68,19 +68,10 @@ vcc5v0_host: vcc5v0-host-regulator { + + vin-supply = <&vcc5v0_sys>; + + }; + +- vbus: vbus-regulator { +- compatible = "regulator-fixed"; +- regulator-name = "vbus"; +- regulator-always-on; +- regulator-boot-on; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- }; +- + test-power { + status = "okay"; + }; + + leds { +@@ -144,11 +135,11 @@ &combphy1_usq { + status = "okay"; + }; + + /* 瀵瑰簲涓荤嚎 combphy2 */ + &combphy2_psq { +- status = "okay"; ++ status = "disabled"; + }; + + &bus_npu { + bus-supply = <&vdd_logic>; + pvtm-supply = <&vdd_cpu>; +@@ -569,10 +560,16 @@ &usb_host1_ehci { + + &usb_host1_ohci { + status = "okay"; + }; + ++//涓荤嚎鏃 ++&usbhost30 { ++ status = "okay"; ++}; ++*/ ++ + //USB3.0 OTG PHY 瀵瑰簲涓荤嚎combphy0 + &combphy0_us { + status = "okay"; + phy-supply = <&vcc5v0_host>; + }; +@@ -580,16 +577,10 @@ &combphy0_us { + //涓荤嚎鏃 + &usbdrd30 { + status = "okay"; + }; + +-//涓荤嚎鏃 +-&usbhost30 { +- status = "okay"; +-}; +-*/ +- + /*USB3.0 controller 瀵瑰簲涓荤嚎 usb_host0_xhci */ + &usbdrd_dwc3 { + dr_mode = "host"; + status = "okay"; + }; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-dr4/kernel-rk35xx-legacy-dr4-01.patch b/userpatches/kernel/rockchip-5.10-dr4/kernel-rk35xx-legacy-dr4-01.patch new file mode 100644 index 000000000000..1ad490441444 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-dr4/kernel-rk35xx-legacy-dr4-01.patch @@ -0,0 +1,3226 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Wed, 7 Aug 2024 10:12:14 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3566-dr4.dts + arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi drivers/Makefile + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c drivers/rongpin/Kconfig + drivers/rongpin/Makefile drivers/rongpin/rp_fan_power.c + drivers/rongpin/rp_gpio.c drivers/rongpin/rp_keys.c + drivers/rongpin/rp_power.c drivers/rongpin/stm706.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3566-dr4.dts | 1358 ++++++++++ + arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi | 69 + + drivers/Makefile | 1 + + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 50 +- + drivers/rongpin/Kconfig | 21 + + drivers/rongpin/Makefile | 5 + + drivers/rongpin/rp_fan_power.c | 294 ++ + drivers/rongpin/rp_gpio.c | 318 +++ + drivers/rongpin/rp_keys.c | 440 +++ + drivers/rongpin/rp_power.c | 349 +++ + drivers/rongpin/stm706.c | 171 ++ + 12 files changed, 3065 insertions(+), 13 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index aa008a5d35e7..2a600447a2a1 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-dr4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts +new file mode 100644 +index 000000000000..7ad485daf49b +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts +@@ -0,0 +1,1358 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++/dts-v1/; ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3566-dr4.dtsi" ++#include "rk3568-linux.dtsi" ++ ++/ { ++ ++ model = "dr4-rk3566-rmt"; ++ compatible = "rockchip,rk3566-dr4", "rockchip,rk3566"; ++ ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ edp_panel:panel { ++ status = "disabled"; ++ }; ++ ++ lvds_panel: panel@0 { ++ status = "disabled"; ++ }; ++ ++ audiopwmout_diff: audiopwmout-diff { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,audiopwmout-diff"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,bitclock-master = <&master>; ++ simple-audio-card,frame-master = <&master>; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s3_2ch>; ++ }; ++ master: simple-audio-card,codec { ++ sound-dai = <&dig_acodec>; ++ }; ++ }; ++ ++ ++ rk_headset: rk-headset { ++ compatible = "rockchip_headset"; ++ status = "disabled"; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ status = "okay"; ++ compatible = "rockchip,hdmi"; ++ rockchip,mclk-fs = <128>; ++ rockchip,name = "rockchip,hdmi"; ++ rockchip,cpu = <&i2s0_8ch>; ++ rockchip,codec = <&hdmi>; ++ rockchip,jack-det; ++ ++ }; ++ ++ pdmics: dummy-codec { ++ status = "disabled"; ++ compatible = "rockchip,dummy-codec"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ pdm_mic_array: pdm-mic-array { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "rockchip,pdm-mic-array"; ++ simple-audio-card,cpu { ++ sound-dai = <&pdm>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&pdmics>; ++ }; ++ }; ++ ++ rk809_sound: rk809-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,rk809-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rk809_codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "disabled"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ vad_sound: vad-sound { ++ status = "disabled"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip,rk3568-vad"; ++ rockchip,cpu = <&i2s1_8ch>; ++ rockchip,codec = <&rk809_codec>, <&vad>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ ++ vcc3v3_lcd0_n: vcc3v3-lcd0-n { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_lcd0_n"; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ //gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_lcd1_n: vcc3v3-lcd1-n { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_lcd1_n"; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ //gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc3v3_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ post-power-on-delay-ms = <200>; ++ reset-gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "ap6398s"; ++ status = "disabled"; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ //wifi-bt-power-toggle; ++ uart_rts_gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart1m1_rtsn>; ++ pinctrl-1 = <&uart1_gpios>; ++ BT,reset_gpio = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; ++ status = "disabled"; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++/* ++ fan_gpio_control { ++ compatible = "fan_gpio_control"; ++ gpio-pin = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; ++ temperature-device = "soc-thermal"; ++ temp-on = <45000>; ++ time = <30000>; ++ status = "okay"; ++ }; ++*/ ++ rp_power{ ++ status = "okay"; ++ compatible = "rp_power"; ++ rp_not_deep_sleep = <1>; ++ ++ //#define GPIO_FUNCTION_OUTPUT 0 ++ //#define GPIO_FUNCTION_INPUT 1 ++ //#define GPIO_FUNCTION_IRQ 2 ++ //#define GPIO_FUNCTION_FLASH 3 ++ //#define GPIO_FUNCTION_OUTPUT_CTRL 4 ++ ++ /** ++ * gpioxxx { // the node name will display on /proc/rp_power, you can define any character string ++ * gpio_num = <>; // gpio you want ot control ++ * gpio_function = <>; // function of current gpio, refer to above define. ++ * }; ++ */ ++ ++ ++ /******* sytem power en pin, donnot change it only if you know what you are doing */ ++ pwr_en { //vdd 12v/5v/3.3v enable ++ gpio_num = <&gpio2 RK_PB3 GPIO_ACTIVE_HIGH>; ++ gpio_function = <0>; ++ }; ++ ++ vdd_3g { //vdd_3G 3.3v enable ++ gpio_num = <&gpio1 RK_PC7 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ spk_en { //SPK ENABLE ++ gpio_num = <&gpio4 RK_PC4 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ spk_mute { //SPK MUTE, high active, nomal low ++ gpio_num = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; ++ gpio_function = <4>; ++ }; ++ ++ hub_rst { //usb hub reset pin ++ gpio_num = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ host1_5v { //host1 usb2.0 power en ++ gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ host2_5v { //host2 usb2.0 power en ++ gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ host3_5v { //host2 usb2.0 power en ++ gpio_num = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ usb20_5v { //usb2.0 power en ++ gpio_num = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ usb30_5v { //usb3.0 power en ++ gpio_num = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ++ gpio_function = <4>; ++ }; ++ ++ otg_idctl { ++ gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; ++ gpio_function = <0>; ++ }; ++ ++ }; ++ ++ ++ rp_gpio{ ++ status = "okay"; ++ compatible = "rp_gpio"; ++ ++ /***** gpio, add you want to control as blow */ ++ ++ gpio0c5 { ++ gpio_num = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; ++ gpio_function = <0>; ++ }; ++ gpio0c7 { ++ gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; ++ gpio_function = <0>; ++ }; ++ gpio1a4 { ++ gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; ++ gpio_function = <0>; ++ }; ++ }; ++ ++ /** 24M osc clock to mcp2515 */ ++ osc_24m: osc24m { ++ compatible = "fixed-clock"; ++ #clock-cells = <0>; ++ clock-frequency = <24000000>; ++ }; ++ ++ backlight0: white { ++ compatible = "pwm-backlight"; ++ power-supply = <&vcc3v3_sys>; ++ pwms = <&pwm4 0 25000 0>; ++ brightness-levels = < ++ 0 20 20 21 21 22 22 23 ++ 23 24 24 25 25 26 26 27 ++ 27 28 28 29 29 30 30 31 ++ 31 32 32 33 33 34 34 35 ++ 35 36 36 37 37 38 38 39 ++ 40 41 42 43 44 45 46 47 ++ 48 49 50 51 52 53 54 55 ++ 56 57 58 59 60 61 62 63 ++ 64 65 66 67 68 69 70 71 ++ 72 73 74 75 76 77 78 79 ++ 80 81 82 83 84 85 86 87 ++ 88 89 90 91 92 93 94 95 ++ 96 97 98 99 100 101 102 103 ++ 104 105 106 107 108 109 110 111 ++ 112 113 114 115 116 117 118 119 ++ 120 121 122 123 124 125 126 127 ++ 128 129 130 131 132 133 134 135 ++ 136 137 138 139 140 141 142 143 ++ 144 145 146 147 148 149 150 151 ++ 152 153 154 155 156 157 158 159 ++ 160 161 162 163 164 165 166 167 ++ 168 169 170 171 172 173 174 175 ++ 176 177 178 179 180 181 182 183 ++ 184 185 186 187 188 189 190 191 ++ 192 193 194 195 196 197 198 199 ++ 200 201 202 203 204 205 206 207 ++ 208 209 210 211 212 213 214 215 ++ 216 217 218 219 220 221 222 223 ++ 224 225 226 227 228 229 230 231 ++ 232 233 234 235 236 237 238 239 ++ 240 241 242 243 244 245 246 247 ++ 248 249 250 251 252 253 254 255 ++ >; ++ default-brightness-level = <255>; ++ }; ++ ++ backlight2: red { ++ compatible = "pwm-backlight"; ++ power-supply = <&vcc3v3_sys>; ++ pwms = <&pwm2 0 25000 0>; ++ brightness-levels = < ++ 0 20 20 21 21 22 22 23 ++ 23 24 24 25 25 26 26 27 ++ 27 28 28 29 29 30 30 31 ++ 31 32 32 33 33 34 34 35 ++ 35 36 36 37 37 38 38 39 ++ 40 41 42 43 44 45 46 47 ++ 48 49 50 51 52 53 54 55 ++ 56 57 58 59 60 61 62 63 ++ 64 65 66 67 68 69 70 71 ++ 72 73 74 75 76 77 78 79 ++ 80 81 82 83 84 85 86 87 ++ 88 89 90 91 92 93 94 95 ++ 96 97 98 99 100 101 102 103 ++ 104 105 106 107 108 109 110 111 ++ 112 113 114 115 116 117 118 119 ++ 120 121 122 123 124 125 126 127 ++ 128 129 130 131 132 133 134 135 ++ 136 137 138 139 140 141 142 143 ++ 144 145 146 147 148 149 150 151 ++ 152 153 154 155 156 157 158 159 ++ 160 161 162 163 164 165 166 167 ++ 168 169 170 171 172 173 174 175 ++ 176 177 178 179 180 181 182 183 ++ 184 185 186 187 188 189 190 191 ++ 192 193 194 195 196 197 198 199 ++ 200 201 202 203 204 205 206 207 ++ 208 209 210 211 212 213 214 215 ++ 216 217 218 219 220 221 222 223 ++ 224 225 226 227 228 229 230 231 ++ 232 233 234 235 236 237 238 239 ++ 240 241 242 243 244 245 246 247 ++ 248 249 250 251 252 253 254 255 ++ >; ++ default-brightness-level = <0>; ++ }; ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++ ++&gpu { ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++/* old mali ++&gpu { ++ clock-names = "clk_mali", "clk_gpu"; ++ interrupt-names = "GPU", "MMU", "JOB"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&gpu_opp_table { ++ opp-200000000 { ++ opp-supported-hw = <0xfb 0xffff>; ++ opp-hz = /bits/ 64 <200000000>; ++ opp-microvolt = <850000 850000 1000000>; ++ }; ++ opp-300000000 { ++ opp-supported-hw = <0xfb 0xffff>; ++ opp-hz = /bits/ 64 <300000000>; ++ opp-microvolt = <850000 850000 1000000>; ++ }; ++ opp-400000000 { ++ opp-supported-hw = <0xfb 0xffff>; ++ opp-hz = /bits/ 64 <400000000>; ++ opp-microvolt = <850000 850000 1000000>; ++ }; ++ opp-600000000 { ++ opp-supported-hw = <0xfb 0xffff>; ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt = <900000 900000 1000000>; ++ opp-microvolt-L0 = <900000 900000 1000000>; ++ opp-microvolt-L1 = <875000 875000 1000000>; ++ opp-microvolt-L2 = <850000 850000 1000000>; ++ opp-microvolt-L3 = <850000 850000 1000000>; ++ }; ++ opp-700000000 { ++ opp-supported-hw = <0xfb 0xffff>; ++ opp-hz = /bits/ 64 <700000000>; ++ opp-microvolt = <950000 950000 1000000>; ++ opp-microvolt-L0 = <950000 950000 1000000>; ++ opp-microvolt-L1 = <925000 925000 1000000>; ++ opp-microvolt-L2 = <900000 900000 1000000>; ++ opp-microvolt-L3 = <875000 875000 1000000>; ++ }; ++ opp-800000000 { ++ opp-supported-hw = <0xf9 0xffff>; ++ opp-hz = /bits/ 64 <800000000>; ++ opp-microvolt = <1000000 1000000 1000000>; ++ opp-microvolt-L0 = <1000000 1000000 1000000>; ++ opp-microvolt-L1 = <975000 975000 1000000>; ++ opp-microvolt-L2 = <950000 950000 1000000>; ++ opp-microvolt-L3 = <925000 925000 1000000>; ++ }; ++}; ++*/ ++ ++&i2c0 { ++ status = "okay"; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <950000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3000000>; ++ regulator-max-microvolt = <3000000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ rk809_codec: codec { ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; ++ clocks = <&cru I2S1_MCLKOUT>; ++ clock-names = "mclk"; ++ assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; ++ assigned-clock-rates = <12288000>; ++ assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_mclk>; ++ hp-volume = <50>; //3(max)-255(min) ++ spk-volume = <50>; //3(max)-255(min) ++ capture_volume = <255>; ++ //mic-in-differential; ++ status = "okay"; ++ }; ++ }; ++ ++ vdd_cpu: tcs4525@1c { ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1390000>; ++ regulator-init-microvolt = <1000000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++}; ++ ++&i2c1 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c4m1_xfer>; ++ ++ rtc@51 { ++ status = "okay"; ++ compatible = "rtc,hym8563"; ++ reg = <0x51>; ++ irq_gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>; ++ }; ++}; ++ ++&i2c5 { ++ status = "disabled"; ++}; ++ ++&i2s0_8ch { ++ status = "disabled"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&nandc0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ nand@0 { ++ reg = <0>; ++ nand-bus-width = <8>; ++ nand-ecc-mode = "hw"; ++ nand-ecc-strength = <16>; ++ nand-ecc-step-size = <1024>; ++ }; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>, <&cru CLK_MAC1_OUT>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>,<&gmac1_clkin>; ++ assigned-clock-rates = <0>, <125000000>, <25000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m0_miim ++ &gmac1m0_tx_bus2 ++ &gmac1m0_rx_bus2 ++ &gmac1m0_rgmii_clk ++ &gmac1m0_rgmii_bus ++ &gmac1m0_clkinout ++ ð1m0_pins>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x34>; ++ phy-handle = <&rgmii_phy1>; ++ status = "okay"; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ clocks = <&cru CLK_MAC1_OUT>; ++ }; ++}; ++ ++// jmb575 sata2 must open ++&uart0 { ++ status = "okay"; ++}; ++ ++/*&uart3 { //AUDIOPWM ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3m0_xfer>; ++}; ++*/ ++&uart5 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5m1_xfer>; ++}; ++ ++&uart6 { //okay ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart6m0_xfer>; ++}; ++ ++&uart7 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart7m0_xfer>; ++}; ++ ++ ++&uart9 { //okay ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart9m0_xfer>; ++}; ++ ++ ++&spi1 { ++ status = "disabled"; ++ /* rewrite pinctrl, for cs1 used to be gpio */ ++ pinctrl-0 = <&spi1m0_cs0 &spi1m0_pins>; ++ pinctrl-1 = <&spi1m0_cs0 &spi1m0_pins_hs>; ++ ++ spi2can: mcp2515@0 { ++ compatible = "microchip,mcp2515"; ++ reg = <0>; ++ clocks = <&osc_24m>; ++ interrupt-parent = <&gpio2>; ++ interrupts = ; ++ // vdd-supply = <®5v0>; ++ // xceiver-supply = <®5v0>; ++ spi-max-frequency = <10000000>; ++ }; ++}; ++ ++&spi2 { ++ status = "okay"; ++ /* rewrite pinctrl, for cs1 used to be gpio */ ++ pinctrl-0 = <&spi2m0_cs0 &spi2m0_pins>; ++ pinctrl-1 = <&spi2m0_cs0 &spi2m0_pins_hs>; ++ ++ spi2_dev@0 { ++ compatible = "rockchip,spidev"; ++ reg = <0>; ++ spi-max-frequency = <12000000>; ++ spi-lsb-first; ++ }; ++}; ++ ++&spi3 { ++ status = "okay"; ++ ++ /* rewrite pinctrl for cs1 used to be camera clk */ ++ pinctrl-0 = <&spi3m0_cs0 &spi3m0_pins>; ++ pinctrl-1 = <&spi3m0_cs0 &spi3m0_pins_hs>; ++ ++ spi3_dev@0 { ++ compatible = "rockchip,spidev"; ++ reg = <0>; ++ spi-max-frequency = <12000000>; ++ spi-lsb-first; ++ }; ++}; ++ ++ ++&pinctrl { ++ ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA2 1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA2 2 &pcfg_pull_none>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ uart1_gpios: uart1-gpios { ++ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++ /* ++ * There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7]. ++ * 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured; ++ * 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages ++ * must be consistent with the software configuration correspondingly ++ * a/ When the hardware IO level is connected to 1.8V, the software voltage configuration ++ * should also be configured to 1.8V accordingly; ++ * b/ When the hardware IO level is connected to 3.3V, the software voltage configuration ++ * should also be configured to 3.3V accordingly; ++ * 3/ VCCIO2 voltage control selection (0xFDC20140) ++ * BIT[0]: 0x0: from GPIO_0A7 (default) ++ * BIT[0]: 0x1: from GRF ++ * Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7: ++ * L:VCCIO2 must supply 3.3V ++ * H:VCCIO2 must supply 1.8V ++ */ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_3v3>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++}; ++ ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++&hdmi_in_vp1 { ++ status = "disabled"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ status = "okay"; ++}; ++ ++&sdmmc0 { ++ max-frequency = <150000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v3_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; ++ status = "okay"; ++}; ++ ++&sdmmc2 { ++ max-frequency = <150000000>; ++ supports-sdio; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; ++ sd-uhs-sdr104; ++ status = "disabled"; ++}; ++ ++&sfc { ++ status = "okay"; ++}; ++ ++&spdif_8ch { ++ status = "disabled"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&combphy0_us { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++// phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++// vbus-supply = <&vcc5v0_otg>; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++ ++//add ++ quirk-skip-phy-init; ++ snps,usb2-lpm-disable; ++ ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <&i2s1_8ch>; ++ rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&dsi0 { ++dsi0_panel: panel@0 { ++ status = "disabled"; ++ }; ++}; ++ ++&dsi1 { ++dsi1_panel: panel@0 { ++ status = "disabled"; ++ }; ++}; ++ ++ ++&audiopwmout_diff { ++ status = "disabled"; ++}; ++ ++&dig_acodec { ++ status = "disabled"; ++ rockchip,pwm-output-mode; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&audiopwm_loutp ++ &audiopwm_loutn ++ &audiopwm_routp ++ &audiopwm_routn ++ >; ++}; ++&pdm { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pdmm1_clk1 ++ &pdmm1_sdi1 ++ &pdmm1_sdi2 ++ &pdmm1_sdi3>; ++}; ++ ++&pdmics { ++ status = "disabled"; ++}; ++ ++&pdm_mic_array { ++ status = "disabled"; ++}; ++ ++// sata usb30 pcie phys ++ ++&combphy1_usq { ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ status = "okay"; ++}; ++ ++&sata0 { ++ status = "disabled"; ++}; ++ ++&sata1 { ++ status = "disabled"; ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "okay"; ++}; ++ ++/* about beep*/ ++&pwm4 { ++ status = "okay"; ++}; ++ ++&pwm6 { ++ status = "okay"; ++}; ++ ++&pwm7 { ++ /** disable for used to be led control */ ++ status = "disabled"; ++}; ++ ++//gpio0_b0 for hub reset pin ++/delete-node/ &xin32k; ++ ++&rockchip_suspend { ++ status = "disabled"; ++}; +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi +new file mode 100644 +index 000000000000..7c7561787a6c +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi +@@ -0,0 +1,69 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ */ ++ ++#include "rk3568.dtsi" ++ ++/ { ++ aliases { ++ /delete-property/ ethernet0; ++ /delete-property/ lvds1; ++ }; ++}; ++ ++&cpu0_opp_table { ++ /delete-node/ opp-1992000000; ++}; ++ ++&lpddr4_params { ++ /* freq info, freq_0 is final frequency, unit: MHz */ ++ freq_0 = <1056>; ++}; ++ ++&lpddr4x_params { ++ /* freq info, freq_0 is final frequency, unit: MHz */ ++ freq_0 = <1056>; ++}; ++ ++&power { ++ pd_pipe@RK3568_PD_PIPE { ++ reg = ; ++ clocks = <&cru PCLK_PIPE>; ++ pm_qos = <&qos_pcie2x1>, ++ <&qos_sata1>, ++ <&qos_sata2>, ++ <&qos_usb3_0>, ++ <&qos_usb3_1>; ++ }; ++}; ++ ++&rkisp { ++ rockchip,iq-feature = /bits/ 64 <0x1BFBF7FE67FF>; ++}; ++ ++&usbdrd_dwc3 { ++ phys = <&u2phy0_otg>; ++ phy-names = "usb2-phy"; ++ extcon = <&usb2phy0>; ++ maximum-speed = "high-speed"; ++ snps,dis_u2_susphy_quirk; ++ snps,usb2-lpm-disable; ++}; ++ ++///delete-node/ &combphy0_us; ++/delete-node/ &gmac0_clkin; ++/delete-node/ &gmac0_xpcsclk; ++/delete-node/ &gmac0; ++/delete-node/ &gmac_uio0; ++/delete-node/ &lvds1; ++/delete-node/ &pcie30_phy_grf; ++/delete-node/ &pcie30phy; ++/delete-node/ &pcie3x1; ++/delete-node/ &pcie3x2; ++/delete-node/ &qos_pcie3x1; ++/delete-node/ &qos_pcie3x2; ++/delete-node/ &qos_sata0; ++///delete-node/ &sata0; ++/delete-node/ &vp1_out_lvds1; ++/delete-node/ &vp2_out_lvds1; +diff --git a/drivers/Makefile b/drivers/Makefile +index 21cb5565c1d5..9695850dd200 100644 +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -191,5 +191,6 @@ obj-$(CONFIG_COUNTER) += counter/ + obj-$(CONFIG_MOST) += most/ + obj-$(CONFIG_RK_FLASH) += rkflash/ + obj-$(CONFIG_RK_HEADSET) += headset_observe/ + obj-$(CONFIG_RK_NAND) += rk_nand/ + obj-$(CONFIG_ROCKCHIP_RKNPU) += rknpu/ ++obj-y += rongpin/ +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index cf9c46ea426e..8892191ac40b 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -25,13 +25,16 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 + ++static int dev_num = 0; ++ + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); + void (*set_to_rmii)(struct rk_priv_data *bsp_priv); +@@ -2709,10 +2712,34 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2727,25 +2754,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- random_ether_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +diff --git a/drivers/rongpin/Kconfig b/drivers/rongpin/Kconfig +new file mode 100644 +index 000000000000..031091b1e9b1 +--- /dev/null ++++ b/drivers/rongpin/Kconfig +@@ -0,0 +1,21 @@ ++ ++menu "rongpin support" ++ ++config RP_POWER ++ tristate "rongpin power_ctrl support" ++ default y ++ help ++ rp_power_ctrl ++ ++config RP_GPIO ++ default y ++ tristate "rongpin rp gpio_ctl support" ++ ++config RP_STM706 ++ tristate "rongpin rp stm706 support" ++ default y ++ ++config RP_FAN ++ default y ++ tristate "rongpin rp fan_ctl support" ++endmenu +diff --git a/drivers/rongpin/Makefile b/drivers/rongpin/Makefile +new file mode 100644 +index 000000000000..1df9af9f2fc8 +--- /dev/null ++++ b/drivers/rongpin/Makefile +@@ -0,0 +1,5 @@ ++obj-y += rp_power.o ++obj-y += rp_gpio.o ++obj-$(CONFIG_RP_STM706) += stm706.o ++obj-y += rp_fan_power.o ++obj-y += rp_keys.o +diff --git a/drivers/rongpin/rp_fan_power.c b/drivers/rongpin/rp_fan_power.c +new file mode 100644 +index 000000000000..784c356dcb66 +--- /dev/null ++++ b/drivers/rongpin/rp_fan_power.c +@@ -0,0 +1,294 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++// #include ++#include ++#include ++#include ++#include ++#define GPIO_PIN 50 ++#define GPIO_NUM_MAX 40 ++//static dev_t dev; ++//static struct cdev cdev; ++static struct workqueue_struct *fan_gpio_workqueue; ++//static struct work_struct fan_gpio_work; ++//static struct timer_list fan_gpio_timer; ++ ++struct fan_gpio{ ++ int gpio_num; ++ int action; ++ int temp_on; ++ int time; ++}; ++ ++struct fan_gpio_control_data { ++ struct fan_gpio fan_gpio_num; ++ char thermal_zone_device; ++}; ++ ++static char* file_name = NULL; ++static struct fan_gpio_control_data *fan_gpio_data = NULL; ++//static int open_now = 1; ++static int fan_temp; ++static int fan_time; ++static const char *thermal_device; ++ ++static int fan_gpio_open(struct inode *inode, struct file *file) ++{ ++ struct dentry* dent = file->f_path.dentry; ++ //int i = 0; ++ ++ file_name = (char*)(dent->d_name.name); ++ ++ /*for (i = 0; i < fan_gpio_data->gpio_dts_num; i++){ ++ if(!strcmp(file_name,fan_gpio_data->fan_gpio_num[i].gpio_name)){ ++ open_now = i; ++ } ++ }*/ ++ return 0; ++} ++ ++ ++static ssize_t fan_gpio_write(struct file *file, const char *buffer,size_t count, loff_t *data) ++{ ++ char temp_str[20]; ++ int ret; ++ ++ ret = copy_from_user(temp_str, buffer, min(count, sizeof(temp_str) - 1)); ++ if (ret < 0) { ++ return ret; ++ } ++ ++ temp_str[count] = '\0'; ++ ++ ret = kstrtoint(temp_str, 10, &fan_temp); ++ if (ret < 0) { ++ pr_err("Failed to convert input to integer\n"); ++ return ret; ++ } ++ ++ return count; ++} ++ ++static ssize_t fan_gpio_read(struct file *file, char __user * buffer, size_t count, loff_t *data) ++{ ++ int *new_temp_on = &fan_temp; ++ char temp_str[10]; ++ int len; ++ ++ len = snprintf(temp_str, sizeof(temp_str), "%d\n", *new_temp_on); ++ ++ temp_str[len] = '\0'; ++ ++ return simple_read_from_buffer(buffer, count, data, temp_str, len); ++} ++ ++static int fan_time_open(struct inode *inode, struct file *file) ++{ ++ struct dentry* dent = file->f_path.dentry; ++ //int i = 0; ++ ++ file_name = (char*)(dent->d_name.name); ++ ++ /*for (i = 0; i < fan_gpio_data->gpio_dts_num; i++){ ++ if(!strcmp(file_name,fan_gpio_data->fan_gpio_num[i].gpio_name)){ ++ open_now = i; ++ } ++ }*/ ++ return 0; ++} ++ ++ ++static ssize_t fan_time_write(struct file *file, const char *buffer,size_t count, loff_t *data) ++{ ++ char time_str[20]; ++ int ret; ++ ++ ret = copy_from_user(time_str, buffer, min(count, sizeof(time_str) - 1)); ++ if (ret < 0) { ++ return ret; ++ } ++ ++ time_str[count] = '\0'; ++ ++ ret = kstrtoint(time_str, 10, &fan_time); ++ if (ret < 0) { ++ pr_err("Failed to convert input to integer\n"); ++ return ret; ++ } ++ ++ return count; ++} ++ ++static ssize_t fan_time_read(struct file *file, char __user * buffer, size_t count, loff_t *data) ++{ ++ int *new_time = &fan_time; ++ char time_str[10]; ++ int len; ++ ++ len = snprintf(time_str, sizeof(time_str), "%d\n", *new_time); ++ ++ time_str[len] = '\0'; ++ ++ return simple_read_from_buffer(buffer, count, data, time_str, len); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) ++static const struct proc_ops fan_gpio_ops = { ++ .proc_open = fan_gpio_open, ++ .proc_write = fan_gpio_write, ++ .proc_read = fan_gpio_read, ++}; ++static const struct proc_ops fan_time_ops = { ++ .proc_open = fan_time_open, ++ .proc_write = fan_time_write, ++ .proc_read = fan_time_read, ++}; ++#else ++static struct file_operations fan_gpio_fops = { ++ .owner = THIS_MODULE, ++ .open = fan_gpio_open, ++ .write = fan_gpio_write, ++ .read = fan_gpio_read, ++}; ++static struct file_operations fan_time_fops = { ++ .owner = THIS_MODULE, ++ .open = fan_time_open, ++ .write = fan_time_write, ++ .read = fan_time_read, ++}; ++#endif ++ ++static struct delayed_work fan_gpio_delayed_work; ++ ++static void fan_gpio_delayed_work_callback(struct work_struct *work){ ++ int temperature; ++ struct thermal_zone_device *thermal_dev; ++ int temp; ++ ++ thermal_dev = thermal_zone_get_zone_by_name(thermal_device); ++ ++ temp = thermal_zone_get_temp(thermal_dev, &temperature); ++ ++ if(temperature < fan_temp) { ++ ++ gpio_set_value(fan_gpio_data->fan_gpio_num.gpio_num, 0); ++ queue_delayed_work(fan_gpio_workqueue, &fan_gpio_delayed_work, msecs_to_jiffies(1000)); ++ } ++ else if(temperature >= fan_temp) { ++ ++ gpio_set_value(fan_gpio_data->fan_gpio_num.gpio_num, 1); ++ queue_delayed_work(fan_gpio_workqueue, &fan_gpio_delayed_work, msecs_to_jiffies(fan_time)); ++ } ++ else{ ++ printk("error:work_handler failed"); ++ queue_delayed_work(fan_gpio_workqueue, &fan_gpio_delayed_work, msecs_to_jiffies(1000)); ++ } ++ ++}; ++ ++//static void fan_gpio_timer_callback(struct timer_list *t){ ++// queue_work(fan_gpio_workqueue, &fan_gpio_work); ++//} ++ ++static int fan_gpio_probe(struct platform_device *pdev){ ++ ++ int ret; ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *tmp = pdev->dev.of_node; ++ enum of_gpio_flags gpio_flags; ++ static struct proc_dir_entry *root_entry_fan; ++ //struct device_node *child_np; ++ ++ printk("init fan_gpio probe"); ++ ++ fan_gpio_data = devm_kzalloc(&pdev->dev, sizeof(struct fan_gpio_control_data), GFP_KERNEL); ++ ++ if (!fan_gpio_data) { ++ ++ return -ENOMEM; ++ } ++ ++ //Get Data from DTS ++ fan_gpio_data->fan_gpio_num.gpio_num = of_get_named_gpio_flags(np, "gpio-pin", 0, &gpio_flags); ++ fan_gpio_data->thermal_zone_device = of_property_read_string(tmp, "temperature-device", &thermal_device); ++ of_property_read_u32(np, "temp-on",&fan_temp); ++ of_property_read_u32(np, "time",&fan_time); ++ ++ ++ ret = gpio_request(fan_gpio_data->fan_gpio_num.gpio_num, "fan_gpio_control"); ++ if(ret < 0){ ++ ++ pr_err("Failed to request GPIO %d\n", GPIO_PIN); ++ ++ return -EINVAL; ++ } ++ ++ gpio_direction_output(fan_gpio_data->fan_gpio_num.gpio_num, gpio_flags); ++ ++ //Create proc/rp_fan ++ root_entry_fan = proc_mkdir("rp_fan", NULL); ++ proc_create("temp", 0666 , root_entry_fan , &fan_gpio_ops); ++ proc_create("time", 0666 , root_entry_fan , &fan_time_ops); ++ ++ //Work team ++ fan_gpio_workqueue = create_workqueue("fan_gpio_workqueue"); ++ if(!fan_gpio_workqueue) { ++ ++ pr_err("Failed to get work handler"); ++ return -EINVAL; ++ } ++ ++ INIT_DELAYED_WORK(&fan_gpio_delayed_work, fan_gpio_delayed_work_callback); ++ queue_delayed_work(fan_gpio_workqueue, &fan_gpio_delayed_work, msecs_to_jiffies(1000)); ++ ++ ++ //timer ++ //timer_setup(&fan_gpio_timer,fan_gpio_timer_callback,0); ++ //mod_timer(&fan_gpio_timer, jiffies + msecs_to_jiffies(1000)); ++ ++ platform_set_drvdata(pdev, fan_gpio_data); ++ pr_info("GPIO Control Driver Loaded\n"); ++ return 0; ++} ++ ++static int fan_gpio_remove(struct platform_device *pdev) { ++ ++ pr_info("GPIO Control Driver Unloaded\n"); ++ return 0; ++} ++ ++static const struct of_device_id gpio_of_match[] = { ++ { .compatible = "fan_gpio_control" }, ++ { } ++}; ++ ++static struct platform_driver fan_gpio_driver = { ++ .probe = fan_gpio_probe, ++ .remove = fan_gpio_remove, ++ .driver = { ++ .name = "fan_gpio_control", ++ .of_match_table = of_match_ptr(gpio_of_match), ++ }, ++}; ++ ++ ++MODULE_LICENSE("GPL"); ++module_platform_driver(fan_gpio_driver); +diff --git a/drivers/rongpin/rp_gpio.c b/drivers/rongpin/rp_gpio.c +new file mode 100644 +index 000000000000..b8fa06b8c3ee +--- /dev/null ++++ b/drivers/rongpin/rp_gpio.c +@@ -0,0 +1,318 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++ ++#define GPIO_NUM_MAX 40 ++ ++#define GPIO_FUNCTION_OUTPUT 0 ++#define GPIO_FUNCTION_INPUT 1 ++#define GPIO_FUNCTION_IRQ 2 ++#define GPIO_FUNCTION_FLASH 3 ++ ++static int flash_flag = 0; ++ ++struct rp_gpio { ++ int gpio_num; //gpui num ++ int gpio_irq; ++ int action; //gpio flag ++ int gpio_event; //input only ++ int send_mode; //input only ++ int gpio_function; //gpio function,i/o ++ int gpio_ctrl; ++ char *gpio_name; ++}; ++ ++struct rp_gpio_data { ++ struct rp_gpio rp_gpio_num[GPIO_NUM_MAX]; ++ struct input_dev *input; ++ struct timer_list mytimer; ++ int gpio_dts_num; ++}; ++ ++static struct rp_gpio_data *gpio_data = NULL; ++static int event_flag = 0; ++static int open_now = 0; ++static char* file_name = NULL; ++ ++ ++static int gpio_open(struct inode *inode, struct file *file) ++{ ++ struct dentry* dent = file->f_path.dentry; ++ int i = 0; ++ ++ file_name = (char*)(dent->d_name.name); ++ ++ for (i = 0; i < gpio_data->gpio_dts_num; i++){ ++ if(!strcmp(file_name,gpio_data->rp_gpio_num[i].gpio_name)){ ++ open_now = i; ++ } ++ } ++ return 0; ++} ++ ++ ++static ssize_t gpio_write(struct file *file, const char *buffer,size_t count, loff_t *data) ++{ ++ char buf[2]={0}; ++ char s1[]="1"; ++ ++ if(copy_from_user(&buf[0],buffer,1)){ ++ printk("failed to copy data to kernel space\n"); ++ return -EFAULT; ++ } ++ ++ if(!strcmp(buf,s1)){ ++ // gpio_direction_output(gpio_data->rp_gpio_num[open_now].gpio_num,1); ++ gpio_set_value_cansleep(gpio_data->rp_gpio_num[open_now].gpio_num,1); ++ // printk("%s write 1 succeed\n",gpio_data->rp_gpio_num[open_now].gpio_name); ++ }else{ ++ // gpio_direction_output(gpio_data->rp_gpio_num[open_now].gpio_num,0); ++ gpio_set_value_cansleep(gpio_data->rp_gpio_num[open_now].gpio_num,0); ++ // printk("%s write 0 succeed\n",gpio_data->rp_gpio_num[open_now].gpio_name); ++ } ++ return count; ++} ++ ++ ++static ssize_t gpio_read(struct file *file, char __user * buffer, size_t count, loff_t *data) ++{ ++ int gpio_val = 0; ++ int len = 0; ++ char s[10] = {0}; ++ ++ if(*data) ++ return 0; ++ ++ gpio_val = gpio_get_value_cansleep(gpio_data->rp_gpio_num[open_now].gpio_num); ++// printk("get %s value %d\n",gpio_data->rp_gpio_num[open_now].gpio_name,gpio_val); ++ ++ len = sprintf(s+len, "%d\n",gpio_val); ++ ++ return simple_read_from_buffer(buffer, count, data, s, 2); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 6, 0)) ++static const struct proc_ops gpio_ops = { ++ .proc_open = gpio_open, ++ .proc_write = gpio_write, ++ .proc_read = gpio_read, ++}; ++#else ++static const struct file_operations gpio_ops = { ++ .owner = THIS_MODULE, ++ .open = gpio_open, ++ .write = gpio_write, ++ .read = gpio_read, ++}; ++#endif ++ ++static struct workqueue_struct *my_workqueue; ++static struct work_struct my_work; ++ ++static void send_event(struct work_struct *work) ++{ ++ int gpio_value = 0; ++ int i = 0; ++ for(i = 0; i <= gpio_data->gpio_dts_num; i++) { ++ switch(gpio_data->rp_gpio_num[i].gpio_function) { ++ case GPIO_FUNCTION_INPUT : ++ gpio_value = gpio_get_value_cansleep(gpio_data->rp_gpio_num[i].gpio_num); ++ ++ if(gpio_value == 1){ ++ input_report_key(gpio_data->input, gpio_data->rp_gpio_num[i].gpio_event, 1); ++ input_sync(gpio_data->input); ++ } ++ if(gpio_value == 0){ ++ input_report_key(gpio_data->input, gpio_data->rp_gpio_num[i].gpio_event, 0); ++ input_sync(gpio_data->input); ++ } ++ ++ //printk("\n%s gpio num %d %d\n",__func__,gpio_data->rp_gpio_num[i].gpio_num,gpio_value); ++ //printk("\n%s send event %d\n",__func__,gpio_data->rp_gpio_num[i].gpio_event); ++ break; ++ case GPIO_FUNCTION_FLASH : ++ // gpio_direction_output(gpio_data->rp_gpio_num[i].gpio_num,!flash_flag); ++ if(gpio_is_valid(gpio_data->rp_gpio_num[i].gpio_num)){ ++ gpio_set_value_cansleep(gpio_data->rp_gpio_num[i].gpio_num,!flash_flag); ++ flash_flag = !flash_flag; ++ } ++ break; ++ } ++ } ++ ++ mod_timer(&(gpio_data->mytimer), jiffies + msecs_to_jiffies(1000)); ++} ++ ++static void timer_callback(struct timer_list *t) ++{ ++ schedule_work(&my_work); ++} ++ ++static int rp_gpio_probe(struct platform_device *pdev) { ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *child_np; ++ struct device *dev = &pdev->dev; ++ static struct proc_dir_entry *root_entry_gpio; ++ enum of_gpio_flags gpio_flags; ++ int ret = 0; ++ int gpio_cnt = 0; ++ char gpio_name_num[GPIO_NUM_MAX]; ++ int gpio_in_cnt = 0; ++ int cnt =0; ++ ++ gpio_data = devm_kzalloc(&pdev->dev, sizeof(struct rp_gpio_data),GFP_KERNEL); ++ if (!gpio_data) { ++ dev_err(&pdev->dev, "failed to allocate memory\n"); ++ return -ENOMEM; ++ } ++ ++ gpio_data->gpio_dts_num = of_get_child_count(np); ++ printk("rp_gpio prepare build %d gpio\n",gpio_data->gpio_dts_num); ++ ++ if (gpio_data->gpio_dts_num == 0){ ++ dev_info(&pdev->dev, "no gpio defined\n"); ++ } ++ ++ /* create node */ ++ root_entry_gpio = proc_mkdir("rp_gpio", NULL); ++ ++ for_each_child_of_node(np, child_np) ++ { ++ /* parse dts */ ++ gpio_data->rp_gpio_num[gpio_cnt].gpio_num = of_get_named_gpio_flags(child_np, "gpio_num", 0, &gpio_flags); ++ if (!gpio_is_valid(gpio_data->rp_gpio_num[gpio_cnt].gpio_num)){ ++ printk("gpio %d is invalid!!!!\n", gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ } ++ ++ gpio_data->rp_gpio_num[gpio_cnt].gpio_name = (char*)child_np -> name; ++ gpio_data->rp_gpio_num[gpio_cnt].action = gpio_flags; ++ gpio_data->rp_gpio_num[gpio_cnt].gpio_ctrl = gpio_cnt; ++ of_property_read_u32(child_np, "gpio_function", &(gpio_data->rp_gpio_num[gpio_cnt].gpio_function)); ++ ++ printk("rp_gpio request %s\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_name); ++ ++ ++ switch(gpio_data->rp_gpio_num[gpio_cnt].gpio_function) { ++ case GPIO_FUNCTION_INPUT : /* init input gpio */ ++ ret = gpio_request(gpio_data->rp_gpio_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0) ++ { ++ printk("gpio%d request error\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ }else{ ++ printk("success request gpio %d in\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ ++ //gpio_direction_output(gpio_data->rp_gpio_num[gpio_cnt].gpio_num,!gpio_data->rp_gpio_num[gpio_cnt].action); ++ gpio_direction_input(gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ event_flag = gpio_flags; ++ of_property_read_u32(child_np, "send_mode", &(gpio_data->rp_gpio_num[gpio_cnt].send_mode)); ++ of_property_read_u32(child_np, "gpio_event", &(gpio_data->rp_gpio_num[gpio_cnt].gpio_event)); ++ gpio_in_cnt++; ++ } ++ break; ++ ++ case GPIO_FUNCTION_OUTPUT : /* init output gpio */ ++ ret = gpio_request(gpio_data->rp_gpio_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0){ ++ printk("gpio%d request error\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ //return ret; ++ }else{ ++ gpio_direction_output(gpio_data->rp_gpio_num[gpio_cnt].gpio_num,!gpio_data->rp_gpio_num[gpio_cnt].action); ++ printk("success request gpio%d out\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ } ++ break; ++ ++ case GPIO_FUNCTION_FLASH : ++ ret = gpio_request(gpio_data->rp_gpio_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0){ ++ printk("gpio%d request error\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ //return ret; ++ }else{ ++ gpio_direction_output(gpio_data->rp_gpio_num[gpio_cnt].gpio_num,!gpio_data->rp_gpio_num[gpio_cnt].action); ++ printk("success request gpio%d flash\n",gpio_data->rp_gpio_num[gpio_cnt].gpio_num); ++ gpio_in_cnt++; ++ ++ } ++ break; ++ } ++ ++ sprintf(gpio_name_num,gpio_data->rp_gpio_num[gpio_cnt].gpio_name,gpio_cnt); ++ proc_create(gpio_name_num, 0666 , root_entry_gpio , &gpio_ops); ++ gpio_cnt++; ++ } ++ ++ if (gpio_in_cnt > 0) ++ { ++ // create workqueue ++ my_workqueue = create_workqueue("my_workqueue"); ++ ++ // init workqueue ++ INIT_WORK(&my_work, send_event); ++ ++ // init timer ++ timer_setup(&gpio_data->mytimer, timer_callback, 0); ++ ++ // set timer ++ mod_timer(&gpio_data->mytimer, jiffies + msecs_to_jiffies(10000)); ++ ++ ++ /* init struct input_dev */ ++ gpio_data->input = devm_input_allocate_device(dev); ++ gpio_data->input->name = "gpio_event"; /* pdev->name; */ ++ gpio_data->input->phys = "gpio_event/input1"; ++ gpio_data->input->dev.parent = dev; ++ gpio_data->input->id.bustype = BUS_HOST; ++ gpio_data->input->id.vendor = 0x0001; ++ gpio_data->input->id.product = 0x0001; ++ gpio_data->input->id.version = 0x0100; ++ for(cnt = 0; cnt < gpio_cnt; cnt++){ ++ if (gpio_data->rp_gpio_num[cnt].gpio_function == 1){ ++ input_set_capability(gpio_data->input, EV_KEY, gpio_data->rp_gpio_num[cnt].gpio_event); ++ } ++ } ++ ret = input_register_device(gpio_data->input); ++ } ++ ++ platform_set_drvdata(pdev, gpio_data); ++ return 0; ++} ++ ++static int rp_gpio_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++ ++static const struct of_device_id rp_gpio_of_match[] = { ++ { .compatible = "rp_gpio" }, ++ { } ++}; ++ ++static struct platform_driver rp_gpio_driver = { ++ .probe = rp_gpio_probe, ++ .remove = rp_gpio_remove, ++ .driver = { ++ .name = "rp_gpio", ++ .of_match_table = of_match_ptr(rp_gpio_of_match), ++ }, ++}; ++ ++module_platform_driver(rp_gpio_driver); ++MODULE_LICENSE("GPL"); +diff --git a/drivers/rongpin/rp_keys.c b/drivers/rongpin/rp_keys.c +new file mode 100644 +index 000000000000..6b112d622d24 +--- /dev/null ++++ b/drivers/rongpin/rp_keys.c +@@ -0,0 +1,440 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define rptips(str, ...) printk("rptips: "str, ##__VA_ARGS__) ++ ++struct gpio_keys_button { ++ unsigned int code; ++ int active_low; ++ const char *label; ++ unsigned int type; ++ int wakeup; ++ int debounce_interval; ++ int value; ++ /*unsigned int trigger;*/ ++ unsigned int press_type;// >0:long | 0:short ++}; ++ ++struct gpio_keys_platform_data { ++ const struct gpio_keys_button *buttons; ++ int nbuttons; ++ unsigned int rep:1; ++ const char *label; ++}; ++ ++struct gpio_button_data { ++ const struct gpio_keys_button *button; ++ struct input_dev *input; ++ struct gpio_desc *gpiod; ++ unsigned short *code; ++ struct delayed_work work; ++ unsigned int press; ++ unsigned int irq; ++}; ++ ++struct gpio_keys_drvdata { ++ const struct gpio_keys_platform_data *pdata; ++ struct input_dev *input; ++ unsigned short *keymap; ++ struct gpio_button_data data[]; ++}; ++ ++static int gpio_keys_enable_wakeup(struct gpio_keys_drvdata *ddata); ++static int gpio_keys_button_enable_wakeup(struct gpio_button_data *bdata); ++static void gpio_keys_gpio_work_func(struct work_struct *work); ++static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id); ++static struct gpio_keys_platform_data* gpio_keys_get_data_from_devtree(struct device *dev); ++static int gpio_keys_setup_key(struct platform_device *pdev, struct input_dev *input, ++ struct gpio_keys_drvdata *ddata, const struct gpio_keys_button *button, ++ int idx, struct fwnode_handle *child); ++static int gpio_keys_probe(struct platform_device *pdev); ++ ++static void gpio_keys_gpio_work_func(struct work_struct *work){ ++ struct gpio_button_data *bdata = ++ container_of(work, struct gpio_button_data, work.work); ++ struct input_dev *input = bdata->input; ++ int val; ++ ++ val = gpiod_get_value_cansleep(bdata->gpiod); ++ if (val < 0) { ++ rptips("err get gpio val: %d\n", val); ++ return; ++ } ++ input_event(input, EV_KEY, *bdata->code, !!val); ++ input_sync(input); ++ bdata->press = !!val; ++ if (bdata->button->wakeup) ++ pm_relax(bdata->input->dev.parent); ++ ++} ++ ++static irqreturn_t gpio_keys_gpio_isr(int irq, void *dev_id){ ++// interrupt service routine ++ struct gpio_button_data *bdata = dev_id; ++ ++ if(bdata->button->wakeup) ++ pm_stay_awake(bdata->input->dev.parent); ++ ++ mod_delayed_work(system_wq, ++ &bdata->work, ++ msecs_to_jiffies(bdata->button->debounce_interval + !bdata->press * bdata->button->press_type * 1000)); ++ ++ return IRQ_HANDLED; ++} ++ ++static struct gpio_keys_platform_data* ++gpio_keys_get_data_from_devtree(struct device *dev){ ++// parse data from device tree to platform data ++ int nbuttons = 0; ++ struct gpio_keys_platform_data *pdata; ++ struct gpio_keys_button *button; ++ struct fwnode_handle *child; ++ ++ nbuttons = device_get_child_node_count(dev); ++ if(!nbuttons){ ++ rptips("no keys dev\n"); ++ return ERR_PTR(-ENODEV); ++ } ++ rptips("button number: %d\n", nbuttons); ++ ++ pdata = devm_kzalloc(dev, sizeof(*pdata) + nbuttons * sizeof(*button), GFP_KERNEL); ++ if(!pdata){ ++ rptips("data alloc failed\n"); ++ return ERR_PTR(-ENOMEM); ++ } ++ ++ button = (struct gpio_keys_button*)(pdata + 1); ++ ++ pdata->buttons = button; ++ pdata->nbuttons = nbuttons; ++ ++ device_property_read_string(dev, "label", &pdata->label); ++ pdata->rep = device_property_read_bool(dev, "autorepeat"); ++ ++ device_for_each_child_node(dev, child){ ++ fwnode_property_read_string(child, "label", &button->label); ++ ++ button->type = EV_KEY; ++ if(fwnode_property_read_u32(child, "code", &button->code)){ ++ rptips("use default code : 1"); ++ button->code = 1; ++ } ++ rptips("code = %u\n", button->code); ++ ++ button->wakeup = fwnode_property_read_bool(child, "wakeup"); ++ rptips("wakeup=%d\n", button->wakeup); ++ ++ if(fwnode_property_read_u32(child, "debounce_interval", &button->debounce_interval)){ ++ button->debounce_interval = 10; ++ } ++ rptips("debounce interval=%d\n", button->debounce_interval); ++ ++ ++ if(fwnode_property_read_u32(child, "press_type", &button->press_type)){ ++ button->press_type = 0; ++ } ++ ++ button ++; ++ } ++ ++ return pdata; ++} ++ ++ ++static int gpio_keys_setup_key(struct platform_device *pdev, ++ struct input_dev *input, ++ struct gpio_keys_drvdata *ddata, ++ const struct gpio_keys_button *button, ++ int idx, ++ struct fwnode_handle *child){ ++// setup key ++ const char *label = button->label ? button->label : "rp_keys"; ++ struct device *dev = &pdev->dev; ++ struct gpio_button_data *bdata = &ddata->data[idx]; ++ irq_handler_t isr; ++ unsigned long irqflags; ++ int gpio = -1, bank = -1, group = -1; ++ int irq; ++ int error; ++ bool active_low; ++ char gpioname[10]; ++ ++ bdata->input = input; ++ bdata->button = button; ++ ++ bdata->gpiod = ++ devm_fwnode_get_gpiod_from_child(dev, NULL, child, GPIOD_IN, label); ++ if(IS_ERR(bdata->gpiod)){ ++ rptips("failed to get gpio, errnum:%ld\n", PTR_ERR(bdata->gpiod)); ++ return PTR_ERR(bdata->gpiod); ++ } ++ gpio = desc_to_gpio(bdata->gpiod); ++ ++ group = gpio / 32; ++ bank = (gpio - (group * 32)) / 8; ++ sprintf(gpioname, "GPIO%d%c%d", bank, 'A' + bank, gpio - group * 32 - bank * 8); ++ ++ rptips("gpio %d : %s\n", gpio, gpioname); ++ ++ active_low = gpiod_is_active_low(bdata->gpiod); ++ rptips("active low : %d\n", active_low); ++ ++ irq = gpiod_to_irq(bdata->gpiod); ++ if(irq < 0){ ++ rptips("err get irq for gpio %s\n", gpioname); ++ return irq; ++ } ++ bdata->irq = irq; ++ rptips("irq %d\n attach %s\n", irq, gpioname); ++ ++ INIT_DELAYED_WORK(&bdata->work, gpio_keys_gpio_work_func); ++ ++ bdata->press = 0; ++ ++ ++ bdata->code = &ddata->keymap[idx]; ++ *bdata->code = button->code; ++ input_set_capability(input, EV_KEY, *bdata->code); ++ ++ isr = gpio_keys_gpio_isr; ++ irqflags = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING; ++ error = devm_request_any_context_irq(dev, bdata->irq, isr, irqflags, label, bdata); ++ if(error < 0) { ++ rptips("request irq %d failed\n", bdata->irq); ++ return error; ++ } ++ ++ return 0; ++} ++ ++static int gpio_keys_probe(struct platform_device *pdev){ ++// probe ++ struct device *dev = &pdev->dev; ++ const struct gpio_keys_platform_data *pdata; ++ struct fwnode_handle *child = NULL; ++ struct gpio_keys_drvdata *ddata; ++ struct input_dev *input; ++ size_t size; ++ int i, error, wakeup = 0; ++ ++ pdata = gpio_keys_get_data_from_devtree(dev); ++ if(IS_ERR(pdata)) ++ return PTR_ERR(pdata); ++ ++ size = sizeof(struct gpio_keys_drvdata) + ++ pdata->nbuttons * sizeof(struct gpio_button_data); ++ ddata = devm_kzalloc(dev, size, GFP_KERNEL); ++ if(!ddata) { ++ rptips("failed to allocate ddata\n"); ++ return -ENOMEM; ++ } ++ ++ ddata->keymap = ++ devm_kcalloc(dev, pdata->nbuttons, sizeof(ddata->keymap[0]), GFP_KERNEL); ++ if(!ddata->keymap) ++ return -ENOMEM; ++ ++ input = devm_input_allocate_device(dev); ++ if(!input) { ++ rptips("failed to allocate input dev\n"); ++ return -ENOMEM; ++ } ++ ++ ddata->pdata = pdata; ++ ddata->input = input; ++ ++ input->name = pdev->name; ++ input->dev.parent = dev; ++ ++ ++ input->keycode = ddata->keymap; ++ input->keycodesize = sizeof(ddata->keymap[0]); ++ input->keycodemax = pdata->nbuttons; ++ ++ if(pdata->rep) ++ __set_bit(EV_REP, input->evbit); ++ ++ for(i = 0; i < pdata->nbuttons; i ++) { ++ const struct gpio_keys_button *button = &pdata->buttons[i]; ++ ++ child = device_get_next_child_node(dev, child); ++ if(!child) { ++ rptips("no child device node\n"); ++ return -EINVAL; ++ } ++ ++ error = gpio_keys_setup_key(pdev, input, ddata, button, i, child); ++ if(error) { ++ fwnode_handle_put(child); ++ return error; ++ } ++ ++ if(button->wakeup) ++ wakeup = 1; ++ } ++ fwnode_handle_put(child); ++ ++ error = input_register_device(input); ++ if(error) { ++ rptips("unable to register input dev\n"); ++ return error; ++ } ++ ++ platform_set_drvdata(pdev, ddata); ++ input_set_drvdata(input, ddata); ++ ++ if(wakeup){ ++ error = device_init_wakeup(dev, wakeup); ++ rptips("init wakeup,ret = %d\n", error); ++ // gpio_keys_enable_wakeup(ddata); ++ } ++ ++ return 0; ++} ++ ++ ++static int ++gpio_keys_button_enable_wakeup(struct gpio_button_data *bdata) ++{ ++ int error; ++ ++ error = enable_irq_wake(bdata->irq); ++ if (error) { ++ rptips("failed setup wakeup source IRQ: %d by err: %d\n", ++ bdata->irq, error); ++ return error; ++ } ++ ++ error = irq_set_irq_type(bdata->irq, IRQ_TYPE_EDGE_RISING | IRQ_TYPE_EDGE_FALLING); ++ if (error) { ++ rptips("failed to set wakeup trigger for IRQ %d: %d\n", bdata->irq, error); ++ disable_irq_wake(bdata->irq); ++ return error; ++ } ++ ++ return 0; ++} ++ ++static int ++gpio_keys_enable_wakeup(struct gpio_keys_drvdata *ddata) ++{ ++ struct gpio_button_data *bdata; ++ int error; ++ int i; ++ ++ for (i = 0; i < ddata->pdata->nbuttons; i++) { ++ bdata = &ddata->data[i]; ++ if (bdata->button->wakeup) { ++ error = gpio_keys_button_enable_wakeup(bdata); ++ if (error) ++ return error; ++ } ++ } ++ ++ return 0; ++ ++} ++ ++static void __maybe_unused ++gpio_keys_button_disable_wakeup(struct gpio_button_data *bdata) ++{ ++ int error; ++ ++ error = disable_irq_wake(bdata->irq); ++ if (error) ++ rptips("failed to disable wakeup src IRQ %d: %d\n", bdata->irq, error); ++} ++ ++static void __maybe_unused ++gpio_keys_disable_wakeup(struct gpio_keys_drvdata *ddata) ++{ ++ struct gpio_button_data *bdata; ++ int i; ++ ++ for (i = 0; i < ddata->pdata->nbuttons; i++) { ++ bdata = &ddata->data[i]; ++ if (irqd_is_wakeup_set(irq_get_irq_data(bdata->irq))) ++ gpio_keys_button_disable_wakeup(bdata); ++ } ++} ++ ++static int __maybe_unused gpio_keys_suspend(struct device *dev) ++{ ++ struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev); ++ int error; ++ ++ if (device_may_wakeup(dev)) { ++ error = gpio_keys_enable_wakeup(ddata); ++ if (error) ++ return error; ++ } ++ return 0; ++} ++ ++static int __maybe_unused gpio_keys_resume(struct device *dev) ++{ ++ struct gpio_keys_drvdata *ddata = dev_get_drvdata(dev); ++ ++ if (device_may_wakeup(dev)) { ++ gpio_keys_disable_wakeup(ddata); ++ } ++ ++ return 0; ++} ++ ++static SIMPLE_DEV_PM_OPS(gpio_keys_pm_ops, gpio_keys_suspend, gpio_keys_resume); ++ ++// device match table ++static const struct of_device_id gpio_keys_of_match[] = { ++ { .compatible = "rp-keys", }, ++ { }, ++}; ++ ++MODULE_DEVICE_TABLE(of, gpio_keys_of_match); ++ ++// driver descrition ++static struct platform_driver gpio_keys_device_driver = { ++ .probe = gpio_keys_probe, ++ .driver = { ++ .name = "rp-keys", ++ .of_match_table = gpio_keys_of_match, ++ .pm = &gpio_keys_pm_ops, ++ ++ } ++}; ++ ++static int __init gpio_keys_init(void) ++{ ++ return platform_driver_register(&gpio_keys_device_driver); ++} ++ ++static void __exit gpio_keys_exit(void) ++{ ++ platform_driver_unregister(&gpio_keys_device_driver); ++} ++ ++late_initcall_sync(gpio_keys_init); ++module_exit(gpio_keys_exit); ++ ++MODULE_LICENSE("GPL"); ++ +diff --git a/drivers/rongpin/rp_power.c b/drivers/rongpin/rp_power.c +new file mode 100644 +index 000000000000..dab25b2836ad +--- /dev/null ++++ b/drivers/rongpin/rp_power.c +@@ -0,0 +1,349 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++// #include ++#include ++#include ++ ++#define GPIO_NUM_MAX 40 ++ ++#define GPIO_FUNCTION_OUTPUT 0 ++#define GPIO_FUNCTION_INPUT 1 ++#define GPIO_FUNCTION_IRQ 2 ++#define GPIO_FUNCTION_FLASH 3 ++#define GPIO_FUNCTION_OUTPUT_CTRL 4 ++ ++#define ANDROID_START "3" ++ ++static int flash_flag = 0; ++ ++struct rp_power { ++ int gpio_num; //gpui num ++ int gpio_irq; ++ int action; //gpio flag ++ int gpio_event; //input only ++ int send_mode; //input only ++ int gpio_function; //gpio function,i/o ++ int gpio_ctrl; ++ char *gpio_name; ++}; ++ ++struct rp_power_data { ++ struct rp_power rp_power_num[GPIO_NUM_MAX]; ++ struct input_dev *input; ++ struct timer_list mytimer; ++ int gpio_dts_num; ++}; ++ ++static struct rp_power_data *gpio_data = NULL; ++static int event_flag = 0; ++static int open_now = 0; ++static char* file_name = NULL; ++ ++static int sleep_flag = 0; ++// static struct wake_lock rp_wake_lock; ++ ++ ++static int gpio_open(struct inode *inode, struct file *file) ++{ ++ struct dentry* dent = file->f_path.dentry; ++ int i = 0; ++ ++ file_name = (char*)(dent->d_name.name); ++ ++ for (i = 0; i < gpio_data->gpio_dts_num; i++){ ++ if(!strcmp(file_name,gpio_data->rp_power_num[i].gpio_name)){ ++ open_now = i; ++ } ++ } ++ return 0; ++} ++ ++ ++static ssize_t gpio_write(struct file *file, const char *buffer,size_t count, loff_t *data) ++{ ++ char buf[2]={0}; ++ char s1[]="1"; ++ ++ if(copy_from_user(&buf[0],buffer,1)){ ++ printk("failed to copy data to kernel space\n"); ++ return -EFAULT; ++ } ++ ++ if(!strcmp(buf,ANDROID_START) && !strcmp(gpio_data->rp_power_num[open_now].gpio_name,"led")){ ++ gpio_data->rp_power_num[open_now].gpio_function = 3; ++ //printk("Android start now!\n"); ++ return count; ++ } ++ ++ if(!strcmp(buf,s1)){ ++ //gpio_direction_output(gpio_data->rp_power_num[open_now].gpio_num,1); ++ gpio_set_value_cansleep(gpio_data->rp_power_num[open_now].gpio_num,1); ++ //printk("%s write 1 succeed\n",gpio_data->rp_power_num[open_now].gpio_name); ++ }else{ ++ //gpio_direction_output(gpio_data->rp_power_num[open_now].gpio_num,0); ++ gpio_set_value_cansleep(gpio_data->rp_power_num[open_now].gpio_num,0); ++ //printk("%s write 0 succeed\n",gpio_data->rp_power_num[open_now].gpio_name); ++ } ++ return count; ++} ++ ++ ++static ssize_t gpio_read(struct file *file, char __user * buffer, size_t count, loff_t *data) ++{ ++ int gpio_val = 0; ++ int len = 0; ++ char s[10] = {0}; ++ ++ if(*data) ++ return 0; ++ ++ gpio_val = gpio_get_value_cansleep(gpio_data->rp_power_num[open_now].gpio_num); ++ //printk("get %s value %d\n",gpio_data->rp_power_num[open_now].gpio_name,gpio_val); ++ ++ len = sprintf(s+len, "%d\n",gpio_val); ++ ++ return simple_read_from_buffer(buffer, count, data, s, 2); ++} ++ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0)) ++static const struct proc_ops gpio_ops = { ++ .proc_open = gpio_open, ++ .proc_write = gpio_write, ++ .proc_read = gpio_read, ++}; ++#else ++static const struct file_operations gpio_ops = { ++ .owner = THIS_MODULE, ++ .open = gpio_open, ++ .write = gpio_write, ++ .read = gpio_read, ++}; ++#endif ++ ++static struct workqueue_struct *my_workqueue; ++static struct work_struct my_work; ++ ++static void send_event(struct work_struct *work) ++{ ++ int gpio_value = 0; ++ int i = 0; ++ ++ //printk("Work function executed\n"); ++ ++ for(i = 0; i <= gpio_data->gpio_dts_num; i++) { ++ switch(gpio_data->rp_power_num[i].gpio_function) { ++ case GPIO_FUNCTION_INPUT : ++ gpio_value = gpio_get_value_cansleep(gpio_data->rp_power_num[i].gpio_num); ++ ++ if(gpio_value == 1){ ++ input_report_key(gpio_data->input, gpio_data->rp_power_num[i].gpio_event, 1); ++ input_sync(gpio_data->input); ++ } ++ if(gpio_value == 0){ ++ input_report_key(gpio_data->input, gpio_data->rp_power_num[i].gpio_event, 0); ++ input_sync(gpio_data->input); ++ } ++ ++ //printk("\n%s gpio num %d %d\n",__func__,gpio_data->rp_power_num[i].gpio_num,gpio_value); ++ //printk("\n%s send event %d\n",__func__,gpio_data->rp_power_num[i].gpio_event); ++ break; ++ case GPIO_FUNCTION_FLASH : ++ //gpio_direction_output(gpio_data->rp_power_num[i].gpio_num,!flash_flag); ++ if(gpio_is_valid(gpio_data->rp_power_num[i].gpio_num)){ ++ gpio_set_value_cansleep(gpio_data->rp_power_num[i].gpio_num,!flash_flag); ++ flash_flag = !flash_flag; ++ } ++ break; ++ } ++ } ++ ++ mod_timer(&(gpio_data->mytimer), jiffies + msecs_to_jiffies(1000)); ++} ++ ++static void timer_callback(struct timer_list *t) ++{ ++ // 锟斤拷锟斤拷锟斤拷锟斤拷锟斤拷锟斤拷锟斤拷锟斤拷锟斤拷锟斤拷 ++ schedule_work(&my_work); ++} ++ ++static int rp_power_probe(struct platform_device *pdev) { ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *child_np; ++ struct device *dev = &pdev->dev; ++ static struct proc_dir_entry *root_entry_gpio; ++ enum of_gpio_flags gpio_flags; ++ int ret = 0; ++ int gpio_cnt = 0; ++ char gpio_name_num[GPIO_NUM_MAX]; ++ int cnt =0; ++ ++ gpio_data = devm_kzalloc(&pdev->dev, sizeof(struct rp_power_data),GFP_KERNEL); ++ if (!gpio_data) { ++ dev_err(&pdev->dev, "failed to allocate memory\n"); ++ return -ENOMEM; ++ } ++ ++ gpio_data->gpio_dts_num = of_get_child_count(np); ++ printk("rp_power prepare build %d gpio\n",gpio_data->gpio_dts_num); ++ ++ if (gpio_data->gpio_dts_num == 0){ ++ dev_info(&pdev->dev, "no gpio defined\n"); ++ } ++ ++ /* create node */ ++ root_entry_gpio = proc_mkdir("rp_power", NULL); ++ ++ for_each_child_of_node(np, child_np) ++ { ++ /* parse dts */ ++ gpio_data->rp_power_num[gpio_cnt].gpio_num = of_get_named_gpio_flags(child_np, "gpio_num", 0, &gpio_flags); ++ if (!gpio_is_valid(gpio_data->rp_power_num[gpio_cnt].gpio_num)){ ++ printk("gpio %d is invalid!!!!\n", gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ } ++ ++ gpio_data->rp_power_num[gpio_cnt].gpio_name = (char*)child_np -> name; ++ gpio_data->rp_power_num[gpio_cnt].action = gpio_flags; ++ gpio_data->rp_power_num[gpio_cnt].gpio_ctrl = gpio_cnt; ++ of_property_read_u32(child_np, "gpio_function", &(gpio_data->rp_power_num[gpio_cnt].gpio_function)); ++ ++ printk("rp_power request %s\n",gpio_data->rp_power_num[gpio_cnt].gpio_name); ++ ++ ++ switch(gpio_data->rp_power_num[gpio_cnt].gpio_function) { ++ case GPIO_FUNCTION_INPUT : /* init input gpio */ ++ ret = gpio_request(gpio_data->rp_power_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0) ++ { ++ printk("gpio%d request error\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ }else{ ++ printk("success request gpio %d in\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ ++ //gpio_direction_output(gpio_data->rp_power_num[gpio_cnt].gpio_num,!gpio_data->rp_power_num[gpio_cnt].action); ++ gpio_direction_input(gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ event_flag = gpio_flags; ++ of_property_read_u32(child_np, "send_mode", &(gpio_data->rp_power_num[gpio_cnt].send_mode)); ++ of_property_read_u32(child_np, "gpio_event", &(gpio_data->rp_power_num[gpio_cnt].gpio_event)); ++ } ++ break; ++ ++ case GPIO_FUNCTION_OUTPUT : /* init output gpio */ ++ ret = gpio_request(gpio_data->rp_power_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0){ ++ printk("gpio%d request error\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ //return ret; ++ }else{ ++ gpio_direction_output(gpio_data->rp_power_num[gpio_cnt].gpio_num,!gpio_data->rp_power_num[gpio_cnt].action); ++ printk("success request gpio%d out\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ } ++ break; ++ ++ case GPIO_FUNCTION_FLASH : ++ ret = gpio_request(gpio_data->rp_power_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0){ ++ printk("gpio%d request error\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ //return ret; ++ }else{ ++ gpio_direction_output(gpio_data->rp_power_num[gpio_cnt].gpio_num,!gpio_data->rp_power_num[gpio_cnt].action); ++ printk("success request gpio%d flash\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ } ++ break; ++ ++ case GPIO_FUNCTION_OUTPUT_CTRL : /* init output gpio for proc */ ++ ret = gpio_request(gpio_data->rp_power_num[gpio_cnt].gpio_num, "gpio_num"); ++ if (ret < 0){ ++ printk("gpio%d request error\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ //return ret; ++ }else{ ++ ret = gpio_direction_output(gpio_data->rp_power_num[gpio_cnt].gpio_num,!gpio_data->rp_power_num[gpio_cnt].action); ++ if (ret == 0) ++ printk("success request gpio%d out\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ else ++ printk("faided to request gpio%d out\n",gpio_data->rp_power_num[gpio_cnt].gpio_num); ++ } ++ ++ sprintf(gpio_name_num,gpio_data->rp_power_num[gpio_cnt].gpio_name,gpio_cnt); ++ proc_create(gpio_name_num, 0666 , root_entry_gpio , &gpio_ops); ++ ++ break; ++ } ++ gpio_cnt++; ++ } ++ // create workqueue ++ my_workqueue = create_workqueue("my_workqueue"); ++ ++ // init workqueue ++ INIT_WORK(&my_work, send_event); ++ ++ // init timer ++ timer_setup(&gpio_data->mytimer, timer_callback, 0); ++ ++ // set timer ++ mod_timer(&gpio_data->mytimer, jiffies + msecs_to_jiffies(10000)); ++ ++ /* init struct input_dev */ ++ gpio_data->input = devm_input_allocate_device(dev); ++ gpio_data->input->name = "gpio_event"; /* pdev->name; */ ++ gpio_data->input->phys = "gpio_event/input1"; ++ gpio_data->input->dev.parent = dev; ++ gpio_data->input->id.bustype = BUS_HOST; ++ gpio_data->input->id.vendor = 0x0001; ++ gpio_data->input->id.product = 0x0001; ++ gpio_data->input->id.version = 0x0100; ++ for(cnt = 0; cnt < gpio_cnt; cnt++){ ++ if (gpio_data->rp_power_num[cnt].gpio_function == 1){ ++ input_set_capability(gpio_data->input, EV_KEY, gpio_data->rp_power_num[cnt].gpio_event); ++ } ++ } ++ ++ ret = input_register_device(gpio_data->input); ++ ++ of_property_read_u32(np, "rp_not_deep_leep", &sleep_flag); ++ if(sleep_flag != 0){ ++ printk("rpdzkj wake lock\n"); ++ // wake_lock_init(&rp_wake_lock,WAKE_LOCK_SUSPEND, "rpdzkj_no_deep_sleep"); ++ // wake_lock(&rp_wake_lock); ++ } ++ ++ platform_set_drvdata(pdev, gpio_data); ++ return 0; ++} ++ ++static int rp_power_remove(struct platform_device *pdev) ++{ ++ return 0; ++} ++ ++ ++static const struct of_device_id rp_power_of_match[] = { ++ { .compatible = "rp_power" }, ++ { } ++}; ++ ++static struct platform_driver rp_power_driver = { ++ .probe = rp_power_probe, ++ .remove = rp_power_remove, ++ .driver = { ++ .name = "rp_power", ++ .of_match_table = of_match_ptr(rp_power_of_match), ++ }, ++}; ++ ++module_platform_driver(rp_power_driver); ++ ++MODULE_LICENSE("GPL"); +diff --git a/drivers/rongpin/stm706.c b/drivers/rongpin/stm706.c +new file mode 100644 +index 000000000000..472f27767fd3 +--- /dev/null ++++ b/drivers/rongpin/stm706.c +@@ -0,0 +1,171 @@ ++/* ++ * GPIO driver for RICOH583 power management chip. ++ * ++ * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. ++ * Author: Laxman dewangan ++ * ++ * Based on code ++ * Copyright (C) 2011 RICOH COMPANY,LTD ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms and conditions of the GNU General Public License, ++ * version 2, as published by the Free Software Foundation. ++ * ++ * This program is distributed in the hope it will be useful, but WITHOUT ++ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or ++ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for ++ * more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program. If not, see . ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct stm_gpio{ ++ int reset_gpio; ++ int wdt_gpio; ++}; ++ ++static struct timer_list mytimer; ++static struct stm_gpio stm706_gpio; ++static int wdi_status = 1; ++static int panic_test = 0; ++ ++static ssize_t wtd_write(struct file *file, const char *buffer,size_t count, loff_t *data) ++{ ++// int * add; ++ ++ panic_test = 1; ++ return count; ++/* ++ add = ioremap(0x0, 0x100); ++ *add = 0; ++ ++ return count; ++*/ ++} ++ ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) ++static const struct proc_ops wtd = { ++ .proc_write = wtd_write, ++}; ++#else ++static const struct file_operations wtd = { ++ .owner = THIS_MODULE, ++ .write = wtd_write, ++}; ++#endif ++ ++static struct proc_dir_entry *wtd_ctl_entry; ++ ++void wdt_function(struct timer_list* list){ ++//void wdt_function(unsigned long data){ ++ wdi_status ^= 1; ++ ++ if (1 == panic_test){ ++ return; ++ } ++ ++ gpio_direction_output(stm706_gpio.wdt_gpio,wdi_status); ++ gpio_direction_output(stm706_gpio.reset_gpio,1); ++ mod_timer(&mytimer, jiffies + msecs_to_jiffies(200)); ++ ++ return; ++} ++ ++static int stm706_probe(struct platform_device *pdev) ++{ ++ enum of_gpio_flags flags; ++ struct device_node *node = pdev->dev.of_node; ++ printk("start stm706 probe"); ++ ++ stm706_gpio.reset_gpio = of_get_named_gpio_flags(node, "reset_gpio", 0, &flags); ++ if (!gpio_is_valid(stm706_gpio.reset_gpio)){ ++ printk("reset_gpio invalid gpio: %d\n",stm706_gpio.reset_gpio); ++ } ++ gpio_request(stm706_gpio.reset_gpio, "reset_gpio"); ++ gpio_direction_output(stm706_gpio.reset_gpio,0); ++ printk("reset_gpio gpio: %d\n",stm706_gpio.reset_gpio); ++ ++ stm706_gpio.wdt_gpio = of_get_named_gpio_flags(node, "wdt_gpio", 0, &flags); ++ if (!gpio_is_valid(stm706_gpio.wdt_gpio)){ ++ printk("wdt_gpio invalid gpio: %d\n",stm706_gpio.wdt_gpio); ++ } ++ gpio_request(stm706_gpio.wdt_gpio, "wdt_gpio"); ++ gpio_direction_output(stm706_gpio.wdt_gpio,wdi_status); ++ printk("wdt_gpio gpio: %d\n",stm706_gpio.wdt_gpio); ++ ++/* ++ init_timer(&mytimer); ++ mytimer.expires = jiffies + jiffies_to_msecs(2); ++ mytimer.function = wdt_function; ++ mytimer.data = 0; ++ add_timer(&mytimer); ++*/ ++ timer_setup(&mytimer, wdt_function, 0); ++ mytimer.expires = jiffies + msecs_to_jiffies(200); ++ add_timer(&mytimer); ++ ++ wtd_ctl_entry = proc_mkdir("wtd", NULL); ++ proc_create("wtd_ctrl",0666,wtd_ctl_entry,&wtd); ++ ++ return 0; ++} ++ ++static int stm706_remove(struct platform_device *pdev) ++{ ++ del_timer(&mytimer); ++ return 0; ++} ++static int stm706_suspend(struct platform_device *pdev, pm_message_t state) ++{ ++ del_timer(&mytimer); ++ return 0; ++} ++static int stm706_resume(struct platform_device *pdev) ++{ ++ add_timer(&mytimer); ++ return 0; ++} ++ ++static struct of_device_id stm706_dt_ids[] = { ++ { .compatible = "stm706" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, stm706_dt_ids); ++ ++static struct platform_driver stm706_driver = { ++ .driver = { ++ .name = "stm706", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(stm706_dt_ids), ++ }, ++ .suspend = stm706_suspend, ++ .resume = stm706_resume, ++ .probe = stm706_probe, ++ .remove = stm706_remove, ++}; ++ ++static int __init stm706_init(void) ++{ ++ return platform_driver_register(&stm706_driver); ++} ++subsys_initcall(stm706_init); ++ ++static void __exit stm706_exit(void) ++{ ++ platform_driver_unregister(&stm706_driver); ++} ++module_exit(stm706_exit); ++ ++MODULE_LICENSE("GPL"); ++ +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-dr4/kernel-rk35xx-legacy-dr4-02.patch b/userpatches/kernel/rockchip-5.10-dr4/kernel-rk35xx-legacy-dr4-02.patch new file mode 100644 index 000000000000..5238422a3e8a --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-dr4/kernel-rk35xx-legacy-dr4-02.patch @@ -0,0 +1,233 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 11 Aug 2024 01:49:35 +0800 +Subject: Patching kernel rk35xx files + arch/arm64/boot/dts/rockchip/rk3566-dr4.dts + arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi drivers/regulator/fan53555.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/rk3566-dr4.dts | 30 ++-- + arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi | 69 ---------- + drivers/regulator/fan53555.c | 25 ++++ + 3 files changed, 45 insertions(+), 79 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts +index 7ad485daf49b..2ec4d5b7292c 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dts +@@ -10,11 +10,11 @@ + #include + #include + #include + #include + #include +-#include "rk3566-dr4.dtsi" ++#include "rk3566.dtsi" + #include "rk3568-linux.dtsi" + + / { + + model = "dr4-rk3566-rmt"; +@@ -419,11 +419,21 @@ backlight2: red { + 232 233 234 235 236 237 238 239 + 240 241 242 243 244 245 246 247 + 248 249 250 251 252 253 254 255 + >; + default-brightness-level = <0>; +- }; ++ }; ++ ++ fan_gpio_control { ++ compatible = "fan_gpio_control"; ++ gpio-pin = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; ++ temperature-device = "soc-thermal"; ++ temp-on = <60000>; ++ time = <10000>; ++ status = "okay"; ++ }; ++ + }; + + &bus_npu { + bus-supply = <&vdd_logic>; + pvtm-supply = <&vdd_cpu>; +@@ -993,16 +1003,18 @@ pmic_int: pmic_int { + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + soc_slppin_gpio: soc_slppin_gpio { + rockchip,pins = +- <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ //<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; + }; + + soc_slppin_slp: soc_slppin_slp { + rockchip,pins = +- <0 RK_PA2 1 &pcfg_pull_up>; ++ //<0 RK_PA2 1 &pcfg_pull_up>; ++ <0 RK_PA2 1 &pcfg_pull_none>; + }; + + soc_slppin_rst: soc_slppin_rst { + rockchip,pins = + <0 RK_PA2 2 &pcfg_pull_none>; +@@ -1157,15 +1169,15 @@ &spdif_8ch { + }; + + &tsadc { + status = "okay"; + }; +- ++/* + &combphy0_us { + status = "okay"; + }; +- ++*/ + &usb2phy1 { + status = "okay"; + }; + + &u2phy1_host { +@@ -1314,19 +1326,17 @@ &combphy1_usq { + + &combphy2_psq { + status = "okay"; + }; + +-&sata0 { +- status = "disabled"; +-}; +- + &sata1 { + status = "disabled"; + }; + + &sata2 { ++ //forcing FBSCP ++ compatible = "rockchip,rk-ahci", "snps,dwc-ahci"; + status = "okay"; + }; + + &pwm0 { + status = "okay"; +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi b/arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi +deleted file mode 100644 +index 7c7561787a6c..000000000000 +--- a/arch/arm64/boot/dts/rockchip/rk3566-dr4.dtsi ++++ /dev/null +@@ -1,69 +0,0 @@ +-// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +-/* +- * Copyright (c) 2020 Rockchip Electronics Co., Ltd. +- */ +- +-#include "rk3568.dtsi" +- +-/ { +- aliases { +- /delete-property/ ethernet0; +- /delete-property/ lvds1; +- }; +-}; +- +-&cpu0_opp_table { +- /delete-node/ opp-1992000000; +-}; +- +-&lpddr4_params { +- /* freq info, freq_0 is final frequency, unit: MHz */ +- freq_0 = <1056>; +-}; +- +-&lpddr4x_params { +- /* freq info, freq_0 is final frequency, unit: MHz */ +- freq_0 = <1056>; +-}; +- +-&power { +- pd_pipe@RK3568_PD_PIPE { +- reg = ; +- clocks = <&cru PCLK_PIPE>; +- pm_qos = <&qos_pcie2x1>, +- <&qos_sata1>, +- <&qos_sata2>, +- <&qos_usb3_0>, +- <&qos_usb3_1>; +- }; +-}; +- +-&rkisp { +- rockchip,iq-feature = /bits/ 64 <0x1BFBF7FE67FF>; +-}; +- +-&usbdrd_dwc3 { +- phys = <&u2phy0_otg>; +- phy-names = "usb2-phy"; +- extcon = <&usb2phy0>; +- maximum-speed = "high-speed"; +- snps,dis_u2_susphy_quirk; +- snps,usb2-lpm-disable; +-}; +- +-///delete-node/ &combphy0_us; +-/delete-node/ &gmac0_clkin; +-/delete-node/ &gmac0_xpcsclk; +-/delete-node/ &gmac0; +-/delete-node/ &gmac_uio0; +-/delete-node/ &lvds1; +-/delete-node/ &pcie30_phy_grf; +-/delete-node/ &pcie30phy; +-/delete-node/ &pcie3x1; +-/delete-node/ &pcie3x2; +-/delete-node/ &qos_pcie3x1; +-/delete-node/ &qos_pcie3x2; +-/delete-node/ &qos_sata0; +-///delete-node/ &sata0; +-/delete-node/ &vp1_out_lvds1; +-/delete-node/ &vp2_out_lvds1; +diff --git a/drivers/regulator/fan53555.c b/drivers/regulator/fan53555.c +index eca3e3aa6b08..c25cc630531e 100644 +--- a/drivers/regulator/fan53555.c ++++ b/drivers/regulator/fan53555.c +@@ -641,10 +641,35 @@ static int fan53555_regulator_probe(struct i2c_client *client, + return PTR_ERR(regmap); + } + di->regmap = regmap; + di->dev = &client->dev; + i2c_set_clientdata(client, di); ++ ++ /* test chip */ ++ client->addr = 0x40; ++ ret = regmap_read(di->regmap, FAN53555_ID1, &val); ++ if (ret < 0) { ++ printk("test 0x40 failed\n"); ++ } ++ else { ++ printk("test 0x40 succes\n"); ++ di->vendor = FAN53555_VENDOR_SILERGY; ++ goto test_out; ++ }; ++ ++ client->addr = 0x1c; ++ ret = regmap_read(di->regmap, FAN53555_ID1, &val); ++ if (ret < 0) { ++ printk("test 0x1c failed\n"); ++ } ++ else { ++ printk("test 0x1c succes\n"); ++ di->vendor = FAN53526_VENDOR_TCS; ++ }; ++ ++ test_out: ++ + /* Get chip ID */ + ret = regmap_read(regmap, FAN53555_ID1, &val); + if (ret < 0) { + dev_err(&client->dev, "Failed to get chip ID!\n"); + return ret; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-jp-tvbox/kernel-rk35xx-legacy-001.patch b/userpatches/kernel/rockchip-5.10-jp-tvbox/kernel-rk35xx-legacy-001.patch new file mode 100644 index 000000000000..edd77aed7b57 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-jp-tvbox/kernel-rk35xx-legacy-001.patch @@ -0,0 +1,1460 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 25 Feb 2024 03:35:52 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c net/rfkill/rfkill-bt.c + net/rfkill/rfkill-wlan.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 1 + + arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts | 1195 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 50 +- + net/rfkill/rfkill-bt.c | 25 +- + net/rfkill/rfkill-wlan.c | 5 - + 5 files changed, 1247 insertions(+), 29 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index fb967a6f9e0f..661044e40d70 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -126,10 +126,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb2-lp4x-v10-i2s-mic-array.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb2-lp4x-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb2-lp4x-v10-pdm-mic-array.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb3-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb3-ddr3-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-evb5-lp4x-v10.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-jp-tvbox.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-orangepi-3b.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero3.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-radxa-zero3-ap6212.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-rk817-eink.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-rk817-eink-w6.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts b/arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts +new file mode 100644 +index 000000000000..6dfda96b78d1 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts +@@ -0,0 +1,1195 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3566.dtsi" ++#include "rk3568-linux.dtsi" ++ ++ ++/ { ++ model = "JP TVbox 3566"; ++ compatible = "rockchip,JP-TVbox", "rockchip,rk3566"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <0x80>; ++ simple-audio-card,name = "rockchip,hdmi"; ++ status = "okay"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ rk809_sound: rk809-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,rk809-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ // simple-audio-card,hp-det-gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s3_2ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rk809_codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "okay"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ vad_sound: vad-sound { ++ status = "disabled"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip,rk3568-vad"; ++ rockchip,cpu = <&i2s1_8ch>; ++ rockchip,codec = <&rk809_codec>, <&vad>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_usb: vcc5v0-usb { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ regulator-name = "vcc5v0_otg"; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ post-power-on-delay-ms = <200>; ++ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "ap6398s"; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_irq>; ++ WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; ++// WIFI,vbat_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ //wifi-bt-power-toggle; ++ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart1m0_rtsn ++ &bt_host_wake_gpio ++ &bt_poweren ++ &bt_host_wake_irq>; ++ pinctrl-1 = <&uart1_gpios>; ++// wakeup-source; ++ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ rk_headset: rk-headset { ++// status = "okay"; ++ compatible = "rockchip_headset"; ++ headset_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ vcc3v3_vga: vcc3v3-vga { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_vga"; ++ regulator-always-on; ++ regulator-boot-on; ++ gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //gpio4 RK_PB2 GPIO_ACTIVE_HIGH ++ enable-active-high; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ status = "okay"; ++ ++ power-green { ++ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "none"; ++ }; ++ ++ power-red { ++ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ }; ++ ++ ++ ++ openvfd { ++ compatible = "open,vfd"; ++ dev_name = "openvfd"; ++ openvfd_gpio_clk = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; ++ openvfd_gpio_dat = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; ++// openvfd_gpio_stb = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; ++ openvfd_chars = [00 04 03 02 01]; ++ openvfd_dot_bits = [00 01 03 02 04 05 06]; ++ openvfd_display_type = [06 00 00 00]; ++ status = "okay"; ++ }; ++ ++ ++ resume_reboot { ++ compatible = "resume_reboot"; ++ status = "okay"; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&dfi { ++ status = "disabled"; ++}; ++ ++&dmc { ++ clocks = <&cru 418>; ++ status = "disabled"; ++}; ++ ++&gpu { ++ clock-names = "gpu", "bus"; ++ interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++&hdmi_in_vp1 { ++ status = "disabled"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ rk809_codec: codec { ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; ++ clocks = <&cru I2S1_MCLKOUT>; ++ clock-names = "mclk"; ++ //assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; ++ assigned-clocks = <&cru I2S3_MCLKOUT>, <&cru I2S3_MCLK_IOE>; ++ assigned-clock-rates = <12288000>; ++ //assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; ++ assigned-clock-parents = <&cru I2S3_MCLKOUT_TX>, <&cru I2S3_MCLKOUT>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s3m1_mclk>; ++ hp-volume = <3>; ++ spk-volume = <3>; ++ mic-in-differential; ++ status = "okay"; ++ }; ++ }; ++ ++ vdd_cpu: tcs4525@1c { ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++// regulator-min-microvolt = <712500>; ++ regulator-min-microvolt = <1050000>; ++ regulator-max-microvolt = <1390000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&combphy1_usq { ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ status = "okay"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ //clock_in_out = "output"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ // snps,reset-delays-us = <0 20000 100000>; ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++/* ++ pinctrl-0 = <&gmac1m0_miim ++ &gmac1m0_tx_bus2 ++ &gmac1m0_rx_bus2 ++ &gmac1m0_rgmii_clk ++ &gmac1m0_rgmii_bus>; ++*/ ++ ++ pinctrl-0 = <&gmac1m0_miim ++ &gmac1m0_tx_bus2_level3 ++ &gmac1m0_rx_bus2 ++ &gmac1m0_rgmii_clk_level2 ++ &gmac1m0_rgmii_bus_level3>; ++ ++ tx_delay = <0x41>; ++ rx_delay = <0x2e>; ++ ++ phy-handle = <&rgmii_phy1>; ++ ++ status = "okay"; ++}; ++ ++ ++ ++&i2s2_2ch { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&i2c3 { ++ status = "disabled"; ++}; ++ ++&i2s3_2ch { ++ pinctrl-0 = <&i2s3m1_sclk ++ &i2s3m1_lrck ++ &i2s3m1_sdi ++ &i2s3m1_sdo>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "disabled"; ++ pinctrl-0 = <&i2c4m0_xfer>; ++}; ++ ++&i2c5 { ++ status = "disabled"; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++}; ++ ++&spi3 { ++ status = "disabled"; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&pinctrl { ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dis_ctl>; ++ ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++// <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA2 1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA2 2 &pcfg_pull_none>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ ++ uart8_gpios: uart8-gpios { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ uart1_gpios: uart1-gpios { ++ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_irq: bt-host-wake-irq { ++ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ bt_host_wake_gpio: bt-host-wake-gpio { ++ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ bt_poweren: bt-poweren { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd0 { ++ lcd0_rst_gpio: lcd-rst-gpio { ++ rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd1 { ++ lcd1_rst_gpio: lcd1-rst-gpio { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ fddis_ctr { ++ ++ dis_ctl:dis-ctl { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, ++ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++}; ++ ++&pwm3 { ++ compatible = "rockchip,remotectl-pwm"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm3_pins>; ++ remote_pwm_id = <3>; ++ handle_cpu_id = <1>; ++ remote_support_psci = <0>; ++ status = "okay"; ++ ++ ir_key1 { //jp-box ++ rockchip,usercode = <0xfd01>; ++ rockchip,key_table = ++ <0x31 KEY_REPLY>, ++ <0x2f KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x6a KEY_HOME>, ++ <0x5e KEY_VOLUMEUP>, ++ <0x47 KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x3a 388>, ++ <0x0d KEY_F6>; ++ }; ++ ++/* ++key 102 HOME ++key 158 BACK ++key 108 DPAD_DOWN ++key 103 DPAD_UP ++key 105 DPAD_LEFT ++key 106 DPAD_RIGHT ++key 115 VOLUME_UP ++key 114 VOLUME_DOWN ++key 116 POWER ++key 232 DPAD_CENTER ++key 388 PROFILE_SWITCH ++key 64 TV_MEDIA_PLAY ++*/ ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&route_hdmi { ++ logo,mode = "fullscreen"; ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sdmmc1 { ++ max-frequency = <150000000>; ++ supports-sdio; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++ ++&spdif_8ch { ++ status = "okay"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++/* ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++*/ ++ ++//firefly蹇呴』閰嶇疆鎴恛tg,鍘熺敓鏄痟ost ++&usbdrd_dwc3 { ++// /delete-property/ snps,dis-u1u2-quirk; ++// /delete-property/ snps,dis_rxdet_inp3_quirk; ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ /delete-property/ snps,dis_rxdet_inp3_quirk; ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <&i2s1_8ch>; ++ rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ++ ROCKCHIP_VOP2_SMART0 | 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ++ ROCKCHIP_VOP2_SMART1)>; ++ rockchip,primary-plane = ; ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&rkisp { ++ status = "okay"; ++}; ++ ++&rkisp_mmu { ++ status = "okay"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&spdif_8ch { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++}; ++ ++&uart0 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; ++}; ++ ++&uart3 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3m0_xfer>; ++}; ++ ++&uart7 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart7m0_xfer>; ++}; ++ ++&uart9 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart9m0_xfer>; ++}; ++ ++&wdt { ++ status = "okay"; ++}; ++ ++&rockchip_suspend { ++ status = "okay"; ++ rockchip,virtual-poweroff = <1>; ++ rockchip,sleep-debug-en = <1>; ++ rockchip,sleep-mode-config = <0x4e4>; ++ ++ rockchip,wakeup-config = < ++ (0 ++ | RKPM_PWM0_WKUP_EN ++ | RKPM_CPU0_WKUP_EN ++ | RKPM_GPIO_WKUP_EN ++ | RKPM_USB_WKUP_EN ++ ) ++ >; ++}; ++ ++//绾㈠寮鏈哄繀椤昏瀹氬涓 ++&vdd_logic { ++ regulator-state-mem { ++ /delete-property/ regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1350000>; ++ }; ++}; ++ ++&vcc_1v8 { ++ regulator-state-mem { ++ /delete-property/ regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++}; ++ ++&vcc_3v3 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++}; ++ ++&vcc3v3_sd { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++}; ++/* ++&cpu0 { ++ power-model { ++ compatible = "simple-power-model"; ++ leakage-range= <10 40>; ++ ls = <0xffffdc14 6360 0>; ++ static-coefficient = <100000>; ++ ts = <83822 206397 0xffffef34 71>; ++ thermal-zone = "soc-thermal"; ++ }; ++}; ++*/ ++&rkcif { ++ status = "okay"; ++}; ++ ++&rkcif_dvp { ++ status = "disabled"; ++}; ++ ++ ++ ++&pdm { ++ pinctrl-0 = <&pdmm1_clk1 &pdmm1_sdi1 &pdmm1_sdi2 &pdmm1_sdi3>; ++}; ++ ++&edp { ++ hpd-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; ++}; ++ ++&edp_in_vp0 { ++ status = "okay"; ++}; ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index cf9c46ea426e..8892191ac40b 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -25,13 +25,16 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 + ++static int dev_num = 0; ++ + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); + void (*set_to_rmii)(struct rk_priv_data *bsp_priv); +@@ -2709,10 +2712,34 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2727,25 +2754,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- random_ether_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +diff --git a/net/rfkill/rfkill-bt.c b/net/rfkill/rfkill-bt.c +index 73b802c7faa4..719a23d41bac 100644 +--- a/net/rfkill/rfkill-bt.c ++++ b/net/rfkill/rfkill-bt.c +@@ -173,15 +173,19 @@ static int rfkill_rk_setup_wake_irq(struct rfkill_rk_data *rfkill, int flag) + if (ret) + goto fail2; + rfkill->irq_req = 1; + LOG("** disable irq\n"); + disable_irq(irq->irq); +- /*ret = disable_irq_wake(irq->irq);init irq wake is disabled,no need to disable*/ ++ ret = enable_irq_wake(irq->irq); ++ if (ret) ++ goto fail3; + } + + return ret; + ++fail3: ++ free_irq(irq->irq, rfkill); + fail2: + gpio_free(irq->gpio.io); + fail1: + return ret; + } +@@ -286,10 +290,16 @@ static int rfkill_rk_set_power(void *data, bool blocked) + + DBG("Set blocked:%d\n", blocked); + + toggle = rfkill->pdata->power_toggle; + ++ if (toggle) { ++ if (rfkill_get_wifi_power_state(&wifi_power)) { ++ LOG("%s: cannot get wifi power state!\n", __func__); ++ return -1; ++ } ++ } + + DBG("%s: toggle = %s\n", __func__, toggle ? "true" : "false"); + + if (!blocked) { + if (toggle) { +@@ -311,10 +321,12 @@ static int rfkill_rk_set_power(void *data, bool blocked) + !poweron->enable); + msleep(20); + gpio_direction_output(poweron->io, + poweron->enable); + msleep(20); ++ if (gpio_is_valid(wake_host->io)) ++ gpio_direction_input(wake_host->io); + } + } + + if (gpio_is_valid(reset->io)) { + if (gpio_get_value(reset->io) == !reset->enable) { +@@ -323,15 +335,10 @@ static int rfkill_rk_set_power(void *data, bool blocked) + msleep(20); + gpio_direction_output(reset->io, reset->enable); + } + } + +- if (gpio_is_valid(wake_host->io)) { +- LOG("%s: set bt wake_host input!\n", __func__); +- gpio_direction_input(wake_host->io); +- } +- + if (pinctrl && gpio_is_valid(rts->io)) { + pinctrl_select_state(pinctrl, rts->gpio_state); + LOG("ENABLE UART_RTS\n"); + gpio_direction_output(rts->io, rts->enable); + msleep(100); +@@ -360,14 +367,10 @@ static int rfkill_rk_set_power(void *data, bool blocked) + !reset->enable); + msleep(20); + } + } + if (toggle) { +- if (rfkill_get_wifi_power_state(&wifi_power)) { +- LOG("%s: cannot get wifi power state!\n", __func__); +- return -EPERM; +- } + if (!wifi_power) { + LOG("%s: bt will set vbat to low\n", __func__); + rfkill_set_wifi_bt_power(0); + } else { + LOG("%s: bt shouldn't control the vbat\n", __func__); +@@ -405,11 +408,10 @@ static int rfkill_rk_pm_prepare(struct device *dev) + + // enable bt wakeup host + if (gpio_is_valid(wake_host_irq->gpio.io) && bt_power_state) { + DBG("enable irq for bt wakeup host\n"); + enable_irq(wake_host_irq->irq); +- enable_irq_wake(wake_host_irq->irq); + } + + #ifdef CONFIG_RFKILL_RESET + rfkill_init_sw_state(rfkill->rfkill_dev, BT_BLOCKED); + rfkill_set_sw_state(rfkill->rfkill_dev, BT_BLOCKED); +@@ -435,11 +437,10 @@ static void rfkill_rk_pm_complete(struct device *dev) + rts = &rfkill->pdata->rts_gpio; + + if (gpio_is_valid(wake_host_irq->gpio.io) && bt_power_state) { + LOG("** disable irq\n"); + disable_irq(wake_host_irq->irq); +- disable_irq_wake(wake_host_irq->irq); + } + + if (rfkill->pdata->pinctrl && gpio_is_valid(rts->io)) { + DBG("Enable UART_RTS\n"); + gpio_direction_output(rts->io, rts->enable); +diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c +index 338b59c53dbc..89d9787b9ad9 100644 +--- a/net/rfkill/rfkill-wlan.c ++++ b/net/rfkill/rfkill-wlan.c +@@ -317,15 +317,10 @@ int rockchip_wifi_power(int on) + if (gpio_is_valid(reset->io)) { + gpio_direction_output(reset->io, !(reset->enable)); + } + + wifi_power_state = 0; +- +- if (!rfkill_get_bt_power_state(&bt_power, &toggle)) { +- LOG("%s: toggle = %s\n", __func__, toggle ? "true" : "false"); +- } +- + if (toggle) { + if (!bt_power) { + LOG("%s: wifi will set vbat to low\n", __func__); + rfkill_set_wifi_bt_power(0); + } else { +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-nas-lite/kernel-rk35xx-legacy-nas-lite.patch b/userpatches/kernel/rockchip-5.10-nas-lite/kernel-rk35xx-legacy-nas-lite.patch new file mode 100644 index 000000000000..2bdb14243947 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-nas-lite/kernel-rk35xx-legacy-nas-lite.patch @@ -0,0 +1,1915 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Fri, 21 Jun 2024 18:49:15 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 + + arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts | 1784 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 50 +- + 3 files changed, 1824 insertions(+), 12 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index a7d846a369c1..fa4b5ea2fda5 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -301,7 +301,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-radxa-nx5-io.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-rk806-single-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v11.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nas-lite.dtb ++ + + subdir-y := $(dts-dirs) overlay +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts b/arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts +new file mode 100644 +index 000000000000..369ba0c0e725 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts +@@ -0,0 +1,1784 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3568.dtsi" ++#include "rk3568-linux.dtsi" ++ ++/ { ++ ++ model = "Rockchip RK3568 DG NAS LITE"; ++ compatible = "rockchip,DG-nas-lite", "rockchip,rk3568"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <1750>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <297500>; ++ }; ++ ++ menu-key { ++ label = "menu"; ++ linux,code = ; ++ press-threshold-microvolt = <980000>; ++ }; ++ ++ back-key { ++ label = "back"; ++ linux,code = ; ++ press-threshold-microvolt = <1305500>; ++ }; ++ }; ++ ++ audiopwmout_diff: audiopwmout-diff { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,audiopwmout-diff"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,bitclock-master = <&master>; ++ simple-audio-card,frame-master = <&master>; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s3_2ch>; ++ }; ++ master: simple-audio-card,codec { ++ sound-dai = <&dig_acodec>; ++ }; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "rockchip,hdmi"; ++ status = "okay"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ vcc12v_sata: vcc12v-sata { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_sata"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ enable-active-high; ++ gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc12V_sata_enable_h>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ pdmics: dummy-codec { ++ status = "disabled"; ++ compatible = "rockchip,dummy-codec"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ pdm_mic_array: pdm-mic-array { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "rockchip,pdm-mic-array"; ++ simple-audio-card,cpu { ++ sound-dai = <&pdm>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&pdmics>; ++ }; ++ }; ++ ++ rk809_sound: rk809-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,rk809-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rk809_codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "disabled"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ vad_sound: vad-sound { ++ status = "disabled"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip,rk3568-vad"; ++ rockchip,cpu = <&i2s1_8ch>; ++ rockchip,codec = <&rk809_codec>, <&vad>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ sata_en: sata_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "sata_en"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&asm1064_rst>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ vin-supply = <&vcc5v0_sys>; ++ ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_otg"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc5v0_sys>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc2v8_dvp: vcc2v8-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc2v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc1v8_dvp: vcc1v8-dvp { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc0v9_dvp: vcc0v9-dvp { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc0v9_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ //wifi ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ wifi_chip_type = "rtl8723du"; ++ rockchip,grf = <&grf>; ++ WIFI,poweren_gpio = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; ++ keep_wifi_power_on; ++ status = "okay"; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ //wifi-bt-power-toggle; ++ status = "okay"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_user_1>, <&led_user_2>, <&led_sata_0>; ++ ++ led-user1 { ++ label = "green:user1"; ++ gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led-user2 { ++ label = "blue:user2"; ++ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-sata0 { ++ label = "green:sata0"; ++ gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ pwms = <&pwm0 0 40000 0>; ++ fan-supply = <&dc_12v>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <20 IRQ_TYPE_EDGE_FALLING>; ++ pulses-per-revolution = <2>; ++ cooling-levels = <0 50 100 150 200 255>; ++ rockchip,temp-trips = < ++ 40000 1 ++ 50000 2 ++ 55000 3 ++ 60000 4 ++ 70000 5 ++ >; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&can0 { ++ assigned-clocks = <&cru CLK_CAN0>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can0m1_pins>; ++ status = "disabled"; ++}; ++ ++&can1 { ++ assigned-clocks = <&cru CLK_CAN1>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can1m1_pins>; ++ status = "disabled"; ++}; ++ ++&can2 { ++ assigned-clocks = <&cru CLK_CAN2>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can2m1_pins>; ++ status = "disabled"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++ ++ system-status-level = < ++ /*system status freq level*/ ++ SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH ++ >; ++ ++ auto-freq-en = <0>; ++ ++}; ++ ++&gpu { ++ clock-names = "gpu", "bus"; ++ interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ avdd-0v9-supply = <&vdda0v9_image>; ++ avdd-1v8-supply = <&vcca1v8_image>; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++&hdmi_in_vp1 { ++ status = "disabled"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ pinctrl-0 = <&pwm0m1_pins>; ++ //4.19鍐呮牳闇瑕侀厤缃负default ++ pinctrl-names = "active"; ++ status = "okay"; ++}; ++ ++&pwm4 { ++ status = "disabled"; ++}; ++ ++&pwm5 { ++ status = "disabled"; ++}; ++ ++&pwm15 { ++ compatible = "rockchip,remotectl-pwm"; ++ pinctrl-names = "default"; ++// pinctrl-names = "active"; ++ pinctrl-0 = <&pwm15m0_pins>; ++ remote_pwm_id = <3>; ++ handle_cpu_id = <1>; ++ remote_support_psci = <0>; ++ status = "okay"; ++ ++ ir_key1 { //jp-box ++ rockchip,usercode = <0xfd01>; ++ rockchip,key_table = ++// <0x31 KEY_REPLY>, ++ <0x31 KEY_ENTER>, ++ <0x2f KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x6a KEY_HOME>, ++ <0x5e KEY_VOLUMEUP>, ++ <0x47 KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x3a 388>, ++// <0x0d KEY_O>; ++ <0x0d KEY_C>; ++ }; ++ ++ /*for IPTV ltjc*/ ++ ir_key2 { ++ rockchip,usercode = <0xc43b>; ++ rockchip,key_table = ++ <0x7e KEY_ENTER>, ++ <0x7f KEY_BACK>, ++ <0x7a KEY_UP>, ++ <0x78 KEY_DOWN>, ++ <0x7b KEY_LEFT>, ++ <0x79 KEY_RIGHT>, ++ <0x66 KEY_VOLUMEUP>, ++ <0x65 KEY_VOLUMEDOWN>, ++ <0x69 KEY_POWER>, ++ <0x64 KEY_MUTE>, ++ <0x76 KEY_1>, ++ <0x75 KEY_2>, ++ <0x74 KEY_3>, ++ <0x73 KEY_4>, ++ <0x72 KEY_5>, ++ <0x71 KEY_6>, ++ <0x70 KEY_7>, ++ <0x6f KEY_8>, ++ <0x6e KEY_9>, ++ <0x77 KEY_0>, ++ <0x7c KEY_PAGEDOWN>, ++ <0x7d KEY_PAGEUP>, ++ <0x6a KEY_SETUP>, ++ <0x68 KEY_CHANNEL_UP>, ++ <0x67 KEY_CHANNEL_DN>, ++ <0x39 KEY_PORTAL>, ++ <0x29 KEY_HOME_PAGE>, ++ <0x33 KEY_CH_CUT_BACK>, ++ <0x34 KEY_LOCAL>, ++ <0x2d KEY_REVIEW>, ++ <0x2c KEY_ON_DEMAND>, ++ <0x2b KEY_INFO1>, ++ <0x2e KEY_DIRECT_SEEDING>, ++ <0x2d KEY_REVIEW>, ++ <0x2c KEY_ON_DEMAND>, ++ <0x2b KEY_INFO1>, ++ <0x63 KEY_SOUND1>, ++ <0x6c KEY_X1>, ++ <0x6d KEY_X2>, ++ <0x62 KEY_PLAYPAUSE>, ++ <0x6b KEY_EQUAL>, ++ <0x61 KEY_FASTFORWARD>, ++ <0x60 KEY_REWIND>, ++ <0x3b KEY_STOP>, ++ <0x35 KEY_BLUE>, ++ <0x36 KEY_YELLOW>, ++ <0x37 KEY_GREEN>, ++ <0x38 KEY_RED>; ++ }; ++ ++ ir_key3 { ++ rockchip,usercode = <0x1dcc>; ++ rockchip,key_table = ++ <0xee KEY_ENTER>, ++ <0xf0 KEY_BACK>, ++ <0xf8 KEY_UP>, ++ <0xbb KEY_DOWN>, ++ <0xef KEY_LEFT>, ++ <0xed KEY_RIGHT>, ++ <0xfc KEY_HOME>, ++ <0xf1 KEY_VOLUMEUP>, ++ <0xfd KEY_VOLUMEDOWN>, ++ <0xb7 KEY_SEARCH>, ++ <0xff KEY_POWER>, ++ <0xf3 KEY_MUTE>, ++ <0xbf KEY_MENU>, ++ <0xf9 0x191>, ++ <0xf5 0x192>, ++ <0xb3 388>, ++ <0xbe KEY_1>, ++ <0xba KEY_2>, ++ <0xb2 KEY_3>, ++ <0xbd KEY_4>, ++ <0xf9 KEY_5>, ++ <0xb1 KEY_6>, ++ <0xfc KEY_7>, ++ <0xf8 KEY_8>, ++ <0xb0 KEY_9>, ++ <0xb6 KEY_0>, ++ <0xb5 KEY_BACKSPACE>; ++ }; ++ ++ /* for IPTV */ ++ ir_key4 { ++ rockchip,usercode = <0x4db2>; ++ rockchip,key_table = ++ <0x31 KEY_ENTER>, ++ <0x3a KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x7f KEY_VOLUMEUP>, ++ <0xfe KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x63 KEY_MUTE>, ++ <0x6d KEY_1>, ++ <0x6c KEY_2>, ++ <0x33 KEY_3>, ++ <0x71 KEY_4>, ++ <0x70 KEY_5>, ++ <0x37 KEY_6>, ++ <0x75 KEY_7>, ++ <0x74 KEY_8>, ++ <0x3b KEY_9>, ++ <0x78 KEY_0>, ++ <0x73 KEY_PAGEDOWN>, ++ <0x22 KEY_PAGEUP>, ++ <0x72 KEY_SETUP>, ++ <0x7a KEY_CHANNEL_UP>, ++ <0x79 KEY_CHANNEL_DN>, ++ <0x77 KEY_HOME_PAGE>, ++ <0x29 KEY_CH_CUT_BACK>, ++ <0x32 KEY_DIRECT_SEEDING>, ++ <0x6e KEY_REVIEW>, ++ <0x7c KEY_ON_DEMAND>, ++ <0x3c KEY_INFO1>, ++ <0x67 KEY_SOUND1>, ++ <0x25 KEY_X1>, ++ <0x2f KEY_X2>, ++ <0x7d KEY_LOCAL>, ++ <0x6a KEY_PLAYPAUSE>, ++ <0x0b KEY_EQUAL>; ++ }; ++ ++ /* for CMCC */ ++ ir_key5 { ++ rockchip,usercode = <0x1608>; ++ rockchip,key_table = ++ <0x4c KEY_ENTER>, ++ <0x4d KEY_BACK>, ++ <0x4b KEY_UP>, ++ <0x4a KEY_DOWN>, ++ <0x49 KEY_LEFT>, ++ <0x48 KEY_RIGHT>, ++ <0x4e KEY_HOME>, ++ <0x0b KEY_VOLUMEUP>, ++ <0x0c KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x45 KEY_MUTE>, ++ <0x44 KEY_MENU>, ++ <0x78 KEY_1>, ++ <0x77 KEY_2>, ++ <0x76 KEY_3>, ++ <0x75 KEY_4>, ++ <0x74 KEY_5>, ++ <0x73 KEY_6>, ++ <0x72 KEY_7>, ++ <0x71 KEY_8>, ++ <0x70 KEY_9>, ++ <0x79 KEY_0>, ++ <0x43 KEY_EQUAL>, ++ <0x72 KEY_X1>, ++ <0x5f KEY_SETUP>, ++ <0x25 KEY_DIRECT_SEEDING>, ++ <0x24 KEY_REVIEW>, ++ <0x21 KEY_ON_DEMAND>, ++ <0x20 KEY_INFO1>; ++ }; ++ ++ /* rk new remote */ ++ ir_key6 { ++ rockchip,usercode = <0xfe01>; ++ rockchip,key_table = ++ <0xec KEY_ENTER>, ++ <0xe6 KEY_BACK>, ++ <0xe9 KEY_UP>, ++ <0xe5 KEY_DOWN>, ++ <0xae KEY_LEFT>, ++ <0xaf KEY_RIGHT>, ++ <0xee KEY_HOME>, ++ <0xe7 KEY_VOLUMEUP>, ++ <0xef KEY_VOLUMEDOWN>, ++ <0xbf KEY_POWER>, ++ <0xbe KEY_MUTE>, ++ <0xb3 KEY_MENU>, ++ <0xff 388>, ++ <0xb1 KEY_1>, ++ <0xf2 KEY_2>, ++ <0xf3 KEY_3>, ++ <0xb5 KEY_4>, ++ <0xf6 KEY_5>, ++ <0xf7 KEY_6>, ++ <0xb9 KEY_7>, ++ <0xfa KEY_8>, ++ <0xfb KEY_9>, ++ <0xfe KEY_0>, ++ <0xbd KEY_EQUAL>, ++ <0xbc KEY_SETUP>, ++ <0xf0 KEY_LOCAL>, ++ <0x0d KEY_DIRECT_SEEDING>, ++ <0x0c KEY_REVIEW>, ++ <0x0b KEY_ON_DEMAND>, ++ <0x0a KEY_INFO1>, ++ <0x0e KEY_CH_CUT_BACK>; ++ }; ++ ++ /* for IPTV gd */ ++ ir_key7 { ++ rockchip,usercode = <0x4cb3>; ++ rockchip,key_table = ++ <0x31 KEY_ENTER>, ++ <0x3a KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x7f KEY_VOLUMEUP>, ++ <0x7e KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x63 KEY_MUTE>, ++ <0x6d KEY_1>, ++ <0x6c KEY_2>, ++ <0x33 KEY_3>, ++ <0x71 KEY_4>, ++ <0x70 KEY_5>, ++ <0x37 KEY_6>, ++ <0x75 KEY_7>, ++ <0x74 KEY_8>, ++ <0x3b KEY_9>, ++ <0x78 KEY_0>, ++ <0x73 KEY_PAGEDOWN>, ++ <0x22 KEY_PAGEUP>, ++ <0x72 KEY_SETUP>, ++ <0x7a KEY_CHANNEL_UP>, ++ <0x79 KEY_CHANNEL_DN>, ++ <0x77 KEY_HOME_PAGE>, ++ <0x29 KEY_CH_CUT_BACK>, ++ <0x32 KEY_DIRECT_SEEDING>, ++ <0x6e KEY_REVIEW>, ++ <0x7c KEY_ON_DEMAND>, ++ <0x3c KEY_INFO1>, ++ <0x67 KEY_SOUND1>, ++ <0x25 KEY_X1>, ++ <0x2f KEY_X2>, ++ <0x7d KEY_LOCAL>, ++ <0x6a KEY_PLAYPAUSE>, ++ <0x0b KEY_EQUAL>; ++ }; ++ ++ /* for CMCC */ ++ ir_key8 { ++ rockchip,usercode = <0xdd22>; ++ rockchip,key_table = ++ <0x31 KEY_ENTER>, ++ <0x6a KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x7f KEY_VOLUMEUP>, ++ <0x7e KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x63 KEY_MUTE>, ++ <0x6d KEY_1>, ++ <0x6c KEY_2>, ++ <0x33 KEY_3>, ++ <0x71 KEY_4>, ++ <0x70 KEY_5>, ++ <0x37 KEY_6>, ++ <0x75 KEY_7>, ++ <0x74 KEY_8>, ++ <0x3b KEY_9>, ++ <0x78 KEY_0>, ++ <0x73 KEY_PAGEDOWN>, ++ <0x22 KEY_PAGEUP>, ++ <0x72 KEY_SETUP>, ++ <0x7a KEY_CHANNEL_UP>, ++ <0x79 KEY_CHANNEL_DN>, ++ <0x77 KEY_HOME_PAGE>, ++ <0x2f KEY_CH_CUT_BACK>, ++ <0x32 KEY_DIRECT_SEEDING>, ++ <0x6e KEY_REVIEW>, ++ <0x7c KEY_ON_DEMAND>, ++ <0x3c KEY_INFO1>, ++ <0x3a KEY_HELP>, ++ <0x67 KEY_SOUND1>, ++ <0x25 KEY_X2>, ++ <0x7d KEY_MENU>, ++ <0x3f KEY_EQUAL>, ++ <0x29 388>, ++ <0x26 KEY_PLAYPAUSE>, ++ <0x76 401>, ++ <0x7b 400>, ++ <0x69 66>; ++ }; ++ ++ /* for BJLT IPTV */ ++ ir_key9 { ++ rockchip,usercode = <0x3bc4>; ++ rockchip,key_table = ++ <0x81 KEY_ENTER>, ++ <0x80 KEY_BACK>, ++ <0x85 KEY_UP>, ++ <0x87 KEY_DOWN>, ++ <0x84 KEY_LEFT>, ++ <0x86 KEY_RIGHT>, ++ <0x99 KEY_VOLUMEUP>, ++ <0x9a KEY_VOLUMEDOWN>, ++ <0x96 KEY_POWER>, ++ <0x9b KEY_MUTE>, ++ <0x89 KEY_1>, ++ <0x8a KEY_2>, ++ <0x8b KEY_3>, ++ <0x8c KEY_4>, ++ <0x8d KEY_5>, ++ <0x8e KEY_6>, ++ <0x8f KEY_7>, ++ <0x90 KEY_8>, ++ <0x91 KEY_9>, ++ <0x88 KEY_0>, ++ <0x83 KEY_PAGEDOWN>, ++ <0x82 KEY_PAGEUP>, ++ <0x95 KEY_SETUP>, ++ <0x97 KEY_CHANNEL_UP>, ++ <0x98 KEY_CHANNEL_DN>, ++ <0xc6 KEY_LOCAL>, ++ <0xd6 KEY_HOME_PAGE>, ++ <0xd7 KEY_TRACK>, ++ <0xcc KEY_CH_CUT_BACK>, ++ <0xc3 KEY_INTERX>, ++ <0xd1 KEY_DIRECT_SEEDING>, ++ <0xd2 KEY_REVIEW>, ++ <0xd3 KEY_ON_DEMAND>, ++ <0xd4 KEY_INFO1>, ++ <0xc7 KEY_DIRECT_SEEDING>, ++ <0xc8 KEY_REVIEW>, ++ <0xc9 KEY_ON_DEMAND>, ++ <0xca KEY_INFO1>, ++ <0xcd KEY_FAVORITE>, ++ <0xce KEY_CHANNEL_POS>, ++ <0xcf KEY_HELP>, ++ <0xd0 KEY_EVENT>, ++ <0x9c KEY_SOUND1>, ++ <0x93 KEY_X1>, ++ <0x92 KEY_X2>, ++ <0xc0 KEY_END>, ++ <0xc1 KEY_GO_BEGINNING>, ++ <0x9d KEY_PLAYPAUSE>, ++ <0xc4 KEY_STOP>, ++ <0x94 KEY_EQUAL>, ++ <0x9e KEY_YELLOW>, ++ <0x9f KEY_BLUE>, ++ <0xcb KEY_APPLICATION>, ++ <0xc5 KEY_POS>; ++ }; ++ ++ ir_key10 { ++ rockchip,usercode = <0xff00>; ++ rockchip,key_table = ++ <0xf9 KEY_HOME>, ++ <0xbf KEY_BACK>, ++ <0xfb KEY_MENU>, ++ <0xaa KEY_ENTER>, ++ <0xb9 KEY_UP>, ++ <0xe9 KEY_DOWN>, ++ <0xb8 KEY_LEFT>, ++ <0xea KEY_RIGHT>, ++ <0xeb KEY_VOLUMEDOWN>, ++ <0xef KEY_VOLUMEUP>, ++ <0xf7 KEY_MUTE>, ++ <0xe7 KEY_POWER>, ++ <0xfc KEY_POWER>, ++ <0xa9 KEY_VOLUMEDOWN>, ++ <0xa8 KEY_PLAYPAUSE>, ++ <0xe0 KEY_VOLUMEDOWN>, ++ <0xa5 KEY_VOLUMEDOWN>, ++ <0xab 183>, ++ <0xb7 388>, ++ <0xe8 388>, ++ <0xf8 184>, ++ <0xaf 185>, ++ <0xed KEY_VOLUMEDOWN>, ++ <0xee 186>, ++ <0xb3 KEY_VOLUMEDOWN>, ++ <0xf1 KEY_VOLUMEDOWN>, ++ <0xf2 KEY_VOLUMEDOWN>, ++ <0xf3 KEY_SEARCH>, ++ <0xb4 KEY_VOLUMEDOWN>, ++ <0xa4 KEY_SETUP>, ++ <0xbe KEY_SEARCH>; ++ }; ++ ++ ir_key11 { ++ rockchip,usercode = <0xfb04>; ++ rockchip,key_table = ++ <0xa3 KEY_ENTER>, ++ <0xe4 388>, ++ <0xf5 KEY_BACK>, ++ <0xbb KEY_UP>, ++ <0xe2 KEY_DOWN>, ++ <0xe3 KEY_LEFT>, ++ <0xb7 KEY_RIGHT>, ++ <0xe0 KEY_HOME>, ++ <0xba KEY_VOLUMEUP>, ++ <0xda KEY_VOLUMEUP>, ++ <0xe6 KEY_VOLUMEDOWN>, ++ <0xdb KEY_VOLUMEDOWN>, ++ <0xbc KEY_SEARCH>, ++ <0xb2 KEY_POWER>, ++ <0xe5 KEY_POWER>, ++ <0xde KEY_POWER>, ++ <0xdc KEY_MUTE>, ++ <0xa2 KEY_MENU>, ++ <0xec KEY_1>, ++ <0xef KEY_2>, ++ <0xee KEY_3>, ++ <0xf0 KEY_4>, ++ <0xf3 KEY_5>, ++ <0xf2 KEY_6>, ++ <0xf4 KEY_7>, ++ <0xf7 KEY_8>, ++ <0xf6 KEY_9>, ++ <0xb8 KEY_0>; ++ }; ++}; ++ ++ ++ ++&csi2_dphy_hw { ++ status = "disabled"; ++}; ++ ++&csi2_dphy0 { ++ status = "disabled"; ++}; ++ ++&rkisp { ++ status = "disabled"; ++}; ++ ++&rkisp_mmu { ++ status = "disabled"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ ++ vdd_cpu: syr827@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ pinctrl-names = "default"; ++ //pinctrl-0 = <&vsel1_gpios>; ++ //vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1390000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-state = <3>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ rk809_codec: codec { ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; ++ clocks = <&cru I2S1_MCLKOUT>; ++ clock-names = "mclk"; ++ assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; ++ assigned-clock-rates = <12288000>; ++ assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_mclk>; ++ hp-volume = <20>; ++ spk-volume = <3>; ++ mic-in-differential; ++ status = "okay"; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "okay"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "disabled"; ++}; ++ ++&i2c5 { ++ status = "okay"; ++ ++ pcf8563: rtc@51 { ++ status = "okay"; ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ }; ++ ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&nandc0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ nand@0 { ++ reg = <0>; ++ nand-bus-width = <8>; ++ nand-ecc-mode = "hw"; ++ nand-ecc-strength = <16>; ++ nand-ecc-step-size = <1024>; ++ }; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++&sata1 { ++ status = "disabled"; ++}; ++ ++/* PCIE */ ++&combphy2_psq { ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>; ++}; ++ ++&uart3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3m1_xfer>; ++}; ++ ++&uart4 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart4m0_xfer>; ++}; ++ ++&uart5 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5m1_xfer>; ++}; ++ ++&uart7 { ++ status = "disabled"; ++}; ++ ++&uart8 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart8m0_xfer>; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ }; ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ //clock_in_out = "output"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x2e>; ++ rx_delay = <0x2a>; ++ ++ phy-handle = <&rgmii_phy0>; ++ phy-supply = <&vcc_phy>; ++ status = "okay"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ //clock_in_out = "output"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus>; ++ ++ tx_delay = <0x3d>; ++ rx_delay = <0x23>; ++ ++ phy-handle = <&rgmii_phy1>; ++ phy-supply = <&vcc_phy>; ++ status = "disabled"; ++}; ++ ++&can1 { ++ assigned-clocks = <&cru CLK_CAN1>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can1m1_pins>; ++ status = "disabled"; ++}; ++ ++&can2 { ++ assigned-clocks = <&cru CLK_CAN2>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can2m1_pins>; ++ status = "disabled"; ++}; ++ ++ ++&pcie2x1 { ++ num-lanes = <1>; ++ num-viewport = <4>; ++ //pinctrl-0 = <&asm1064_rst>; ++// reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; ++// vpcie3v3-supply = <&vcc5v0_sys>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++}; ++ ++&pcie3x2 { ++ pinctrl-names = "default"; ++// pinctrl-0 = <&pcie_reset_h>; ++ reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_sys>; ++ status = "okay"; ++}; ++ ++&spi3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins >; ++// pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>; ++ st7789v@0 { ++ status = "okay"; ++ compatible = "sitronix,st7789v"; ++ reg = <0>; ++ spi-max-frequency = <12000000>; ++ bgr; ++ fps = <30>; ++ rotate = <90>; ++ buswidth = <8>; ++ dc-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; ++ led-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; ++ debug = <0>; //绛夌骇0锝7 瓒婇珮淇℃伅瓒婂 ++ }; ++}; ++ ++&rk809_codec { ++ status = "disabled"; ++ spk-mute-delay-ms = <30>; ++}; ++ ++&rk809_sound { ++ status = "disabled"; ++}; ++ ++&spi1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <3 RK_PC1 3 &pcfg_pull_none>; ++ spi_dev@0 { ++ compatible = "rockchip,spidev"; ++ reg = <0x0>; ++ spi-max-frequency = <0xb71b00>; ++ }; ++}; ++ ++ ++/* 瀵瑰簲lede usb2phy0_host */ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲lede usb2phy0_otg */ ++&u2phy0_otg { ++// vbus-supply = <&vcc5v0_otg>; ++ status = "disabled"; ++}; ++ ++/* lede usb2phy1_host */ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* lede usb2phy1_otg */ ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++/*USB3.0 controller 瀵瑰簲lede usb_host0_xhci */ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++/*USB3.0 OTG PHY*/ ++&combphy0_us { ++ status = "okay"; ++}; ++ ++/*USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲lede usb_host1_xhci */ ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲lede combphy1 */ ++&combphy1_usq { ++// rockchip,dis-u3otg1-port; ++ status = "okay"; ++}; ++ ++ ++&pinctrl { ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA2 1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA2 2 &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ sata { ++ vcc12V_sata_enable_h: vcc12V_sata_enable_h { ++ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ asm1064_rst: asm1064_rst { ++ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_user_1: led_user_1 { ++ rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_user_2: led_user_2 { ++ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_sata_0: led_sata_0 { ++ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ spi1 { ++ /omit-if-no-ref/ ++ spi1m1_mosi: spi1m1-mosi { ++ rockchip,pins = ++ <3 RK_PC1 3 &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ fan-fg { ++ fg_pin: fg-pin { ++ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pcie { ++ pcie_reset_h: pcie-reset-h { ++ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ status = "okay"; ++ ++// /delete-property/ pmuio1-supply; ++// /delete-property/ vccio2-supply; ++ ++ ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ status = "okay"; ++}; ++ ++&sdmmc0 { ++ max-frequency = <150000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v3_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; ++ status = "okay"; ++}; ++ ++&sfc { ++ status = "okay"; ++}; ++ ++&spdif_8ch { ++ status = "disabled"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&its { ++ status = "okay"; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <&i2s1_8ch>; ++ rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; ++ rockchip,primary-plane = ; ++}; ++ ++/* ++&uart2 { ++ status = "okay"; ++}; ++*/ +\ No newline at end of file +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index cf9c46ea426e..8892191ac40b 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -25,13 +25,16 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 + ++static int dev_num = 0; ++ + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); + void (*set_to_rmii)(struct rk_priv_data *bsp_priv); +@@ -2709,10 +2712,34 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2727,25 +2754,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- random_ether_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-wxy4/kernel-rk35xx-legacy-01.patch b/userpatches/kernel/rockchip-5.10-wxy4/kernel-rk35xx-legacy-01.patch new file mode 100644 index 000000000000..03677b9d76b7 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-wxy4/kernel-rk35xx-legacy-01.patch @@ -0,0 +1,848 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 5 May 2024 19:55:43 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts | 719 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 50 +- + 3 files changed, 758 insertions(+), 13 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 72f79a433fc4..ff21da305515 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-oec-box-wxy4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts b/arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts +new file mode 100644 +index 000000000000..aa1291f3ff5e +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts +@@ -0,0 +1,719 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3566.dtsi" ++#include "rk3568-linux.dtsi" ++ ++ ++/ { ++ model = "OEC BOX WXY4"; ++ compatible = "rockchip,rk3566-oec-box-wxy4", "rockchip,rk3566"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <1750>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <297500>; ++ }; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "hdmi-sound"; ++ status = "okay"; ++ rockchip,jack-det; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ ++ }; ++ ++ spdif_sound: spdif-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "okay"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++//-00 ++ vcc_1v8:vcc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc_3v3:vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vdd_fixed:vdd-fixed { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_fixed"; ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vdd_cpu:vdd-cpu { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm0 0 5000 1>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ regulator-ramp-delay = <2300>; ++ pwm-supply = <&vcc5v0_sys>; ++ status = "okay"; ++ }; ++ ++ vdd_logic:vdd-logic { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm1 0 5000 1>; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ regulator-ramp-delay = <6001>; ++ pwm-supply = <&vcc5v0_sys>; ++ status = "okay"; ++ }; ++ ++ gpio-leds { ++ status = "disabled"; ++ compatible = "gpio-leds"; ++ ++ blue-led { ++ gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; ++ default-state = "off"; ++ }; ++ ++ green-led { ++ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ ++ red-led { ++ gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; ++ default-state = "off"; ++ }; ++ }; ++ ++//-00 ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++//鍘熷巶鍏抽棴浜嗚嚜鍔ㄨ皟棰 ++ auto-freq-en = <0>; ++ center-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++&gpu { ++// clock-names = "gpu", "bus"; ++// interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&hdmi { ++ status = "disabled"; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++ rockchip,defaultmode = <4>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++ ++&i2c0 { ++ status = "disabled"; ++ ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&uart0 { ++ status = "disabled"; ++}; ++ ++&uart1 { ++ status = "disabled"; ++}; ++ ++&uart5 { ++ pinctrl-0 = <&uart5m1_xfer>; ++ status = "okay"; ++}; ++ ++&uart7 { ++ pinctrl-0 = <&uart7m1_xfer>; ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++ ++&i2s3_2ch{ ++ status = "disabled"; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++/* ++&rockchip_suspend { ++ status = "okay"; ++// rockchip,virtual-poweroff = <1>; ++ rockchip,sleep-debug-en = <1>; ++ rockchip,sleep-mode-config = <0x4c4>; ++ rockchip,wakeup-config = < ++ (0 | RKPM_PWM0_WKUP_EN | RKPM_CPU0_WKUP_EN ++ ) ++ >; ++}; ++*/ ++&sata2 { ++ status = "okay"; ++}; ++ ++&pinctrl { ++ ++ stata { ++ sata_pm_reset: sata-pm-reset { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ++ ++}; ++ ++ /* ++ * There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7]. ++ * 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured; ++ * 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages ++ * must be consistent with the software configuration correspondingly ++ * a/ When the hardware IO level is connected to 1.8V, the software voltage configuration ++ * should also be configured to 1.8V accordingly; ++ * b/ When the hardware IO level is connected to 3.3V, the software voltage configuration ++ * should also be configured to 3.3V accordingly; ++ * 3/ VCCIO2 voltage control selection (0xFDC20140) ++ * BIT[0]: 0x0: from GPIO_0A7 (default) ++ * BIT[0]: 0x1: from GRF ++ * Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7: ++ * L:VCCIO2 must supply 3.3V ++ * H:VCCIO2 must supply 1.8V ++ */ ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc_3v3>; ++ pmuio2-supply = <&vcc_3v3>; ++ vccio1-supply = <&vcc_1v8>; ++ vccio3-supply = <&vcc_3v3>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++//ps: venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++//ps: ++&rknpu { ++ rknpu-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc_1v8>; ++}; ++ ++&sdhci { ++//鍘熷巶4.19鍒犻櫎濡備笅涓夐」 ++ bus-width = <8>; ++// no-sdio; ++// no-sd; ++ supports-emmc; ++ non-removable; ++// max-frequency = <200000000>; ++ status = "okay"; ++}; ++ ++ ++&sfc { ++ status = "okay"; ++}; ++ ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++// dr_mode = "otg"; ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <0>; ++//鍘熷巶4.19鍒犻櫎 rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; ++// assigned-clock-rates = <0>, <25000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus ++ &gmac1m1_clkinout>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x2d>; ++ ++ phy-handle = <&rgmii_phy1>; ++ status = "okay"; ++}; ++ ++&sdmmc1 { ++ status = "disabled"; ++}; ++ ++&combphy1_usq { ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sata_pm_reset>; ++}; ++ ++/* 5.10 pansoft ++ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ++ ROCKCHIP_VOP2_SMART0 | 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ++ ROCKCHIP_VOP2_SMART1)>; ++ rockchip,primary-plane = ; ++}; ++*/ ++ ++ ++&csi2_dphy_hw { ++ status = "disabled"; ++}; ++ ++&csi2_dphy0 { ++ status = "disabled"; ++}; ++ ++&csi2_dphy1 { ++ status = "disabled"; ++}; ++ ++&rkisp { ++ status = "disabled"; ++}; ++ ++&rkisp_mmu { ++ status = "disabled"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&edp { ++ status = "disabled"; ++}; ++ ++&edp_phy { ++ status = "disabled"; ++}; ++ ++&route_edp { ++ status = "disabled"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "disabled"; ++}; ++ ++&pwm3 { ++ status = "disabled"; ++ ++}; ++ ++&pwm4 { ++ status = "disabled"; ++}; ++ ++&pwm5 { ++ status = "disabled"; ++}; ++ ++&pwm7 { ++ status = "disabled"; ++}; ++ ++ ++ ++&dsi1 { ++ status = "disabled"; ++}; ++ ++&spdif_8ch { ++ status = "okay"; ++}; ++ ++&pcie2x1 { ++ num-viewport = <8>; ++ status = "disabled"; ++}; ++ ++ ++&threshold { ++ temperature = <60000>; ++}; ++ ++&video_phy0 { ++ status = "okay"; ++}; ++ ++&video_phy1 { ++ status = "okay"; ++}; ++/* ++&dmc_opp_table { ++ ++ opp-1056000000 { ++ opp-supported-hw = <0xf9 0xffff>; ++ opp-hz = /bits/ 64 <1056000000>; ++// opp-microvolt = <850000 850000 850000>; ++// opp-microvolt-L0 = <850000 850000 850000>; ++// opp-microvolt-L1 = <850000 850000 850000>; ++ opp-microvolt = <900000 900000 1000000>; ++ opp-microvolt-L0 = <900000 900000 1000000>; ++ opp-microvolt-L1 = <875000 875000 1000000>; ++ ++ }; ++ ++ /delete-node/ opp-1560000000; ++ /delete-node/ opp-j-m-1560000000; ++}; ++*/ ++ ++&cpu0_opp_table { ++ /delete-node/ opp-1992000000; ++}; +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index cf9c46ea426e..8892191ac40b 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -25,13 +25,16 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 + ++static int dev_num = 0; ++ + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); + void (*set_to_rmii)(struct rk_priv_data *bsp_priv); +@@ -2709,10 +2712,34 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2727,25 +2754,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- random_ether_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-yjh-jm10/kernel-rk35xx-legacy-001-add-yjh-jm10-dts.patch b/userpatches/kernel/rockchip-5.10-yjh-jm10/kernel-rk35xx-legacy-001-add-yjh-jm10-dts.patch new file mode 100644 index 000000000000..39eac8d369e9 --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-yjh-jm10/kernel-rk35xx-legacy-001-add-yjh-jm10-dts.patch @@ -0,0 +1,1142 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 8 Dec 2024 16:25:37 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts | 1107 ++++++++++ + 2 files changed, 1108 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index e8723740039e..6de636fb5a35 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-yjh-jm10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-linux.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-mini-evb-ddr3-v11-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +new file mode 100644 +index 000000000000..78fc7abefd65 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +@@ -0,0 +1,1107 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++* Copyright (c) 2021 Rockchip Electronics Co., Ltd. ++* ++*/ ++ ++/dts-v1/; ++ ++#include ++#include "rk3588.dtsi" ++#include "rk3588s.dtsi" ++#include "rk3588-rk806-single.dtsi" ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3588-linux.dtsi" ++ ++#define kerneL_legacy_5_10 1 ++ ++/ { ++ model = "YJH JM10 MAIN CTRL Board"; ++ compatible = "rockchip,rk3588-yjh-jm10", "rockchip,rk3588"; ++ ++ ++ /delete-node/ chosen; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 1>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <17000>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <417000>; ++ }; ++ ++ menu-key { ++ label = "menu"; ++ linux,code = ; ++ press-threshold-microvolt = <890000>; ++ }; ++ ++ back-key { ++ label = "back"; ++ linux,code = ; ++ press-threshold-microvolt = <1235000>; ++ }; ++ }; ++ ++ bt_sco: bt-sco { ++ status = "disabled"; ++ compatible = "delta,dfbmcs320"; ++ #sound-dai-cells = <1>; ++ }; ++ ++ bt_sound: bt-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "dsp_a"; ++ simple-audio-card,bitclock-inversion; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "rockchip,bt"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s2_2ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&bt_sco 1>; ++ }; ++ }; ++ ++ hdmi0_sound: hdmi0-sound { ++ status = "disabled"; ++ compatible = "rockchip,hdmi"; ++ rockchip,mclk-fs = <128>; ++ rockchip,card-name = "rockchip-hdmi0"; ++ rockchip,cpu = <&i2s5_8ch>; ++ rockchip,codec = <&hdmi0>; ++ rockchip,jack-det; ++ }; ++ ++ hdmi1_sound: hdmi1-sound { ++ status = "disabled"; ++ compatible = "rockchip,hdmi"; ++ rockchip,mclk-fs = <128>; ++ rockchip,card-name = "rockchip-hdmi1"; ++ rockchip,cpu = <&i2s6_8ch>; ++ rockchip,codec = <&hdmi1>; ++ rockchip,jack-det; ++ }; ++ ++ leds: leds { ++ compatible = "gpio-leds"; ++ work_led: work { ++ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ vcc12v_dcin: vcc12v-dcin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc5v0_usbdcin: vcc5v0-usbdcin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usbdcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc5v0_usb: vcc5v0-usb { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usbdcin>; ++ }; ++ ++ pcie20_avdd0v85: pcie20-avdd0v85 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie20_avdd0v85"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ vin-supply = <&vdd_0v85_s0>; ++ }; ++ ++ pcie20_avdd1v8: pcie20-avdd1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie20_avdd1v8"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&avcc_1v8_s0>; ++ }; ++ ++ pcie30_avdd0v75: pcie30-avdd0v75 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie30_avdd0v75"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ vin-supply = <&avdd_0v75_s0>; ++ }; ++ ++ pcie30_avdd1v8: pcie30-avdd1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie30_avdd1v8"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&avcc_1v8_s0>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_pcie30: vcc3v3-pcie30 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie30"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ enable-active-high; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_poweren_gpio>; ++ vin-supply = <&vcc12v_dcin>; ++ //gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; ++ //startup-delay-us = <5000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc5v0_usb>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ }; ++ ++ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sd_s0_pwr>; ++ regulator-name = "vcc_3v3_sd_s0"; ++ enable-active-high; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&hym8563>; ++ clock-names = "ext_clock"; ++ uart_rts_gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart1m1_rtsn>; ++ pinctrl-1 = <&uart1_rts_gpio>; ++ BT,reset_gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ wifi_chip_type = "ap6275p"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_irq>; ++ WIFI,host_wake_irq = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; ++ WIFI,poweren_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ ++ /* If hdmirx node is disabled, delete the reserved-memory node here. */ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ /* Reserve 256MB memory for hdmirx-controller@fdee0000 */ ++ cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00 0x10000000 0x00 0x8000000>; ++ size = <0x00 0x800000>; ++ linux,cma-default; ++ }; ++ }; ++ ++ rt5651_sound: rt5651-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "realtek,rt5651-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,widgets = ++ "Headphone", "Headphone Jack", ++ "Speaker", "Speaker"; ++ simple-audio-card,routing = ++ "Speaker", "HPOL MIX", ++ "Speaker", "HPOR MIX", ++ "Headphone Jack", "HPOL MIX", ++ "Headphone Jack", "HPOR MIX"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rt5651>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ status = "okay"; ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ pwms = <&pwm15 0 1000000 0>; ++ duty_ns = <500000>; ++ cooling-levels = <0 50 100 150 220 255>; ++ rockchip,temp-trips = < ++ 40000 1 ++ 45000 2 ++ 50000 3 ++ 55000 4 ++ 60000 5 ++ >; ++ }; ++ ++}; ++ ++&av1d { ++ status = "okay"; ++}; ++ ++&av1d_mmu { ++ status = "okay"; ++}; ++ ++/* sata pm */ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_ps { ++ status = "okay"; ++}; ++ ++// USB3.1/SATA/PCIe Combo PHY ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++ mem-supply = <&vdd_cpu_big0_mem_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++ mem-supply = <&vdd_cpu_big1_mem_s0>; ++}; ++ ++#if kerneL_legacy_5_10 ++&display_subsystem { ++ clocks = <&hdptxphy_hdmi_clk0>; ++ clock-names = "hdmi0_phy_pll"; ++}; ++#else ++&display_subsystem { ++ clocks = <&hdptxphy_hdmi0>; ++ clock-names = "hdmi0_phy_pll"; ++}; ++#endif ++ ++&hdptxphy_hdmi0 { ++ status = "okay"; ++}; ++ ++&gmac0 { ++ /* Use rgmii-rxid mode to disable rx delay inside Soc */ ++ phy-mode = "rgmii-rxid"; ++ clock_in_out = "output"; ++ snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x45>; ++ //rx_delay = <0x4a>; ++ status = "okay"; ++ ++ phy-handle = <&rgmii_phy0>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ }; ++}; ++ ++&gmac0_mtl_rx_setup { ++ snps,rx-queues-to-use = <2>; ++ queue1 {}; ++}; ++ ++&gmac0_mtl_tx_setup { ++ snps,tx-queues-to-use = <2>; ++ queue1 {}; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ mem-supply = <&vdd_gpu_mem_s0>; ++ status = "okay"; ++}; ++ ++&hdmi0 { ++ enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&hdmi0_in_vp0 { ++ status = "okay"; ++}; ++ ++&route_hdmi0{ ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-0 = <&i2c0m2_xfer>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ //regulator-name = "vdd_cpu_big0_s1"; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { ++ compatible = "rockchip,rk8603"; ++ reg = <0x43>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1m2_xfer>; ++ ++ vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_npu_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ pinctrl-0 = <&i2c4m1_xfer>; ++ status = "disabled"; ++}; ++ ++&i2c6 { ++ status = "okay"; ++ //clock-frequency = <400000>;// For others Display Port Screen ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c6m0_xfer>; ++ ++ hym8563: hym8563@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ wakeup-source; ++ status = "okay"; ++ }; ++ ++}; ++ ++&i2c7 { ++ status = "okay"; ++ ++ rt5651: rt5651@1a { ++ status = "okay"; ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rt5651"; ++ reg = <0x1a>; ++ clock-names = "mclk"; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <1050000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_mclk>; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&jpege_ccu { ++ status = "okay"; ++}; ++ ++&jpege0 { ++ status = "okay"; ++}; ++ ++&jpege0_mmu { ++ status = "okay"; ++}; ++ ++&jpege1 { ++ status = "okay"; ++}; ++ ++&jpege1_mmu { ++ status = "okay"; ++}; ++ ++&jpege2 { ++ status = "okay"; ++}; ++ ++&jpege2_mmu { ++ status = "okay"; ++}; ++ ++&jpege3 { ++ status = "okay"; ++}; ++ ++&jpege3_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&pcie2x1l0 { ++ reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; ++ rockchip,skip-scan-in-resume; ++ status = "okay"; ++ rockchip,perst-inactive-ms = <500>; ++ vpcie3v3-supply = <&vcc3v3_pcie30>; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++ rockchip,pcie30-phymode = ; ++}; ++ ++&pinctrl { ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdmmc { ++ sd_s0_pwr: sd-s0-pwr { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ++ wireless-bluetooth { ++ uart1_rts_gpio: uart1-rts-gpio { ++ rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_poweren_gpio: wifi-poweren-gpio { ++ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm15 { ++ //pinctrl-names = "active"; ++ pinctrl-0 = <&pwm15m2_pins>; ++ status = "okay"; ++}; ++ ++&rga3_core0 { ++ status = "okay"; ++}; ++ ++&rga3_0_mmu { ++ status = "okay"; ++}; ++ ++&rga3_core1 { ++ status = "okay"; ++}; ++ ++&rga3_1_mmu { ++ status = "okay"; ++}; ++ ++&rga2 { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu_s0>; ++ mem-supply = <&vdd_npu_mem_s0>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&rkvdec_ccu { ++ status = "okay"; ++}; ++ ++&rkvdec0 { ++ status = "okay"; ++}; ++ ++&rkvdec0_mmu { ++ status = "okay"; ++}; ++ ++&rkvdec1 { ++ status = "okay"; ++}; ++ ++&rkvdec1_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc_ccu { ++ status = "okay"; ++}; ++ ++&rkvenc0 { ++ /*evb add */ ++ venc-supply = <&vdd_vdenc_s0>; ++ mem-supply = <&vdd_vdenc_mem_s0>; ++ status = "okay"; ++}; ++ ++&rkvenc0_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc1 { ++ /*evb add */ ++ venc-supply = <&vdd_vdenc_s0>; ++ mem-supply = <&vdd_vdenc_mem_s0>; ++ status = "okay"; ++}; ++ ++&rkvenc1_mmu { ++ status = "okay"; ++}; ++ ++&rockchip_suspend { ++ status = "okay"; ++ rockchip,sleep-debug-en = <1>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc_1v8_s0>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ max-frequency = <150000000>; ++ no-sdio; ++ no-mmc; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vqmmc-supply = <&vccio_sd_s0>; ++ vmmc-supply = <&vcc_3v3_sd_s0>; ++ status = "okay"; ++}; ++ ++&soc_thermal { ++ sustainable-power = <15000>; ++ polling-delay = <1000>; ++ polling-delay-passive = <2000>; ++ ++ trips { ++ trip0: trip-point@0 { ++ temperature = <55000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip1: trip-point@1 { ++ temperature = <60000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip2: trip-point@2 { ++ temperature = <65000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip3: trip-point@3 { ++ temperature = <70000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip4: trip-point@4 { ++ temperature = <75000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ pcritical: trip-point@5 { ++ temperature = <80000>; ++ hysteresis = <1000>; ++ type = "active"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&trip0>; ++ cooling-device = <&fan 0 1>; ++ contribution = <1024>; ++ }; ++ map1 { ++ trip = <&trip1>; ++ cooling-device = <&fan 1 2>; ++ contribution = <1024>; ++ }; ++ map2 { ++ trip = <&trip2>; ++ cooling-device = <&fan 2 3>; ++ contribution = <1024>; ++ }; ++ map3 { ++ trip = <&trip3>; ++ cooling-device = <&fan 3 4>; ++ contribution = <1024>; ++ }; ++ map4 { ++ trip = <&trip4>; ++ cooling-device = <&fan 4 5>; ++ contribution = <1024>; ++ }; ++ map5 { ++ trip = <&pcritical>; ++ cooling-device = <&fan 5 6>; ++ contribution = <1024>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-0 = <&uart0m2_xfer>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1m1_xfer>, <&uart1m1_ctsn>; ++}; ++ ++&uart3 { ++ status = "okay"; ++}; ++ ++&uart4 { ++ status = "okay"; ++}; ++ ++&uart5 { ++ status = "okay"; ++}; ++ ++&uart7 { ++ status = "okay"; ++}; ++ ++&uart9 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart9m2_xfer>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usbdp_phy0 { ++ status = "okay"; ++ rockchip,dp-lane-mux = <2 3>; ++}; ++ ++&usbdp_phy0_dp { ++ status = "okay"; ++}; ++ ++&usbdp_phy0_u3 { ++ status = "okay"; ++}; ++ ++&usbdp_phy1 { ++ rockchip,dp-lane-mux = <2 3>; ++ status = "okay"; ++}; ++ ++&usbdp_phy1_dp { ++ status = "okay"; ++}; ++ ++&usbdp_phy1_u3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ extcon = <&u2phy0>; ++ dr_mode = "host"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++/*usb3.1 host2 controller for 5G module*/ ++&usbhost3_0 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3_0 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&vdd_gpu_s0 { ++ regulator-always-on; ++}; ++ ++&vdd_log_s0 { ++ /delete-property/ regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-min-microvolt = <750000>; ++}; ++ ++&vdd_ddr_s0 { ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++}; ++ ++&vcc_2v0_pldo_s3 { ++ regulator-init-microvolt = <2000000>; ++}; ++ ++&vcc_3v3_s3 { ++ regulator-init-microvolt = <3300000>; ++}; ++ ++&vcc_1v8_s3 { ++ regulator-init-microvolt = <1800000>; ++}; ++ ++ ++/* vp0 & vp1 splice for 8K output */ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; ++ rockchip,primary-plane = ; ++ assigned-clocks = <&cru ACLK_VOP>; ++ assigned-clock-rates = <800000000>; ++}; ++ ++&vp1 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp2 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp3 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; ++ rockchip,primary-plane = ; ++}; ++ ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ vop-supply = <&vdd_log_s0>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&wdt { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++/* ++&avcc_1v8_s0{ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++}; ++ ++&vcc_1v8_s0{ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++}; ++*/ +\ No newline at end of file +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-5.10-yjh-jm10/kernel-rk35xx-legacy-002-fix-jm10-dsa-88e6390x-and-typec-usb-dts.patch b/userpatches/kernel/rockchip-5.10-yjh-jm10/kernel-rk35xx-legacy-002-fix-jm10-dsa-88e6390x-and-typec-usb-dts.patch new file mode 100644 index 000000000000..80831f31baac --- /dev/null +++ b/userpatches/kernel/rockchip-5.10-yjh-jm10/kernel-rk35xx-legacy-002-fix-jm10-dsa-88e6390x-and-typec-usb-dts.patch @@ -0,0 +1,271 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Fri, 27 Dec 2024 21:49:24 +0800 +Subject: Patching kernel rk35xx files + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts | 169 +++++++++- + 1 file changed, 160 insertions(+), 9 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +index 78fc7abefd65..8d8c87835d01 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +@@ -394,36 +394,163 @@ &gmac0_rgmii_clk + + tx_delay = <0x45>; + //rx_delay = <0x4a>; + status = "okay"; + +- phy-handle = <&rgmii_phy0>; ++ //phy-handle = <&rgmii_phy0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + + }; + ++ ++/* + &mdio0 { + rgmii_phy0: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; + }; ++*/ + +-&gmac0_mtl_rx_setup { +- snps,rx-queues-to-use = <2>; +- queue1 {}; +-}; + +-&gmac0_mtl_tx_setup { +- snps,tx-queues-to-use = <2>; +- queue1 {}; ++&mdio0 { ++ switch0: switch@0 { ++ compatible = "marvell,mv88e6190"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x1e>; ++ dsa,member = <0 0>; ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0x0>; ++ label = "cpu"; ++ ethernet = <&gmac0>; ++ phy-handle = <&switch0phy0>; ++ phy-mode = "rgmii"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ ++ }; ++ ++ port@1 { ++ reg = <0x1>; ++ label = "eth1"; ++ phy-handle = <&switch0phy1>; ++ }; ++ ++ port@2 { ++ reg = <0x2>; ++ label = "eth2"; ++ phy-handle = <&switch0phy2>; ++ }; ++ ++ port@3 { ++ reg = <0x3>; ++ label = "eth3"; ++ phy-handle = <&switch0phy3>; ++ }; ++ ++ port@4 { ++ reg = <0x4>; ++ label = "eth4"; ++ phy-handle = <&switch0phy4>; ++ }; ++ ++ port@5 { ++ reg = <0x5>; ++ label = "eth5"; ++ phy-handle = <&switch0phy5>; ++ }; ++ ++ port@6 { ++ reg = <0x6>; ++ label = "eth6"; ++ phy-handle = <&switch0phy6>; ++ }; ++ ++ ++ port@7 { ++ reg = <0x7>; ++ label = "eth7"; ++ phy-handle = <&switch0phy7>; ++ }; ++ ++ port@8 { ++ reg = <0x8>; ++ label = "eth8"; ++ phy-handle = <&switch0phy8>; ++ }; ++ }; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ // The MV88E6390 does not report the phy type on the MDIO bus properly, so we force it to the correct value here using the compatible property. ++ switch0phy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <0>; ++ broken-turn-around; ++ }; ++ switch0phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <1>; ++ broken-turn-around; ++ }; ++ switch0phy2: ethernet-phy@2 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <2>; ++ broken-turn-around; ++ }; ++ switch0phy3: ethernet-phy@3 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <3>; ++ broken-turn-around; ++ }; ++ switch0phy4: ethernet-phy@4 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <4>; ++ broken-turn-around; ++ }; ++ switch0phy5: ethernet-phy@5 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <5>; ++ broken-turn-around; ++ }; ++ switch0phy6: ethernet-phy@6 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <6>; ++ broken-turn-around; ++ }; ++ switch0phy7: ethernet-phy@7 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <7>; ++ broken-turn-around; ++ }; ++ switch0phy8: ethernet-phy@8 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <8>; ++ broken-turn-around; ++ }; ++ }; ++ ++ }; + }; + ++ + &gpu { + mali-supply = <&vdd_gpu_s0>; + mem-supply = <&vdd_gpu_mem_s0>; + status = "okay"; + }; +@@ -620,10 +747,11 @@ &pcie2x1l0 { + status = "okay"; + rockchip,perst-inactive-ms = <500>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + }; + ++/* pcie3.0 x 4 slot */ + &pcie30phy { + status = "okay"; + rockchip,pcie30-phymode = ; + }; + +@@ -899,10 +1027,11 @@ &uart9 { + pinctrl-0 = <&uart9m2_xfer>; + status = "okay"; + }; + + &u2phy0_otg { ++ //rockchip,typec-vbus-det; + status = "okay"; + }; + + &u2phy2_host { + phy-supply = <&vcc5v0_host>; +@@ -910,10 +1039,30 @@ &u2phy2_host { + }; + + &usbdp_phy0 { + status = "okay"; + rockchip,dp-lane-mux = <2 3>; ++/* ++ orientation-switch; ++ svid = <0xff01>; ++ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ usbdp_phy0_orientation_switch: endpoint@0 { ++ reg = <0>; ++ //remote-endpoint = <&usbc0_orien_sw>; ++ }; ++ ++ usbdp_phy0_dp_altmode_mux: endpoint@1 { ++ reg = <1>; ++ //remote-endpoint = <&dp_altmode_mux>; ++ }; ++ }; ++*/ + }; + + &usbdp_phy0_dp { + status = "okay"; + }; +@@ -936,11 +1085,11 @@ &usbdp_phy1_u3 { + }; + + &usbdrd_dwc3_0 { + status = "okay"; + extcon = <&u2phy0>; +- dr_mode = "host"; ++ dr_mode = "otg"; + }; + + &u2phy0 { + status = "okay"; + }; +@@ -1085,10 +1234,12 @@ &u2phy1_otg { + + &u2phy1 { + status = "okay"; + }; + ++ ++ + &sata0 { + status = "okay"; + }; + + /* +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-dg-tn3568/kernel-rk35xx-vendor-001-add-ng3568-dts-fix-mac.patch b/userpatches/kernel/rockchip-6.1-dg-tn3568/kernel-rk35xx-vendor-001-add-ng3568-dts-fix-mac.patch new file mode 100644 index 000000000000..e83b4d0a3651 --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-dg-tn3568/kernel-rk35xx-vendor-001-add-ng3568-dts-fix-mac.patch @@ -0,0 +1,878 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Thu, 26 Dec 2024 15:04:15 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts | 746 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 55 +- + 3 files changed, 788 insertions(+), 15 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 1a081603f552..8385170c680c 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-dg-tn3568.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +new file mode 100644 +index 000000000000..2a24b26f0b01 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-dg-tn3568.dts +@@ -0,0 +1,746 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3568.dtsi" ++#include "rk3568-linux.dtsi" ++ ++/ { ++ ++ model = "Rockchip RK3568 DG TN 3568"; ++ compatible = "rockchip,DG-tn3568", "rockchip,rk3568"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ vin-supply = <&vcc5v0_sys>; ++ ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led_status: led-status { ++ label = "led-status"; ++ gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_sys_h>; ++ }; ++ ++ led_on_board: led-on-board { ++ label = "led-on-board"; ++ gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ //linux,default-trigger = "heartbeat"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_on_board_h>; ++ }; ++ ++ led_eth_y: led-eth-y { ++ label = "led-eth-y"; ++ gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-on"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_eth_y_h>; ++ }; ++ ++ led_eth_g: led-eth-g { ++ label = "led-eth-g"; ++ gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "default-on"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_eth_g_h>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ pwms = <&pwm12 0 40000 0>; ++ fan-supply = <&dc_12v>; ++ interrupt-parent = <&gpio3>; ++ interrupts = <11 IRQ_TYPE_EDGE_FALLING>; ++ pulses-per-revolution = <2>; ++ cooling-levels = <0 50 100 150 200 255>; ++ rockchip,temp-trips = < ++ 40000 1 ++ 50000 2 ++ 55000 3 ++ 60000 4 ++ 70000 5 ++ >; ++ }; ++ ++}; ++ ++/* 瀵瑰簲涓荤嚎 combphy1 */ ++&combphy1_usq { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲涓荤嚎 combphy2 */ ++&combphy2_psq { ++ status = "disabled"; ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&gpu { ++ //clock-names = "gpu", "bus"; ++ //interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++ ++ system-status-level = < ++ /*system status freq level*/ ++ SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH ++ >; ++ ++ auto-freq-en = <0>; ++ ++}; ++ ++&pwm12 { ++ pinctrl-0 = <&pwm12m1_pins>; ++ pinctrl-names = "active"; ++ status = "okay"; ++}; ++ ++ ++&i2c0 { ++ status = "okay"; ++ ++ ++ vdd_cpu: regulator@1c { ++ compatible = "tcs,tcs4525"; ++ reg = <0x1c>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1150000>; ++ regulator-ramp-delay = <2300>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ #clock-cells = <1>; ++ #sound-dai-cells = <0>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pmic_int_l>; ++ rockchip,system-power-controller; ++ wakeup-source; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-name = "vdd_logic"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-name = "vdd_gpu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-name = "vccio_sd"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-name = "vcc3v3_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-name = "vcca_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-name = "vcca1v8_pmu"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-name = "vcca1v8_image"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-name = "vcc_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-name = "vcc3v3_sd"; ++ regulator-always-on; ++ regulator-boot-on; ++ ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "okay"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&sata1 { ++ status = "okay"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x2a>; ++ rx_delay = <0x2a>; ++ ++ phy-handle = <&rgmii_phy0>; ++ phy-supply = <&vcc_3v3>; ++ status = "okay"; ++}; ++ ++/* ++// 瀵瑰簲lede usb2phy0_otg ++&u2phy0_otg { ++ vbus-supply = <&vcc5v0_host>; ++ status = "disabled"; ++}; ++ ++// lede usb2phy1_otg ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++//涓荤嚎鏃 ++&usbhost30 { ++ status = "okay"; ++}; ++*/ ++ ++//USB3.0 OTG PHY 瀵瑰簲涓荤嚎combphy0 ++&combphy0_us { ++ status = "okay"; ++ phy-supply = <&vcc5v0_host>; ++}; ++ ++//涓荤嚎鏃 ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++/*USB3.0 controller 瀵瑰簲涓荤嚎 usb_host0_xhci */ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲涓荤嚎 usb2phy0_host */ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/*USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲涓荤嚎 usb_host1_xhci */ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ vbus-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲涓荤嚎 usb2phy1_host */ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲涓荤嚎 usb2phy1_host */ ++&u2phy1_otg { ++ //dg-r phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲涓荤嚎 usb_host1_xhci */ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&pinctrl { ++ ++ ++ pmic { ++ pmic_int_l: pmic-int-l { ++ rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ leds { ++ led_eth_y_h: led_eth_y_h { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_eth_g_h: led_eth_g_h { ++ rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_sys_h: led_sys_h { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_on_board_h: led_on_board_h { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ status = "okay"; ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs200-1_8v; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sfc { ++ status = "okay"; ++}; ++ ++&spdif_8ch { ++ status = "disabled"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&its { ++ status = "okay"; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; +\ No newline at end of file +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index c73d147230d3..0cc56981e80a 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -26,12 +26,14 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 ++static int dev_num = 0; + + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); +@@ -2962,10 +2964,33 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++ /* Create an ethernet address from the system serial number*/ ++ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2980,25 +3005,27 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- eth_random_addr(ðaddr[id * ETH_ALEN]); ++ //dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", ++ //__func__, ret); ++ //eth_random_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); +- +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); +- +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); ++ ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ //dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ //__func__, ret); ++ ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ //dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ //__func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-jp-tvbox/kernel-rk35xx-vendor-001-jp-tvbox.patch b/userpatches/kernel/rockchip-6.1-jp-tvbox/kernel-rk35xx-vendor-001-jp-tvbox.patch new file mode 100644 index 000000000000..f4a3748f96fa --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-jp-tvbox/kernel-rk35xx-vendor-001-jp-tvbox.patch @@ -0,0 +1,1323 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Wed, 26 Jun 2024 00:31:13 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts | 1195 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 50 +- + 3 files changed, 1234 insertions(+), 13 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 5ca976469398..7f3ece680f30 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -333,7 +333,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-rk806-single-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v11.dtb +- ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-jp-tvbox.dtb + subdir-y := $(dts-dirs) overlay +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts b/arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts +new file mode 100644 +index 000000000000..6dfda96b78d1 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3566-jp-tvbox.dts +@@ -0,0 +1,1195 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3566.dtsi" ++#include "rk3568-linux.dtsi" ++ ++ ++/ { ++ model = "JP TVbox 3566"; ++ compatible = "rockchip,JP-TVbox", "rockchip,rk3566"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <0x80>; ++ simple-audio-card,name = "rockchip,hdmi"; ++ status = "okay"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ rk809_sound: rk809-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,rk809-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ // simple-audio-card,hp-det-gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s3_2ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rk809_codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "okay"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ vad_sound: vad-sound { ++ status = "disabled"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip,rk3568-vad"; ++ rockchip,cpu = <&i2s1_8ch>; ++ rockchip,codec = <&rk809_codec>, <&vad>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_usb: vcc5v0-usb { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ regulator-name = "vcc5v0_otg"; ++ }; ++ ++ sdio_pwrseq: sdio-pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_enable_h>; ++ ++ /* ++ * On the module itself this is one of these (depending ++ * on the actual card populated): ++ * - SDIO_RESET_L_WL_REG_ON ++ * - PDN (power down when low) ++ */ ++ post-power-on-delay-ms = <200>; ++ reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ rockchip,grf = <&grf>; ++ wifi_chip_type = "ap6398s"; ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_irq>; ++ WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>; ++// WIFI,vbat_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ //wifi-bt-power-toggle; ++ uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart1m0_rtsn ++ &bt_host_wake_gpio ++ &bt_poweren ++ &bt_host_wake_irq>; ++ pinctrl-1 = <&uart1_gpios>; ++// wakeup-source; ++ BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ rk_headset: rk-headset { ++// status = "okay"; ++ compatible = "rockchip_headset"; ++ headset_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ vcc3v3_vga: vcc3v3-vga { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_vga"; ++ regulator-always-on; ++ regulator-boot-on; ++ gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //gpio4 RK_PB2 GPIO_ACTIVE_HIGH ++ enable-active-high; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ status = "okay"; ++ ++ power-green { ++ gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "none"; ++ }; ++ ++ power-red { ++ gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ }; ++ ++ ++ ++ openvfd { ++ compatible = "open,vfd"; ++ dev_name = "openvfd"; ++ openvfd_gpio_clk = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>; ++ openvfd_gpio_dat = <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; ++// openvfd_gpio_stb = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; ++ openvfd_chars = [00 04 03 02 01]; ++ openvfd_dot_bits = [00 01 03 02 04 05 06]; ++ openvfd_display_type = [06 00 00 00]; ++ status = "okay"; ++ }; ++ ++ ++ resume_reboot { ++ compatible = "resume_reboot"; ++ status = "okay"; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&dfi { ++ status = "disabled"; ++}; ++ ++&dmc { ++ clocks = <&cru 418>; ++ status = "disabled"; ++}; ++ ++&gpu { ++ clock-names = "gpu", "bus"; ++ interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++&hdmi_in_vp1 { ++ status = "disabled"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ rk809_codec: codec { ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; ++ clocks = <&cru I2S1_MCLKOUT>; ++ clock-names = "mclk"; ++ //assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; ++ assigned-clocks = <&cru I2S3_MCLKOUT>, <&cru I2S3_MCLK_IOE>; ++ assigned-clock-rates = <12288000>; ++ //assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; ++ assigned-clock-parents = <&cru I2S3_MCLKOUT_TX>, <&cru I2S3_MCLKOUT>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s3m1_mclk>; ++ hp-volume = <3>; ++ spk-volume = <3>; ++ mic-in-differential; ++ status = "okay"; ++ }; ++ }; ++ ++ vdd_cpu: tcs4525@1c { ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++// regulator-min-microvolt = <712500>; ++ regulator-min-microvolt = <1050000>; ++ regulator-max-microvolt = <1390000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&combphy1_usq { ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ status = "okay"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ //clock_in_out = "output"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ // snps,reset-delays-us = <0 20000 100000>; ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++/* ++ pinctrl-0 = <&gmac1m0_miim ++ &gmac1m0_tx_bus2 ++ &gmac1m0_rx_bus2 ++ &gmac1m0_rgmii_clk ++ &gmac1m0_rgmii_bus>; ++*/ ++ ++ pinctrl-0 = <&gmac1m0_miim ++ &gmac1m0_tx_bus2_level3 ++ &gmac1m0_rx_bus2 ++ &gmac1m0_rgmii_clk_level2 ++ &gmac1m0_rgmii_bus_level3>; ++ ++ tx_delay = <0x41>; ++ rx_delay = <0x2e>; ++ ++ phy-handle = <&rgmii_phy1>; ++ ++ status = "okay"; ++}; ++ ++ ++ ++&i2s2_2ch { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&i2c3 { ++ status = "disabled"; ++}; ++ ++&i2s3_2ch { ++ pinctrl-0 = <&i2s3m1_sclk ++ &i2s3m1_lrck ++ &i2s3m1_sdi ++ &i2s3m1_sdo>; ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "disabled"; ++ pinctrl-0 = <&i2c4m0_xfer>; ++}; ++ ++&i2c5 { ++ status = "disabled"; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++}; ++ ++&spi3 { ++ status = "disabled"; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&pinctrl { ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&dis_ctl>; ++ ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++// <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA2 1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA2 2 &pcfg_pull_none>; ++ }; ++ }; ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-bluetooth { ++ ++ uart8_gpios: uart8-gpios { ++ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ uart1_gpios: uart1-gpios { ++ rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ bt_host_wake_irq: bt-host-wake-irq { ++ rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ bt_host_wake_gpio: bt-host-wake-gpio { ++ rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ bt_poweren: bt-poweren { ++ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd0 { ++ lcd0_rst_gpio: lcd-rst-gpio { ++ rockchip,pins = <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ lcd1 { ++ lcd1_rst_gpio: lcd1-rst-gpio { ++ rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++ ++ fddis_ctr { ++ ++ dis_ctl:dis-ctl { ++ rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>, ++ <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; ++ }; ++ }; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++}; ++ ++&pwm3 { ++ compatible = "rockchip,remotectl-pwm"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm3_pins>; ++ remote_pwm_id = <3>; ++ handle_cpu_id = <1>; ++ remote_support_psci = <0>; ++ status = "okay"; ++ ++ ir_key1 { //jp-box ++ rockchip,usercode = <0xfd01>; ++ rockchip,key_table = ++ <0x31 KEY_REPLY>, ++ <0x2f KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x6a KEY_HOME>, ++ <0x5e KEY_VOLUMEUP>, ++ <0x47 KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x3a 388>, ++ <0x0d KEY_F6>; ++ }; ++ ++/* ++key 102 HOME ++key 158 BACK ++key 108 DPAD_DOWN ++key 103 DPAD_UP ++key 105 DPAD_LEFT ++key 106 DPAD_RIGHT ++key 115 VOLUME_UP ++key 114 VOLUME_DOWN ++key 116 POWER ++key 232 DPAD_CENTER ++key 388 PROFILE_SWITCH ++key 64 TV_MEDIA_PLAY ++*/ ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&route_hdmi { ++ logo,mode = "fullscreen"; ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ vmmc-supply = <&vcc_3v3>; ++ vqmmc-supply = <&vcc_1v8>; ++ status = "okay"; ++}; ++ ++&sdmmc1 { ++ max-frequency = <150000000>; ++ supports-sdio; ++ bus-width = <4>; ++ disable-wp; ++ cap-sd-highspeed; ++ cap-sdio-irq; ++ keep-power-in-suspend; ++ mmc-pwrseq = <&sdio_pwrseq>; ++ non-removable; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; ++ sd-uhs-sdr104; ++ status = "okay"; ++}; ++ ++ ++&spdif_8ch { ++ status = "okay"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++/* ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++*/ ++ ++//firefly蹇呴』閰嶇疆鎴恛tg,鍘熺敓鏄痟ost ++&usbdrd_dwc3 { ++// /delete-property/ snps,dis-u1u2-quirk; ++// /delete-property/ snps,dis_rxdet_inp3_quirk; ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ /delete-property/ snps,dis_rxdet_inp3_quirk; ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <&i2s1_8ch>; ++ rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ++ ROCKCHIP_VOP2_SMART0 | 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ++ ROCKCHIP_VOP2_SMART1)>; ++ rockchip,primary-plane = ; ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&rkisp { ++ status = "okay"; ++}; ++ ++&rkisp_mmu { ++ status = "okay"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&spdif_8ch { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spdifm0_tx>; ++}; ++ ++&uart0 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; ++}; ++ ++&uart3 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3m0_xfer>; ++}; ++ ++&uart7 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart7m0_xfer>; ++}; ++ ++&uart9 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart9m0_xfer>; ++}; ++ ++&wdt { ++ status = "okay"; ++}; ++ ++&rockchip_suspend { ++ status = "okay"; ++ rockchip,virtual-poweroff = <1>; ++ rockchip,sleep-debug-en = <1>; ++ rockchip,sleep-mode-config = <0x4e4>; ++ ++ rockchip,wakeup-config = < ++ (0 ++ | RKPM_PWM0_WKUP_EN ++ | RKPM_CPU0_WKUP_EN ++ | RKPM_GPIO_WKUP_EN ++ | RKPM_USB_WKUP_EN ++ ) ++ >; ++}; ++ ++//绾㈠寮鏈哄繀椤昏瀹氬涓 ++&vdd_logic { ++ regulator-state-mem { ++ /delete-property/ regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1350000>; ++ }; ++}; ++ ++&vcc_1v8 { ++ regulator-state-mem { ++ /delete-property/ regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++}; ++ ++&vcc_3v3 { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++}; ++ ++&vcc3v3_sd { ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++}; ++/* ++&cpu0 { ++ power-model { ++ compatible = "simple-power-model"; ++ leakage-range= <10 40>; ++ ls = <0xffffdc14 6360 0>; ++ static-coefficient = <100000>; ++ ts = <83822 206397 0xffffef34 71>; ++ thermal-zone = "soc-thermal"; ++ }; ++}; ++*/ ++&rkcif { ++ status = "okay"; ++}; ++ ++&rkcif_dvp { ++ status = "disabled"; ++}; ++ ++ ++ ++&pdm { ++ pinctrl-0 = <&pdmm1_clk1 &pdmm1_sdi1 &pdmm1_sdi2 &pdmm1_sdi3>; ++}; ++ ++&edp { ++ hpd-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>; ++}; ++ ++&edp_in_vp0 { ++ status = "okay"; ++}; ++ ++ ++ ++ ++ ++ ++ ++ ++ ++ +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index 28bdf6f2b54b..45e41046504c 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -26,12 +26,14 @@ + #include + #include + #include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" ++#include + + #define MAX_ETH 2 ++static int dev_num = 0; + + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); +@@ -2809,10 +2811,35 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2827,25 +2854,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- eth_random_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-jp-tvbox/kernel-rk35xx-vendor-002-blue.patch b/userpatches/kernel/rockchip-6.1-jp-tvbox/kernel-rk35xx-vendor-002-blue.patch new file mode 100644 index 000000000000..741a6c55e415 --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-jp-tvbox/kernel-rk35xx-vendor-002-blue.patch @@ -0,0 +1,157 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Wed, 26 Jun 2024 01:22:48 +0800 +Subject: Patching kernel rk35xx files net/rfkill/rfkill-bt.c + net/rfkill/rfkill-wlan.c + +Signed-off-by: John Doe +--- + net/rfkill/rfkill-bt.c | 37 +++++++--- + net/rfkill/rfkill-wlan.c | 6 +- + 2 files changed, 28 insertions(+), 15 deletions(-) + +diff --git a/net/rfkill/rfkill-bt.c b/net/rfkill/rfkill-bt.c +index 73b802c7faa4..b404d2e5e875 100644 +--- a/net/rfkill/rfkill-bt.c ++++ b/net/rfkill/rfkill-bt.c +@@ -174,14 +174,19 @@ static int rfkill_rk_setup_wake_irq(struct rfkill_rk_data *rfkill, int flag) + goto fail2; + rfkill->irq_req = 1; + LOG("** disable irq\n"); + disable_irq(irq->irq); + /*ret = disable_irq_wake(irq->irq);init irq wake is disabled,no need to disable*/ ++ ret = enable_irq_wake(irq->irq); ++ if (ret) ++ goto fail3; + } + + return ret; +- ++ ++fail3: ++ free_irq(irq->irq, rfkill); + fail2: + gpio_free(irq->gpio.io); + fail1: + return ret; + } +@@ -285,11 +290,17 @@ static int rfkill_rk_set_power(void *data, bool blocked) + DBG("Enter %s\n", __func__); + + DBG("Set blocked:%d\n", blocked); + + toggle = rfkill->pdata->power_toggle; +- ++ ++ if (toggle) { ++ if (rfkill_get_wifi_power_state(&wifi_power)) { ++ LOG("%s: cannot get wifi power state!\n", __func__); ++ return -1; ++ } ++ } + + DBG("%s: toggle = %s\n", __func__, toggle ? "true" : "false"); + + if (!blocked) { + if (toggle) { +@@ -308,10 +319,12 @@ static int rfkill_rk_set_power(void *data, bool blocked) + if (gpio_is_valid(poweron->io)) { + if (gpio_get_value(poweron->io) == !poweron->enable) { + gpio_direction_output(poweron->io, + !poweron->enable); + msleep(20); ++ if (gpio_is_valid(wake_host->io)) ++ gpio_direction_input(wake_host->io); + gpio_direction_output(poweron->io, + poweron->enable); + msleep(20); + } + } +@@ -323,14 +336,14 @@ static int rfkill_rk_set_power(void *data, bool blocked) + msleep(20); + gpio_direction_output(reset->io, reset->enable); + } + } + +- if (gpio_is_valid(wake_host->io)) { +- LOG("%s: set bt wake_host input!\n", __func__); +- gpio_direction_input(wake_host->io); +- } ++ //if (gpio_is_valid(wake_host->io)) { ++ // LOG("%s: set bt wake_host input!\n", __func__); ++ // gpio_direction_input(wake_host->io); ++ //} + + if (pinctrl && gpio_is_valid(rts->io)) { + pinctrl_select_state(pinctrl, rts->gpio_state); + LOG("ENABLE UART_RTS\n"); + gpio_direction_output(rts->io, rts->enable); +@@ -360,14 +373,14 @@ static int rfkill_rk_set_power(void *data, bool blocked) + !reset->enable); + msleep(20); + } + } + if (toggle) { +- if (rfkill_get_wifi_power_state(&wifi_power)) { +- LOG("%s: cannot get wifi power state!\n", __func__); +- return -EPERM; +- } ++ //if (rfkill_get_wifi_power_state(&wifi_power)) { ++ // LOG("%s: cannot get wifi power state!\n", __func__); ++ // return -EPERM; ++ //} + if (!wifi_power) { + LOG("%s: bt will set vbat to low\n", __func__); + rfkill_set_wifi_bt_power(0); + } else { + LOG("%s: bt shouldn't control the vbat\n", __func__); +@@ -405,11 +418,11 @@ static int rfkill_rk_pm_prepare(struct device *dev) + + // enable bt wakeup host + if (gpio_is_valid(wake_host_irq->gpio.io) && bt_power_state) { + DBG("enable irq for bt wakeup host\n"); + enable_irq(wake_host_irq->irq); +- enable_irq_wake(wake_host_irq->irq); ++ //enable_irq_wake(wake_host_irq->irq); + } + + #ifdef CONFIG_RFKILL_RESET + rfkill_init_sw_state(rfkill->rfkill_dev, BT_BLOCKED); + rfkill_set_sw_state(rfkill->rfkill_dev, BT_BLOCKED); +@@ -435,11 +448,11 @@ static void rfkill_rk_pm_complete(struct device *dev) + rts = &rfkill->pdata->rts_gpio; + + if (gpio_is_valid(wake_host_irq->gpio.io) && bt_power_state) { + LOG("** disable irq\n"); + disable_irq(wake_host_irq->irq); +- disable_irq_wake(wake_host_irq->irq); ++ //disable_irq_wake(wake_host_irq->irq); + } + + if (rfkill->pdata->pinctrl && gpio_is_valid(rts->io)) { + DBG("Enable UART_RTS\n"); + gpio_direction_output(rts->io, rts->enable); +diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c +index 338b59c53dbc..1b212d04e0a8 100644 +--- a/net/rfkill/rfkill-wlan.c ++++ b/net/rfkill/rfkill-wlan.c +@@ -245,13 +245,13 @@ int rockchip_wifi_power(int on) + LOG("%s: wifi power is setted to be remain on.", __func__); + return 0; + } + power_set_time++; + +- if (!rfkill_get_bt_power_state(&bt_power, &toggle)) { +- LOG("%s: toggle = %s\n", __func__, toggle ? "true" : "false"); +- } ++ //if (!rfkill_get_bt_power_state(&bt_power, &toggle)) { ++ // LOG("%s: toggle = %s\n", __func__, toggle ? "true" : "false"); ++ //} + + if (mrfkill->pdata->mregulator.power_ctrl_by_pmu) { + int ret = -1; + char *ldostr; + int level = mrfkill->pdata->mregulator.enable; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-nas-lite/kernel-rk35xx-vendor-001-nas-lite.patch b/userpatches/kernel/rockchip-6.1-nas-lite/kernel-rk35xx-vendor-001-nas-lite.patch new file mode 100644 index 000000000000..84c9a82cf469 --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-nas-lite/kernel-rk35xx-vendor-001-nas-lite.patch @@ -0,0 +1,1917 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Fri, 21 Jun 2024 19:51:17 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 + + arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts | 1784 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 51 +- + 3 files changed, 1825 insertions(+), 12 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 5ca976469398..26ddad25fc0c 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -333,7 +333,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5a.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-rock-5c.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-roc-pc.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-rk806-single-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-tablet-v11.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nas-lite.dtb ++ + + subdir-y := $(dts-dirs) overlay +diff --git a/arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts b/arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts +new file mode 100644 +index 000000000000..369ba0c0e725 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3568-nas-lite.dts +@@ -0,0 +1,1784 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3568.dtsi" ++#include "rk3568-linux.dtsi" ++ ++/ { ++ ++ model = "Rockchip RK3568 DG NAS LITE"; ++ compatible = "rockchip,DG-nas-lite", "rockchip,rk3568"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <1750>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <297500>; ++ }; ++ ++ menu-key { ++ label = "menu"; ++ linux,code = ; ++ press-threshold-microvolt = <980000>; ++ }; ++ ++ back-key { ++ label = "back"; ++ linux,code = ; ++ press-threshold-microvolt = <1305500>; ++ }; ++ }; ++ ++ audiopwmout_diff: audiopwmout-diff { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,audiopwmout-diff"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,bitclock-master = <&master>; ++ simple-audio-card,frame-master = <&master>; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s3_2ch>; ++ }; ++ master: simple-audio-card,codec { ++ sound-dai = <&dig_acodec>; ++ }; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <128>; ++ simple-audio-card,name = "rockchip,hdmi"; ++ status = "okay"; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ }; ++ ++ vcc12v_sata: vcc12v-sata { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_sata"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ enable-active-high; ++ gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc12V_sata_enable_h>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ pdmics: dummy-codec { ++ status = "disabled"; ++ compatible = "rockchip,dummy-codec"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ pdm_mic_array: pdm-mic-array { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "rockchip,pdm-mic-array"; ++ simple-audio-card,cpu { ++ sound-dai = <&pdm>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&pdmics>; ++ }; ++ }; ++ ++ rk809_sound: rk809-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "rockchip,rk809-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s1_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rk809_codec>; ++ }; ++ }; ++ ++ spdif-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "disabled"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ vad_sound: vad-sound { ++ status = "disabled"; ++ compatible = "rockchip,multicodecs-card"; ++ rockchip,card-name = "rockchip,rk3568-vad"; ++ rockchip,cpu = <&i2s1_8ch>; ++ rockchip,codec = <&rk809_codec>, <&vad>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ sata_en: sata_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "sata_en"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ enable-active-high; ++ gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&asm1064_rst>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ ++ vin-supply = <&vcc5v0_sys>; ++ ++ }; ++ ++ vcc5v0_otg: vcc5v0-otg-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_otg"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc5v0_sys>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_otg_en>; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vcc2v8_dvp: vcc2v8-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc2v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc1v8_dvp: vcc1v8-dvp { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v8_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ vcc0v9_dvp: vcc0v9-dvp { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc0v9_dvp"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ vin-supply = <&vcc3v3_sys>; ++ }; ++ ++ //wifi ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ wifi_chip_type = "rtl8723du"; ++ rockchip,grf = <&grf>; ++ WIFI,poweren_gpio = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; ++ keep_wifi_power_on; ++ status = "okay"; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&rk809 1>; ++ clock-names = "ext_clock"; ++ //wifi-bt-power-toggle; ++ status = "okay"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&led_user_1>, <&led_user_2>, <&led_sata_0>; ++ ++ led-user1 { ++ label = "green:user1"; ++ gpios = <&gpio3 RK_PB5 GPIO_ACTIVE_LOW>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led-user2 { ++ label = "blue:user2"; ++ gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; ++ }; ++ ++ led-sata0 { ++ label = "green:sata0"; ++ gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ compatible = "pwm-fan"; ++ pwms = <&pwm0 0 40000 0>; ++ fan-supply = <&dc_12v>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <20 IRQ_TYPE_EDGE_FALLING>; ++ pulses-per-revolution = <2>; ++ cooling-levels = <0 50 100 150 200 255>; ++ rockchip,temp-trips = < ++ 40000 1 ++ 50000 2 ++ 55000 3 ++ 60000 4 ++ 70000 5 ++ >; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&can0 { ++ assigned-clocks = <&cru CLK_CAN0>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can0m1_pins>; ++ status = "disabled"; ++}; ++ ++&can1 { ++ assigned-clocks = <&cru CLK_CAN1>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can1m1_pins>; ++ status = "disabled"; ++}; ++ ++&can2 { ++ assigned-clocks = <&cru CLK_CAN2>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can2m1_pins>; ++ status = "disabled"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu1 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu2 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&cpu3 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++ center-supply = <&vdd_logic>; ++ status = "okay"; ++ ++ system-status-level = < ++ /*system status freq level*/ ++ SYS_STATUS_NORMAL DMC_FREQ_LEVEL_MID_HIGH ++ >; ++ ++ auto-freq-en = <0>; ++ ++}; ++ ++&gpu { ++ clock-names = "gpu", "bus"; ++ interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++ avdd-0v9-supply = <&vdda0v9_image>; ++ avdd-1v8-supply = <&vcca1v8_image>; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++&hdmi_in_vp1 { ++ status = "disabled"; ++}; ++ ++&hdmi_sound { ++ status = "okay"; ++}; ++ ++&pwm0 { ++ pinctrl-0 = <&pwm0m1_pins>; ++ //4.19鍐呮牳闇瑕侀厤缃负default ++ pinctrl-names = "active"; ++ status = "okay"; ++}; ++ ++&pwm4 { ++ status = "disabled"; ++}; ++ ++&pwm5 { ++ status = "disabled"; ++}; ++ ++&pwm15 { ++ compatible = "rockchip,remotectl-pwm"; ++ pinctrl-names = "default"; ++// pinctrl-names = "active"; ++ pinctrl-0 = <&pwm15m0_pins>; ++ remote_pwm_id = <3>; ++ handle_cpu_id = <1>; ++ remote_support_psci = <0>; ++ status = "okay"; ++ ++ ir_key1 { //jp-box ++ rockchip,usercode = <0xfd01>; ++ rockchip,key_table = ++// <0x31 KEY_REPLY>, ++ <0x31 KEY_ENTER>, ++ <0x2f KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x6a KEY_HOME>, ++ <0x5e KEY_VOLUMEUP>, ++ <0x47 KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x3a 388>, ++// <0x0d KEY_O>; ++ <0x0d KEY_C>; ++ }; ++ ++ /*for IPTV ltjc*/ ++ ir_key2 { ++ rockchip,usercode = <0xc43b>; ++ rockchip,key_table = ++ <0x7e KEY_ENTER>, ++ <0x7f KEY_BACK>, ++ <0x7a KEY_UP>, ++ <0x78 KEY_DOWN>, ++ <0x7b KEY_LEFT>, ++ <0x79 KEY_RIGHT>, ++ <0x66 KEY_VOLUMEUP>, ++ <0x65 KEY_VOLUMEDOWN>, ++ <0x69 KEY_POWER>, ++ <0x64 KEY_MUTE>, ++ <0x76 KEY_1>, ++ <0x75 KEY_2>, ++ <0x74 KEY_3>, ++ <0x73 KEY_4>, ++ <0x72 KEY_5>, ++ <0x71 KEY_6>, ++ <0x70 KEY_7>, ++ <0x6f KEY_8>, ++ <0x6e KEY_9>, ++ <0x77 KEY_0>, ++ <0x7c KEY_PAGEDOWN>, ++ <0x7d KEY_PAGEUP>, ++ <0x6a KEY_SETUP>, ++ <0x68 KEY_CHANNEL_UP>, ++ <0x67 KEY_CHANNEL_DN>, ++ <0x39 KEY_PORTAL>, ++ <0x29 KEY_HOME_PAGE>, ++ <0x33 KEY_CH_CUT_BACK>, ++ <0x34 KEY_LOCAL>, ++ <0x2d KEY_REVIEW>, ++ <0x2c KEY_ON_DEMAND>, ++ <0x2b KEY_INFO1>, ++ <0x2e KEY_DIRECT_SEEDING>, ++ <0x2d KEY_REVIEW>, ++ <0x2c KEY_ON_DEMAND>, ++ <0x2b KEY_INFO1>, ++ <0x63 KEY_SOUND1>, ++ <0x6c KEY_X1>, ++ <0x6d KEY_X2>, ++ <0x62 KEY_PLAYPAUSE>, ++ <0x6b KEY_EQUAL>, ++ <0x61 KEY_FASTFORWARD>, ++ <0x60 KEY_REWIND>, ++ <0x3b KEY_STOP>, ++ <0x35 KEY_BLUE>, ++ <0x36 KEY_YELLOW>, ++ <0x37 KEY_GREEN>, ++ <0x38 KEY_RED>; ++ }; ++ ++ ir_key3 { ++ rockchip,usercode = <0x1dcc>; ++ rockchip,key_table = ++ <0xee KEY_ENTER>, ++ <0xf0 KEY_BACK>, ++ <0xf8 KEY_UP>, ++ <0xbb KEY_DOWN>, ++ <0xef KEY_LEFT>, ++ <0xed KEY_RIGHT>, ++ <0xfc KEY_HOME>, ++ <0xf1 KEY_VOLUMEUP>, ++ <0xfd KEY_VOLUMEDOWN>, ++ <0xb7 KEY_SEARCH>, ++ <0xff KEY_POWER>, ++ <0xf3 KEY_MUTE>, ++ <0xbf KEY_MENU>, ++ <0xf9 0x191>, ++ <0xf5 0x192>, ++ <0xb3 388>, ++ <0xbe KEY_1>, ++ <0xba KEY_2>, ++ <0xb2 KEY_3>, ++ <0xbd KEY_4>, ++ <0xf9 KEY_5>, ++ <0xb1 KEY_6>, ++ <0xfc KEY_7>, ++ <0xf8 KEY_8>, ++ <0xb0 KEY_9>, ++ <0xb6 KEY_0>, ++ <0xb5 KEY_BACKSPACE>; ++ }; ++ ++ /* for IPTV */ ++ ir_key4 { ++ rockchip,usercode = <0x4db2>; ++ rockchip,key_table = ++ <0x31 KEY_ENTER>, ++ <0x3a KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x7f KEY_VOLUMEUP>, ++ <0xfe KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x63 KEY_MUTE>, ++ <0x6d KEY_1>, ++ <0x6c KEY_2>, ++ <0x33 KEY_3>, ++ <0x71 KEY_4>, ++ <0x70 KEY_5>, ++ <0x37 KEY_6>, ++ <0x75 KEY_7>, ++ <0x74 KEY_8>, ++ <0x3b KEY_9>, ++ <0x78 KEY_0>, ++ <0x73 KEY_PAGEDOWN>, ++ <0x22 KEY_PAGEUP>, ++ <0x72 KEY_SETUP>, ++ <0x7a KEY_CHANNEL_UP>, ++ <0x79 KEY_CHANNEL_DN>, ++ <0x77 KEY_HOME_PAGE>, ++ <0x29 KEY_CH_CUT_BACK>, ++ <0x32 KEY_DIRECT_SEEDING>, ++ <0x6e KEY_REVIEW>, ++ <0x7c KEY_ON_DEMAND>, ++ <0x3c KEY_INFO1>, ++ <0x67 KEY_SOUND1>, ++ <0x25 KEY_X1>, ++ <0x2f KEY_X2>, ++ <0x7d KEY_LOCAL>, ++ <0x6a KEY_PLAYPAUSE>, ++ <0x0b KEY_EQUAL>; ++ }; ++ ++ /* for CMCC */ ++ ir_key5 { ++ rockchip,usercode = <0x1608>; ++ rockchip,key_table = ++ <0x4c KEY_ENTER>, ++ <0x4d KEY_BACK>, ++ <0x4b KEY_UP>, ++ <0x4a KEY_DOWN>, ++ <0x49 KEY_LEFT>, ++ <0x48 KEY_RIGHT>, ++ <0x4e KEY_HOME>, ++ <0x0b KEY_VOLUMEUP>, ++ <0x0c KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x45 KEY_MUTE>, ++ <0x44 KEY_MENU>, ++ <0x78 KEY_1>, ++ <0x77 KEY_2>, ++ <0x76 KEY_3>, ++ <0x75 KEY_4>, ++ <0x74 KEY_5>, ++ <0x73 KEY_6>, ++ <0x72 KEY_7>, ++ <0x71 KEY_8>, ++ <0x70 KEY_9>, ++ <0x79 KEY_0>, ++ <0x43 KEY_EQUAL>, ++ <0x72 KEY_X1>, ++ <0x5f KEY_SETUP>, ++ <0x25 KEY_DIRECT_SEEDING>, ++ <0x24 KEY_REVIEW>, ++ <0x21 KEY_ON_DEMAND>, ++ <0x20 KEY_INFO1>; ++ }; ++ ++ /* rk new remote */ ++ ir_key6 { ++ rockchip,usercode = <0xfe01>; ++ rockchip,key_table = ++ <0xec KEY_ENTER>, ++ <0xe6 KEY_BACK>, ++ <0xe9 KEY_UP>, ++ <0xe5 KEY_DOWN>, ++ <0xae KEY_LEFT>, ++ <0xaf KEY_RIGHT>, ++ <0xee KEY_HOME>, ++ <0xe7 KEY_VOLUMEUP>, ++ <0xef KEY_VOLUMEDOWN>, ++ <0xbf KEY_POWER>, ++ <0xbe KEY_MUTE>, ++ <0xb3 KEY_MENU>, ++ <0xff 388>, ++ <0xb1 KEY_1>, ++ <0xf2 KEY_2>, ++ <0xf3 KEY_3>, ++ <0xb5 KEY_4>, ++ <0xf6 KEY_5>, ++ <0xf7 KEY_6>, ++ <0xb9 KEY_7>, ++ <0xfa KEY_8>, ++ <0xfb KEY_9>, ++ <0xfe KEY_0>, ++ <0xbd KEY_EQUAL>, ++ <0xbc KEY_SETUP>, ++ <0xf0 KEY_LOCAL>, ++ <0x0d KEY_DIRECT_SEEDING>, ++ <0x0c KEY_REVIEW>, ++ <0x0b KEY_ON_DEMAND>, ++ <0x0a KEY_INFO1>, ++ <0x0e KEY_CH_CUT_BACK>; ++ }; ++ ++ /* for IPTV gd */ ++ ir_key7 { ++ rockchip,usercode = <0x4cb3>; ++ rockchip,key_table = ++ <0x31 KEY_ENTER>, ++ <0x3a KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x7f KEY_VOLUMEUP>, ++ <0x7e KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x63 KEY_MUTE>, ++ <0x6d KEY_1>, ++ <0x6c KEY_2>, ++ <0x33 KEY_3>, ++ <0x71 KEY_4>, ++ <0x70 KEY_5>, ++ <0x37 KEY_6>, ++ <0x75 KEY_7>, ++ <0x74 KEY_8>, ++ <0x3b KEY_9>, ++ <0x78 KEY_0>, ++ <0x73 KEY_PAGEDOWN>, ++ <0x22 KEY_PAGEUP>, ++ <0x72 KEY_SETUP>, ++ <0x7a KEY_CHANNEL_UP>, ++ <0x79 KEY_CHANNEL_DN>, ++ <0x77 KEY_HOME_PAGE>, ++ <0x29 KEY_CH_CUT_BACK>, ++ <0x32 KEY_DIRECT_SEEDING>, ++ <0x6e KEY_REVIEW>, ++ <0x7c KEY_ON_DEMAND>, ++ <0x3c KEY_INFO1>, ++ <0x67 KEY_SOUND1>, ++ <0x25 KEY_X1>, ++ <0x2f KEY_X2>, ++ <0x7d KEY_LOCAL>, ++ <0x6a KEY_PLAYPAUSE>, ++ <0x0b KEY_EQUAL>; ++ }; ++ ++ /* for CMCC */ ++ ir_key8 { ++ rockchip,usercode = <0xdd22>; ++ rockchip,key_table = ++ <0x31 KEY_ENTER>, ++ <0x6a KEY_BACK>, ++ <0x35 KEY_UP>, ++ <0x2d KEY_DOWN>, ++ <0x66 KEY_LEFT>, ++ <0x3e KEY_RIGHT>, ++ <0x7f KEY_VOLUMEUP>, ++ <0x7e KEY_VOLUMEDOWN>, ++ <0x23 KEY_POWER>, ++ <0x63 KEY_MUTE>, ++ <0x6d KEY_1>, ++ <0x6c KEY_2>, ++ <0x33 KEY_3>, ++ <0x71 KEY_4>, ++ <0x70 KEY_5>, ++ <0x37 KEY_6>, ++ <0x75 KEY_7>, ++ <0x74 KEY_8>, ++ <0x3b KEY_9>, ++ <0x78 KEY_0>, ++ <0x73 KEY_PAGEDOWN>, ++ <0x22 KEY_PAGEUP>, ++ <0x72 KEY_SETUP>, ++ <0x7a KEY_CHANNEL_UP>, ++ <0x79 KEY_CHANNEL_DN>, ++ <0x77 KEY_HOME_PAGE>, ++ <0x2f KEY_CH_CUT_BACK>, ++ <0x32 KEY_DIRECT_SEEDING>, ++ <0x6e KEY_REVIEW>, ++ <0x7c KEY_ON_DEMAND>, ++ <0x3c KEY_INFO1>, ++ <0x3a KEY_HELP>, ++ <0x67 KEY_SOUND1>, ++ <0x25 KEY_X2>, ++ <0x7d KEY_MENU>, ++ <0x3f KEY_EQUAL>, ++ <0x29 388>, ++ <0x26 KEY_PLAYPAUSE>, ++ <0x76 401>, ++ <0x7b 400>, ++ <0x69 66>; ++ }; ++ ++ /* for BJLT IPTV */ ++ ir_key9 { ++ rockchip,usercode = <0x3bc4>; ++ rockchip,key_table = ++ <0x81 KEY_ENTER>, ++ <0x80 KEY_BACK>, ++ <0x85 KEY_UP>, ++ <0x87 KEY_DOWN>, ++ <0x84 KEY_LEFT>, ++ <0x86 KEY_RIGHT>, ++ <0x99 KEY_VOLUMEUP>, ++ <0x9a KEY_VOLUMEDOWN>, ++ <0x96 KEY_POWER>, ++ <0x9b KEY_MUTE>, ++ <0x89 KEY_1>, ++ <0x8a KEY_2>, ++ <0x8b KEY_3>, ++ <0x8c KEY_4>, ++ <0x8d KEY_5>, ++ <0x8e KEY_6>, ++ <0x8f KEY_7>, ++ <0x90 KEY_8>, ++ <0x91 KEY_9>, ++ <0x88 KEY_0>, ++ <0x83 KEY_PAGEDOWN>, ++ <0x82 KEY_PAGEUP>, ++ <0x95 KEY_SETUP>, ++ <0x97 KEY_CHANNEL_UP>, ++ <0x98 KEY_CHANNEL_DN>, ++ <0xc6 KEY_LOCAL>, ++ <0xd6 KEY_HOME_PAGE>, ++ <0xd7 KEY_TRACK>, ++ <0xcc KEY_CH_CUT_BACK>, ++ <0xc3 KEY_INTERX>, ++ <0xd1 KEY_DIRECT_SEEDING>, ++ <0xd2 KEY_REVIEW>, ++ <0xd3 KEY_ON_DEMAND>, ++ <0xd4 KEY_INFO1>, ++ <0xc7 KEY_DIRECT_SEEDING>, ++ <0xc8 KEY_REVIEW>, ++ <0xc9 KEY_ON_DEMAND>, ++ <0xca KEY_INFO1>, ++ <0xcd KEY_FAVORITE>, ++ <0xce KEY_CHANNEL_POS>, ++ <0xcf KEY_HELP>, ++ <0xd0 KEY_EVENT>, ++ <0x9c KEY_SOUND1>, ++ <0x93 KEY_X1>, ++ <0x92 KEY_X2>, ++ <0xc0 KEY_END>, ++ <0xc1 KEY_GO_BEGINNING>, ++ <0x9d KEY_PLAYPAUSE>, ++ <0xc4 KEY_STOP>, ++ <0x94 KEY_EQUAL>, ++ <0x9e KEY_YELLOW>, ++ <0x9f KEY_BLUE>, ++ <0xcb KEY_APPLICATION>, ++ <0xc5 KEY_POS>; ++ }; ++ ++ ir_key10 { ++ rockchip,usercode = <0xff00>; ++ rockchip,key_table = ++ <0xf9 KEY_HOME>, ++ <0xbf KEY_BACK>, ++ <0xfb KEY_MENU>, ++ <0xaa KEY_ENTER>, ++ <0xb9 KEY_UP>, ++ <0xe9 KEY_DOWN>, ++ <0xb8 KEY_LEFT>, ++ <0xea KEY_RIGHT>, ++ <0xeb KEY_VOLUMEDOWN>, ++ <0xef KEY_VOLUMEUP>, ++ <0xf7 KEY_MUTE>, ++ <0xe7 KEY_POWER>, ++ <0xfc KEY_POWER>, ++ <0xa9 KEY_VOLUMEDOWN>, ++ <0xa8 KEY_PLAYPAUSE>, ++ <0xe0 KEY_VOLUMEDOWN>, ++ <0xa5 KEY_VOLUMEDOWN>, ++ <0xab 183>, ++ <0xb7 388>, ++ <0xe8 388>, ++ <0xf8 184>, ++ <0xaf 185>, ++ <0xed KEY_VOLUMEDOWN>, ++ <0xee 186>, ++ <0xb3 KEY_VOLUMEDOWN>, ++ <0xf1 KEY_VOLUMEDOWN>, ++ <0xf2 KEY_VOLUMEDOWN>, ++ <0xf3 KEY_SEARCH>, ++ <0xb4 KEY_VOLUMEDOWN>, ++ <0xa4 KEY_SETUP>, ++ <0xbe KEY_SEARCH>; ++ }; ++ ++ ir_key11 { ++ rockchip,usercode = <0xfb04>; ++ rockchip,key_table = ++ <0xa3 KEY_ENTER>, ++ <0xe4 388>, ++ <0xf5 KEY_BACK>, ++ <0xbb KEY_UP>, ++ <0xe2 KEY_DOWN>, ++ <0xe3 KEY_LEFT>, ++ <0xb7 KEY_RIGHT>, ++ <0xe0 KEY_HOME>, ++ <0xba KEY_VOLUMEUP>, ++ <0xda KEY_VOLUMEUP>, ++ <0xe6 KEY_VOLUMEDOWN>, ++ <0xdb KEY_VOLUMEDOWN>, ++ <0xbc KEY_SEARCH>, ++ <0xb2 KEY_POWER>, ++ <0xe5 KEY_POWER>, ++ <0xde KEY_POWER>, ++ <0xdc KEY_MUTE>, ++ <0xa2 KEY_MENU>, ++ <0xec KEY_1>, ++ <0xef KEY_2>, ++ <0xee KEY_3>, ++ <0xf0 KEY_4>, ++ <0xf3 KEY_5>, ++ <0xf2 KEY_6>, ++ <0xf4 KEY_7>, ++ <0xf7 KEY_8>, ++ <0xf6 KEY_9>, ++ <0xb8 KEY_0>; ++ }; ++}; ++ ++ ++ ++&csi2_dphy_hw { ++ status = "disabled"; ++}; ++ ++&csi2_dphy0 { ++ status = "disabled"; ++}; ++ ++&rkisp { ++ status = "disabled"; ++}; ++ ++&rkisp_mmu { ++ status = "disabled"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ ++ vdd_cpu: syr827@40 { ++ compatible = "silergy,syr827"; ++ reg = <0x40>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ pinctrl-names = "default"; ++ //pinctrl-0 = <&vsel1_gpios>; ++ //vsel-gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1390000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-state = <3>; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ ++ rk809: pmic@20 { ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ /* not save the PMIC_POWER_EN register in uboot */ ++ not-save-power-en = <1>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ }; ++ }; ++ ++ regulators { ++ vdd_logic: DCDC_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ ++ rk809_codec: codec { ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rk809-codec", "rockchip,rk817-codec"; ++ clocks = <&cru I2S1_MCLKOUT>; ++ clock-names = "mclk"; ++ assigned-clocks = <&cru I2S1_MCLKOUT>, <&cru I2S1_MCLK_TX_IOE>; ++ assigned-clock-rates = <12288000>; ++ assigned-clock-parents = <&cru I2S1_MCLKOUT_TX>, <&cru I2S1_MCLKOUT_TX>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_mclk>; ++ hp-volume = <20>; ++ spk-volume = <3>; ++ mic-in-differential; ++ status = "okay"; ++ }; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "okay"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&i2c3 { ++ status = "okay"; ++}; ++ ++&i2c4 { ++ status = "disabled"; ++}; ++ ++&i2c5 { ++ status = "okay"; ++ ++ pcf8563: rtc@51 { ++ status = "okay"; ++ compatible = "nxp,pcf8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ }; ++ ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&nandc0 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ nand@0 { ++ reg = <0>; ++ nand-bus-width = <8>; ++ nand-ecc-mode = "hw"; ++ nand-ecc-strength = <16>; ++ nand-ecc-step-size = <1024>; ++ }; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++&sata1 { ++ status = "disabled"; ++}; ++ ++/* PCIE */ ++&combphy2_psq { ++ status = "okay"; ++}; ++ ++&uart0 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_xfer>; ++}; ++ ++&uart3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3m1_xfer>; ++}; ++ ++&uart4 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart4m0_xfer>; ++}; ++ ++&uart5 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5m1_xfer>; ++}; ++ ++&uart7 { ++ status = "disabled"; ++}; ++ ++&uart8 { ++ status = "disabled"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart8m0_xfer>; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ }; ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ //clock_in_out = "output"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x2e>; ++ rx_delay = <0x2a>; ++ ++ phy-handle = <&rgmii_phy0>; ++ phy-supply = <&vcc_phy>; ++ status = "okay"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ //clock_in_out = "output"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus>; ++ ++ tx_delay = <0x3d>; ++ rx_delay = <0x23>; ++ ++ phy-handle = <&rgmii_phy1>; ++ phy-supply = <&vcc_phy>; ++ status = "disabled"; ++}; ++ ++&can1 { ++ assigned-clocks = <&cru CLK_CAN1>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can1m1_pins>; ++ status = "disabled"; ++}; ++ ++&can2 { ++ assigned-clocks = <&cru CLK_CAN2>; ++ assigned-clock-rates = <150000000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&can2m1_pins>; ++ status = "disabled"; ++}; ++ ++ ++&pcie2x1 { ++ num-lanes = <1>; ++ num-viewport = <4>; ++ //pinctrl-0 = <&asm1064_rst>; ++// reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_HIGH>; ++// vpcie3v3-supply = <&vcc5v0_sys>; ++ status = "okay"; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++}; ++ ++&pcie3x2 { ++ pinctrl-names = "default"; ++// pinctrl-0 = <&pcie_reset_h>; ++ reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; ++ vpcie3v3-supply = <&vcc3v3_sys>; ++ status = "okay"; ++}; ++ ++&spi3 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi3m1_cs0 &spi3m1_pins >; ++// pinctrl-1 = <&spi3m1_cs0 &spi3m1_pins_hs>; ++ st7789v@0 { ++ status = "okay"; ++ compatible = "sitronix,st7789v"; ++ reg = <0>; ++ spi-max-frequency = <12000000>; ++ bgr; ++ fps = <30>; ++ rotate = <90>; ++ buswidth = <8>; ++ dc-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; ++ reset-gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_LOW>; ++ led-gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_LOW>; ++ debug = <0>; //绛夌骇0锝7 瓒婇珮淇℃伅瓒婂 ++ }; ++}; ++ ++&rk809_codec { ++ status = "disabled"; ++ spk-mute-delay-ms = <30>; ++}; ++ ++&rk809_sound { ++ status = "disabled"; ++}; ++ ++&spi1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <3 RK_PC1 3 &pcfg_pull_none>; ++ spi_dev@0 { ++ compatible = "rockchip,spidev"; ++ reg = <0x0>; ++ spi-max-frequency = <0xb71b00>; ++ }; ++}; ++ ++ ++/* 瀵瑰簲lede usb2phy0_host */ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲lede usb2phy0_otg */ ++&u2phy0_otg { ++// vbus-supply = <&vcc5v0_otg>; ++ status = "disabled"; ++}; ++ ++/* lede usb2phy1_host */ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++/* lede usb2phy1_otg */ ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++/*USB3.0 controller 瀵瑰簲lede usb_host0_xhci */ ++&usbdrd_dwc3 { ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++/*USB3.0 OTG PHY*/ ++&combphy0_us { ++ status = "okay"; ++}; ++ ++/*USB 3.0 HOST 涓 SATA1 澶嶇敤 瀵瑰簲lede usb_host1_xhci */ ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++/* 瀵瑰簲lede combphy1 */ ++&combphy1_usq { ++// rockchip,dis-u3otg1-port; ++ status = "okay"; ++}; ++ ++ ++&pinctrl { ++ pmic { ++ pmic_int: pmic_int { ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ rockchip,pins = ++ <0 RK_PA2 1 &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ rockchip,pins = ++ <0 RK_PA2 2 &pcfg_pull_none>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_otg_en: vcc5v0-otg-en { ++ rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ sata { ++ vcc12V_sata_enable_h: vcc12V_sata_enable_h { ++ rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ asm1064_rst: asm1064_rst { ++ rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ leds { ++ led_user_1: led_user_1 { ++ rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_user_2: led_user_2 { ++ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ ++ led_sata_0: led_sata_0 { ++ rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ spi1 { ++ /omit-if-no-ref/ ++ spi1m1_mosi: spi1m1-mosi { ++ rockchip,pins = ++ <3 RK_PC1 3 &pcfg_pull_none>; ++ }; ++ ++ }; ++ ++ fan-fg { ++ fg_pin: fg-pin { ++ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ pcie { ++ pcie_reset_h: pcie-reset-h { ++ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++}; ++ ++&pmu_io_domains { ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio2-supply = <&vcc_1v8>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ status = "okay"; ++ ++// /delete-property/ pmuio1-supply; ++// /delete-property/ vccio2-supply; ++ ++ ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++ venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcca_1v8>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ supports-emmc; ++ non-removable; ++ max-frequency = <200000000>; ++ status = "okay"; ++}; ++ ++&sdmmc0 { ++ max-frequency = <150000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vmmc-supply = <&vcc3v3_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; ++ status = "okay"; ++}; ++ ++&sfc { ++ status = "okay"; ++}; ++ ++&spdif_8ch { ++ status = "disabled"; ++}; ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&its { ++ status = "okay"; ++}; ++ ++&rng { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <&i2s1_8ch>; ++ rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; ++ rockchip,primary-plane = ; ++}; ++ ++/* ++&uart2 { ++ status = "okay"; ++}; ++*/ +\ No newline at end of file +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index 28bdf6f2b54b..8ad253b3b895 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -24,14 +24,16 @@ + #include + #include + #include + #include + #include ++#include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" + + #define MAX_ETH 2 ++static int dev_num = 0; + + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); +@@ -2809,10 +2811,36 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ ++ ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2827,25 +2855,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- eth_random_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-wxy4/kernel-rk35xx-vendor-wxy4.patch b/userpatches/kernel/rockchip-6.1-wxy4/kernel-rk35xx-vendor-wxy4.patch new file mode 100644 index 000000000000..673883a65553 --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-wxy4/kernel-rk35xx-vendor-wxy4.patch @@ -0,0 +1,849 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Tue, 26 Nov 2024 23:16:56 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts | 719 ++++++++++ + drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 50 +- + 3 files changed, 758 insertions(+), 13 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 1a081603f552..ff5e10601ca5 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-oec-box-wxy4.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts b/arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts +new file mode 100644 +index 000000000000..aa1291f3ff5e +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3566-oec-box-wxy4.dts +@@ -0,0 +1,719 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd. ++ * ++ */ ++/dts-v1/; ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3566.dtsi" ++#include "rk3568-linux.dtsi" ++ ++ ++/ { ++ model = "OEC BOX WXY4"; ++ compatible = "rockchip,rk3566-oec-box-wxy4", "rockchip,rk3566"; ++ ++ chosen: chosen { ++ bootargs = "earlycon=uart8250,mmio32,0xfe660000 console=ttyFIQ0"; ++ }; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <1750>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <297500>; ++ }; ++ }; ++ ++ dc_12v: dc-12v { ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ hdmi_sound: hdmi-sound { ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "hdmi-sound"; ++ status = "okay"; ++ rockchip,jack-det; ++ ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&hdmi>; ++ }; ++ ++ }; ++ ++ spdif_sound: spdif-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,name = "ROCKCHIP,SPDIF"; ++ simple-audio-card,cpu { ++ sound-dai = <&spdif_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&spdif_out>; ++ }; ++ }; ++ ++ spdif_out: spdif-out { ++ status = "okay"; ++ compatible = "linux,spdif-dit"; ++ #sound-dai-cells = <0>; ++ }; ++ ++ ++ vcc3v3_sys: vcc3v3-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++//-00 ++ vcc_1v8:vcc_1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc_3v3:vcc_3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vdd_fixed:vdd-fixed { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_fixed"; ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vdd_cpu:vdd-cpu { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm0 0 5000 1>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ regulator-ramp-delay = <2300>; ++ pwm-supply = <&vcc5v0_sys>; ++ status = "okay"; ++ }; ++ ++ vdd_logic:vdd-logic { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm1 0 5000 1>; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ regulator-ramp-delay = <6001>; ++ pwm-supply = <&vcc5v0_sys>; ++ status = "okay"; ++ }; ++ ++ gpio-leds { ++ status = "disabled"; ++ compatible = "gpio-leds"; ++ ++ blue-led { ++ gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; ++ default-state = "off"; ++ }; ++ ++ green-led { ++ gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; ++ default-state = "on"; ++ }; ++ ++ red-led { ++ gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; ++ default-state = "off"; ++ }; ++ }; ++ ++//-00 ++ ++ vcc5v0_host: vcc5v0-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ regulator-name = "vcc5v0_host"; ++ regulator-always-on; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++}; ++ ++&bus_npu { ++ bus-supply = <&vdd_logic>; ++ pvtm-supply = <&vdd_cpu>; ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_cpu>; ++}; ++ ++&dfi { ++ status = "okay"; ++}; ++ ++&dmc { ++//鍘熷巶鍏抽棴浜嗚嚜鍔ㄨ皟棰 ++ auto-freq-en = <0>; ++ center-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++&gpu { ++// clock-names = "gpu", "bus"; ++// interrupt-names = "gpu", "mmu", "job"; ++ mali-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++ ++&display_subsystem { ++ status = "disabled"; ++}; ++ ++&hdmi { ++ status = "disabled"; ++ rockchip,phy-table = ++ <92812500 0x8009 0x0000 0x0270>, ++ <165000000 0x800b 0x0000 0x026d>, ++ <185625000 0x800b 0x0000 0x01ed>, ++ <297000000 0x800b 0x0000 0x01ad>, ++ <594000000 0x8029 0x0000 0x0088>, ++ <000000000 0x0000 0x0000 0x0000>; ++ rockchip,defaultmode = <4>; ++}; ++ ++&hdmi_in_vp0 { ++ status = "okay"; ++}; ++ ++ ++&i2c0 { ++ status = "disabled"; ++ ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&uart0 { ++ status = "disabled"; ++}; ++ ++&uart1 { ++ status = "disabled"; ++}; ++ ++&uart5 { ++ pinctrl-0 = <&uart5m1_xfer>; ++ status = "okay"; ++}; ++ ++&uart7 { ++ pinctrl-0 = <&uart7m1_xfer>; ++ status = "okay"; ++}; ++ ++&i2s1_8ch { ++ status = "disabled"; ++ rockchip,clk-trcm = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s1m0_sclktx ++ &i2s1m0_lrcktx ++ &i2s1m0_sdi0 ++ &i2s1m0_sdo0>; ++}; ++ ++ ++&i2s3_2ch{ ++ status = "disabled"; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++/* ++&rockchip_suspend { ++ status = "okay"; ++// rockchip,virtual-poweroff = <1>; ++ rockchip,sleep-debug-en = <1>; ++ rockchip,sleep-mode-config = <0x4c4>; ++ rockchip,wakeup-config = < ++ (0 | RKPM_PWM0_WKUP_EN | RKPM_CPU0_WKUP_EN ++ ) ++ >; ++}; ++*/ ++&sata2 { ++ status = "okay"; ++}; ++ ++&pinctrl { ++ ++ stata { ++ sata_pm_reset: sata-pm-reset { ++ rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_output_high>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ++ ++}; ++ ++ /* ++ * There are 10 independent IO domains in RK3566/RK3568, including PMUIO[0:2] and VCCIO[1:7]. ++ * 1/ PMUIO0 and PMUIO1 are fixed-level power domains which cannot be configured; ++ * 2/ PMUIO2 and VCCIO1,VCCIO[3:7] domains require that their hardware power supply voltages ++ * must be consistent with the software configuration correspondingly ++ * a/ When the hardware IO level is connected to 1.8V, the software voltage configuration ++ * should also be configured to 1.8V accordingly; ++ * b/ When the hardware IO level is connected to 3.3V, the software voltage configuration ++ * should also be configured to 3.3V accordingly; ++ * 3/ VCCIO2 voltage control selection (0xFDC20140) ++ * BIT[0]: 0x0: from GPIO_0A7 (default) ++ * BIT[0]: 0x1: from GRF ++ * Default is determined by Pin FLASH_VOL_SEL/GPIO0_A7: ++ * L:VCCIO2 must supply 3.3V ++ * H:VCCIO2 must supply 1.8V ++ */ ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc_3v3>; ++ pmuio2-supply = <&vcc_3v3>; ++ vccio1-supply = <&vcc_1v8>; ++ vccio3-supply = <&vcc_3v3>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++}; ++ ++&rk_rga { ++ status = "okay"; ++}; ++ ++&rkvdec { ++ status = "okay"; ++}; ++ ++&rkvdec_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc { ++//ps: venc-supply = <&vdd_logic>; ++ status = "okay"; ++}; ++ ++&rkvenc_mmu { ++ status = "okay"; ++}; ++//ps: ++&rknpu { ++ rknpu-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&route_hdmi { ++ status = "okay"; ++ connect = <&vp0_out_hdmi>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc_1v8>; ++}; ++ ++&sdhci { ++//鍘熷巶4.19鍒犻櫎濡備笅涓夐」 ++ bus-width = <8>; ++// no-sdio; ++// no-sd; ++ supports-emmc; ++ non-removable; ++// max-frequency = <200000000>; ++ status = "okay"; ++}; ++ ++ ++&sfc { ++ status = "okay"; ++}; ++ ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&u2phy0_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy1_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usb2phy0 { ++ status = "okay"; ++}; ++ ++&usb2phy1 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3 { ++// dr_mode = "otg"; ++ dr_mode = "host"; ++ extcon = <&usb2phy0>; ++ status = "okay"; ++}; ++ ++&usbdrd30 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3 { ++ status = "okay"; ++}; ++ ++&usbhost30 { ++ status = "okay"; ++}; ++ ++&vad { ++ rockchip,audio-src = <0>; ++//鍘熷巶4.19鍒犻櫎 rockchip,buffer-time-ms = <128>; ++ rockchip,det-channel = <0>; ++ rockchip,mode = <0>; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vepu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ assigned-clocks = <&cru DCLK_VOP1>; ++ assigned-clock-parents = <&cru PLL_VPLL>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; ++// assigned-clock-rates = <0>, <25000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus ++ &gmac1m1_clkinout>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x2d>; ++ ++ phy-handle = <&rgmii_phy1>; ++ status = "okay"; ++}; ++ ++&sdmmc1 { ++ status = "disabled"; ++}; ++ ++&combphy1_usq { ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sata_pm_reset>; ++}; ++ ++/* 5.10 pansoft ++ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0 | 1 << ++ ROCKCHIP_VOP2_SMART0 | 1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1 | 1 << ++ ROCKCHIP_VOP2_SMART1)>; ++ rockchip,primary-plane = ; ++}; ++*/ ++ ++ ++&csi2_dphy_hw { ++ status = "disabled"; ++}; ++ ++&csi2_dphy0 { ++ status = "disabled"; ++}; ++ ++&csi2_dphy1 { ++ status = "disabled"; ++}; ++ ++&rkisp { ++ status = "disabled"; ++}; ++ ++&rkisp_mmu { ++ status = "disabled"; ++}; ++ ++&rkisp_vir0 { ++ status = "disabled"; ++}; ++ ++&edp { ++ status = "disabled"; ++}; ++ ++&edp_phy { ++ status = "disabled"; ++}; ++ ++&route_edp { ++ status = "disabled"; ++}; ++ ++&pwm0 { ++ status = "okay"; ++}; ++ ++&pwm1 { ++ status = "okay"; ++}; ++ ++&pwm2 { ++ status = "disabled"; ++}; ++ ++&pwm3 { ++ status = "disabled"; ++ ++}; ++ ++&pwm4 { ++ status = "disabled"; ++}; ++ ++&pwm5 { ++ status = "disabled"; ++}; ++ ++&pwm7 { ++ status = "disabled"; ++}; ++ ++ ++ ++&dsi1 { ++ status = "disabled"; ++}; ++ ++&spdif_8ch { ++ status = "okay"; ++}; ++ ++&pcie2x1 { ++ num-viewport = <8>; ++ status = "disabled"; ++}; ++ ++ ++&threshold { ++ temperature = <60000>; ++}; ++ ++&video_phy0 { ++ status = "okay"; ++}; ++ ++&video_phy1 { ++ status = "okay"; ++}; ++/* ++&dmc_opp_table { ++ ++ opp-1056000000 { ++ opp-supported-hw = <0xf9 0xffff>; ++ opp-hz = /bits/ 64 <1056000000>; ++// opp-microvolt = <850000 850000 850000>; ++// opp-microvolt-L0 = <850000 850000 850000>; ++// opp-microvolt-L1 = <850000 850000 850000>; ++ opp-microvolt = <900000 900000 1000000>; ++ opp-microvolt-L0 = <900000 900000 1000000>; ++ opp-microvolt-L1 = <875000 875000 1000000>; ++ ++ }; ++ ++ /delete-node/ opp-1560000000; ++ /delete-node/ opp-j-m-1560000000; ++}; ++*/ ++ ++&cpu0_opp_table { ++ /delete-node/ opp-1992000000; ++}; +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +index c73d147230d3..d6aa58f50c72 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +@@ -24,14 +24,16 @@ + #include + #include + #include + #include + #include ++#include + #include "stmmac_platform.h" + #include "dwmac-rk-tool.h" + + #define MAX_ETH 2 ++static int dev_num = 0; + + struct rk_priv_data; + struct rk_gmac_ops { + void (*set_to_rgmii)(struct rk_priv_data *bsp_priv, + int tx_delay, int rx_delay); +@@ -2962,10 +2964,35 @@ int dwmac_rk_get_phy_interface(struct stmmac_priv *priv) + + return bsp_priv->phy_iface; + } + EXPORT_SYMBOL(dwmac_rk_get_phy_interface); + ++/* ++ * Create an ethernet address from the system serial number. ++ */ ++static int __init etherm_addr(char *addr) ++{ ++ unsigned int serial; ++ ++ if (system_serial_low == 0 && system_serial_high == 0) ++ return -ENODEV; ++ ++ serial = system_serial_low | system_serial_high; ++ ++ addr[0] = 0; ++ addr[1] = 0; ++ addr[2] = 0xa4; ++ addr[3] = 0x10 + (serial >> 24); ++ addr[4] = serial >> 16; ++ addr[5] = (serial >> 8) + dev_num; ++ ++ dev_num++; ++ ++ return 0; ++} ++ ++ + static void rk_get_eth_addr(void *priv, unsigned char *addr) + { + struct rk_priv_data *bsp_priv = priv; + struct device *dev = &bsp_priv->pdev->dev; + unsigned char ethaddr[ETH_ALEN * MAX_ETH] = {0}; +@@ -2980,25 +3007,24 @@ static void rk_get_eth_addr(void *priv, unsigned char *addr) + } + + ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); + if (ret <= 0 || + !is_valid_ether_addr(ðaddr[id * ETH_ALEN])) { +- dev_err(dev, "%s: rk_vendor_read eth mac address failed (%d)\n", +- __func__, ret); +- eth_random_addr(ðaddr[id * ETH_ALEN]); ++ //random_ether_addr(ðaddr[id * ETH_ALEN]); ++ etherm_addr(ðaddr[id * ETH_ALEN]); + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); +- dev_err(dev, "%s: generate random eth mac address: %pM\n", __func__, addr); ++ dev_err(dev, "%s: use serial to generate eth mac address: %pM\n", __func__, addr); + +- ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != 0) +- dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", +- __func__, ret); ++ //ret = rk_vendor_write(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != 0) ++ // dev_err(dev, "%s: rk_vendor_write eth mac address failed (%d)\n", ++ // __func__, ret); + +- ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); +- if (ret != ETH_ALEN * MAX_ETH) +- dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", +- __func__, id, ret); ++ //ret = rk_vendor_read(LAN_MAC_ID, ethaddr, ETH_ALEN * MAX_ETH); ++ //if (ret != ETH_ALEN * MAX_ETH) ++ // dev_err(dev, "%s: id: %d rk_vendor_read eth mac address failed (%d)\n", ++ // __func__, id, ret); + } else { + memcpy(addr, ðaddr[id * ETH_ALEN], ETH_ALEN); + } + + out: +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-yjh-jm10/kernel-rk35xx-vendor-001-add-yjh-jm10-dts.patch b/userpatches/kernel/rockchip-6.1-yjh-jm10/kernel-rk35xx-vendor-001-add-yjh-jm10-dts.patch new file mode 100644 index 000000000000..ae8e397a1aa3 --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-yjh-jm10/kernel-rk35xx-vendor-001-add-yjh-jm10-dts.patch @@ -0,0 +1,1142 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 8 Dec 2024 16:29:02 +0800 +Subject: Patching kernel rk35xx files arch/arm64/boot/dts/rockchip/Makefile + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/Makefile | 2 +- + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts | 1107 ++++++++++ + 2 files changed, 1108 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile +index 1a081603f552..25dfc492aaee 100644 +--- a/arch/arm64/boot/dts/rockchip/Makefile ++++ b/arch/arm64/boot/dts/rockchip/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 +-dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-yjh-jm10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10.dtb + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb-ddr3-v10-avb.dtb +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +new file mode 100644 +index 000000000000..b9f8ed9892a8 +--- /dev/null ++++ b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +@@ -0,0 +1,1107 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++* Copyright (c) 2021 Rockchip Electronics Co., Ltd. ++* ++*/ ++ ++/dts-v1/; ++ ++#include ++#include "rk3588.dtsi" ++#include "rk3588s.dtsi" ++#include "rk3588-rk806-single.dtsi" ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "rk3588-linux.dtsi" ++ ++#define kerneL_legacy_5_10 0 ++ ++/ { ++ model = "YJH JM10 MAIN CTRL Board"; ++ compatible = "rockchip,rk3588-yjh-jm10", "rockchip,rk3588"; ++ ++ ++ /delete-node/ chosen; ++ ++ adc_keys: adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 1>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ poll-interval = <100>; ++ ++ vol-up-key { ++ label = "volume up"; ++ linux,code = ; ++ press-threshold-microvolt = <17000>; ++ }; ++ ++ vol-down-key { ++ label = "volume down"; ++ linux,code = ; ++ press-threshold-microvolt = <417000>; ++ }; ++ ++ menu-key { ++ label = "menu"; ++ linux,code = ; ++ press-threshold-microvolt = <890000>; ++ }; ++ ++ back-key { ++ label = "back"; ++ linux,code = ; ++ press-threshold-microvolt = <1235000>; ++ }; ++ }; ++ ++ bt_sco: bt-sco { ++ status = "disabled"; ++ compatible = "delta,dfbmcs320"; ++ #sound-dai-cells = <1>; ++ }; ++ ++ bt_sound: bt-sound { ++ status = "disabled"; ++ compatible = "simple-audio-card"; ++ simple-audio-card,format = "dsp_a"; ++ simple-audio-card,bitclock-inversion; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,name = "rockchip,bt"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s2_2ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&bt_sco 1>; ++ }; ++ }; ++ ++ hdmi0_sound: hdmi0-sound { ++ status = "disabled"; ++ compatible = "rockchip,hdmi"; ++ rockchip,mclk-fs = <128>; ++ rockchip,card-name = "rockchip-hdmi0"; ++ rockchip,cpu = <&i2s5_8ch>; ++ rockchip,codec = <&hdmi0>; ++ rockchip,jack-det; ++ }; ++ ++ hdmi1_sound: hdmi1-sound { ++ status = "disabled"; ++ compatible = "rockchip,hdmi"; ++ rockchip,mclk-fs = <128>; ++ rockchip,card-name = "rockchip-hdmi1"; ++ rockchip,cpu = <&i2s6_8ch>; ++ rockchip,codec = <&hdmi1>; ++ rockchip,jack-det; ++ }; ++ ++ leds: leds { ++ compatible = "gpio-leds"; ++ work_led: work { ++ gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ test-power { ++ status = "okay"; ++ }; ++ ++ vcc12v_dcin: vcc12v-dcin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc12v_dcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc5v0_usbdcin: vcc5v0-usbdcin { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usbdcin"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc12v_dcin>; ++ }; ++ ++ vcc5v0_usb: vcc5v0-usb { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_usb"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vcc5v0_usbdcin>; ++ }; ++ ++ pcie20_avdd0v85: pcie20-avdd0v85 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie20_avdd0v85"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++ vin-supply = <&vdd_0v85_s0>; ++ }; ++ ++ pcie20_avdd1v8: pcie20-avdd1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie20_avdd1v8"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&avcc_1v8_s0>; ++ }; ++ ++ pcie30_avdd0v75: pcie30-avdd0v75 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie30_avdd0v75"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <750000>; ++ regulator-max-microvolt = <750000>; ++ vin-supply = <&avdd_0v75_s0>; ++ }; ++ ++ pcie30_avdd1v8: pcie30-avdd1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "pcie30_avdd1v8"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&avcc_1v8_s0>; ++ }; ++ ++ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v1_nldo_s3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc3v3_pcie30: vcc3v3-pcie30 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_pcie30"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ enable-active-high; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_poweren_gpio>; ++ vin-supply = <&vcc12v_dcin>; ++ //gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; ++ //startup-delay-us = <5000>; ++ }; ++ ++ vcc5v0_host: vcc5v0-host { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_host"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ enable-active-high; ++ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; ++ vin-supply = <&vcc5v0_usb>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vcc5v0_host_en>; ++ }; ++ ++ vcc_3v3_sd_s0: vcc-3v3-sd-s0-regulator { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sd_s0_pwr>; ++ regulator-name = "vcc_3v3_sd_s0"; ++ enable-active-high; ++ }; ++ ++ wireless_bluetooth: wireless-bluetooth { ++ compatible = "bluetooth-platdata"; ++ clocks = <&hym8563>; ++ clock-names = "ext_clock"; ++ uart_rts_gpios = <&gpio1 RK_PD6 GPIO_ACTIVE_LOW>; ++ pinctrl-names = "default", "rts_gpio"; ++ pinctrl-0 = <&uart1m1_rtsn>; ++ pinctrl-1 = <&uart1_rts_gpio>; ++ BT,reset_gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>; ++ BT,wake_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; ++ BT,wake_host_irq = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ wireless_wlan: wireless-wlan { ++ compatible = "wlan-platdata"; ++ wifi_chip_type = "ap6275p"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&wifi_host_wake_irq>; ++ WIFI,host_wake_irq = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; ++ WIFI,poweren_gpio = <&gpio0 RK_PB2 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ ++ /* If hdmirx node is disabled, delete the reserved-memory node here. */ ++ reserved-memory { ++ #address-cells = <2>; ++ #size-cells = <2>; ++ ranges; ++ ++ /* Reserve 256MB memory for hdmirx-controller@fdee0000 */ ++ cma { ++ compatible = "shared-dma-pool"; ++ reusable; ++ reg = <0x00 0x10000000 0x00 0x8000000>; ++ size = <0x00 0x800000>; ++ linux,cma-default; ++ }; ++ }; ++ ++ rt5651_sound: rt5651-sound { ++ status = "okay"; ++ compatible = "simple-audio-card"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hp_det>; ++ simple-audio-card,hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; ++ simple-audio-card,format = "i2s"; ++ simple-audio-card,name = "realtek,rt5651-codec"; ++ simple-audio-card,mclk-fs = <256>; ++ simple-audio-card,widgets = ++ "Headphone", "Headphone Jack", ++ "Speaker", "Speaker"; ++ simple-audio-card,routing = ++ "Speaker", "HPOL MIX", ++ "Speaker", "HPOR MIX", ++ "Headphone Jack", "HPOL MIX", ++ "Headphone Jack", "HPOR MIX"; ++ simple-audio-card,cpu { ++ sound-dai = <&i2s0_8ch>; ++ }; ++ simple-audio-card,codec { ++ sound-dai = <&rt5651>; ++ }; ++ }; ++ ++ fan: pwm-fan { ++ status = "okay"; ++ compatible = "pwm-fan"; ++ #cooling-cells = <2>; ++ pwms = <&pwm15 0 1000000 0>; ++ duty_ns = <500000>; ++ cooling-levels = <0 50 100 150 220 255>; ++ rockchip,temp-trips = < ++ 40000 1 ++ 45000 2 ++ 50000 3 ++ 55000 4 ++ 60000 5 ++ >; ++ }; ++ ++}; ++ ++&av1d { ++ status = "okay"; ++}; ++ ++&av1d_mmu { ++ status = "okay"; ++}; ++ ++/* sata pm */ ++&combphy0_ps { ++ status = "okay"; ++}; ++ ++&combphy1_ps { ++ status = "okay"; ++}; ++ ++// USB3.1/SATA/PCIe Combo PHY ++&combphy2_psu { ++ status = "okay"; ++}; ++ ++&cpu_l0 { ++ cpu-supply = <&vdd_cpu_lit_s0>; ++ mem-supply = <&vdd_cpu_lit_mem_s0>; ++}; ++ ++&cpu_b0 { ++ cpu-supply = <&vdd_cpu_big0_s0>; ++ mem-supply = <&vdd_cpu_big0_mem_s0>; ++}; ++ ++&cpu_b2 { ++ cpu-supply = <&vdd_cpu_big1_s0>; ++ mem-supply = <&vdd_cpu_big1_mem_s0>; ++}; ++ ++#if kerneL_legacy_5_10 ++&display_subsystem { ++ clocks = <&hdptxphy_hdmi_clk0>; ++ clock-names = "hdmi0_phy_pll"; ++}; ++#else ++&display_subsystem { ++ clocks = <&hdptxphy_hdmi0>; ++ clock-names = "hdmi0_phy_pll"; ++}; ++#endif ++ ++&hdptxphy_hdmi0 { ++ status = "okay"; ++}; ++ ++&gmac0 { ++ /* Use rgmii-rxid mode to disable rx delay inside Soc */ ++ phy-mode = "rgmii-rxid"; ++ clock_in_out = "output"; ++ snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x45>; ++ //rx_delay = <0x4a>; ++ status = "okay"; ++ ++ phy-handle = <&rgmii_phy0>; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x1>; ++ }; ++}; ++ ++&gmac0_mtl_rx_setup { ++ snps,rx-queues-to-use = <2>; ++ queue1 {}; ++}; ++ ++&gmac0_mtl_tx_setup { ++ snps,tx-queues-to-use = <2>; ++ queue1 {}; ++}; ++ ++&gpu { ++ mali-supply = <&vdd_gpu_s0>; ++ mem-supply = <&vdd_gpu_mem_s0>; ++ status = "okay"; ++}; ++ ++&hdmi0 { ++ enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&hdmi0_in_vp0 { ++ status = "okay"; ++}; ++ ++&route_hdmi0{ ++ status = "okay"; ++}; ++ ++&i2c0 { ++ pinctrl-0 = <&i2c0m2_xfer>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ status = "okay"; ++ ++ vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ //regulator-name = "vdd_cpu_big0_s1"; ++ regulator-name = "vdd_cpu_big0_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { ++ compatible = "rockchip,rk8603"; ++ reg = <0x43>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_cpu_big1_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <1050000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c1m2_xfer>; ++ ++ vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { ++ compatible = "rockchip,rk8602"; ++ reg = <0x42>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "rk860x-reg"; ++ regulator-name = "vdd_npu_s0"; ++ regulator-min-microvolt = <550000>; ++ regulator-max-microvolt = <950000>; ++ regulator-ramp-delay = <2300>; ++ rockchip,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ regulator-off-in-suspend; ++ }; ++ }; ++}; ++ ++&i2c4 { ++ pinctrl-0 = <&i2c4m1_xfer>; ++ status = "disabled"; ++}; ++ ++&i2c6 { ++ status = "okay"; ++ //clock-frequency = <400000>;// For others Display Port Screen ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2c6m0_xfer>; ++ ++ hym8563: hym8563@51 { ++ compatible = "haoyu,hym8563"; ++ reg = <0x51>; ++ #clock-cells = <0>; ++ clock-frequency = <32768>; ++ clock-output-names = "hym8563"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&hym8563_int>; ++ interrupt-parent = <&gpio0>; ++ interrupts = ; ++ wakeup-source; ++ status = "okay"; ++ }; ++ ++}; ++ ++&i2c7 { ++ status = "okay"; ++ ++ rt5651: rt5651@1a { ++ status = "okay"; ++ #sound-dai-cells = <0>; ++ compatible = "rockchip,rt5651"; ++ reg = <0x1a>; ++ clock-names = "mclk"; ++ clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>; ++ assigned-clock-rates = <1050000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&i2s0_mclk>; ++ }; ++}; ++ ++&i2s0_8ch { ++ status = "okay"; ++ pinctrl-0 = <&i2s0_lrck ++ &i2s0_sclk ++ &i2s0_sdi0 ++ &i2s0_sdo0>; ++}; ++ ++&iep { ++ status = "okay"; ++}; ++ ++&iep_mmu { ++ status = "okay"; ++}; ++ ++&jpegd { ++ status = "okay"; ++}; ++ ++&jpegd_mmu { ++ status = "okay"; ++}; ++ ++&jpege_ccu { ++ status = "okay"; ++}; ++ ++&jpege0 { ++ status = "okay"; ++}; ++ ++&jpege0_mmu { ++ status = "okay"; ++}; ++ ++&jpege1 { ++ status = "okay"; ++}; ++ ++&jpege1_mmu { ++ status = "okay"; ++}; ++ ++&jpege2 { ++ status = "okay"; ++}; ++ ++&jpege2_mmu { ++ status = "okay"; ++}; ++ ++&jpege3 { ++ status = "okay"; ++}; ++ ++&jpege3_mmu { ++ status = "okay"; ++}; ++ ++&mpp_srv { ++ status = "okay"; ++}; ++ ++&pcie2x1l0 { ++ reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; ++ rockchip,skip-scan-in-resume; ++ status = "okay"; ++ rockchip,perst-inactive-ms = <500>; ++ vpcie3v3-supply = <&vcc3v3_pcie30>; ++}; ++ ++&pcie30phy { ++ status = "okay"; ++ rockchip,pcie30-phymode = ; ++}; ++ ++&pinctrl { ++ ++ headphone { ++ hp_det: hp-det { ++ rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ hym8563 { ++ hym8563_int: hym8563-int { ++ rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ ++ sdio-pwrseq { ++ wifi_enable_h: wifi-enable-h { ++ rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ sdmmc { ++ sd_s0_pwr: sd-s0-pwr { ++ rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++ ++ usb { ++ vcc5v0_host_en: vcc5v0-host-en { ++ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ ++ wireless-bluetooth { ++ uart1_rts_gpio: uart1-rts-gpio { ++ rockchip,pins = <1 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++ ++ wireless-wlan { ++ wifi_poweren_gpio: wifi-poweren-gpio { ++ rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ wifi_host_wake_irq: wifi-host-wake-irq { ++ rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ }; ++}; ++ ++&pwm15 { ++ //pinctrl-names = "active"; ++ pinctrl-0 = <&pwm15m2_pins>; ++ status = "okay"; ++}; ++ ++&rga3_core0 { ++ status = "okay"; ++}; ++ ++&rga3_0_mmu { ++ status = "okay"; ++}; ++ ++&rga3_core1 { ++ status = "okay"; ++}; ++ ++&rga3_1_mmu { ++ status = "okay"; ++}; ++ ++&rga2 { ++ status = "okay"; ++}; ++ ++&rknpu { ++ rknpu-supply = <&vdd_npu_s0>; ++ mem-supply = <&vdd_npu_mem_s0>; ++ status = "okay"; ++}; ++ ++&rknpu_mmu { ++ status = "okay"; ++}; ++ ++&rkvdec_ccu { ++ status = "okay"; ++}; ++ ++&rkvdec0 { ++ status = "okay"; ++}; ++ ++&rkvdec0_mmu { ++ status = "okay"; ++}; ++ ++&rkvdec1 { ++ status = "okay"; ++}; ++ ++&rkvdec1_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc_ccu { ++ status = "okay"; ++}; ++ ++&rkvenc0 { ++ /*evb add */ ++ venc-supply = <&vdd_vdenc_s0>; ++ mem-supply = <&vdd_vdenc_mem_s0>; ++ status = "okay"; ++}; ++ ++&rkvenc0_mmu { ++ status = "okay"; ++}; ++ ++&rkvenc1 { ++ /*evb add */ ++ venc-supply = <&vdd_vdenc_s0>; ++ mem-supply = <&vdd_vdenc_mem_s0>; ++ status = "okay"; ++}; ++ ++&rkvenc1_mmu { ++ status = "okay"; ++}; ++ ++&rockchip_suspend { ++ status = "okay"; ++ rockchip,sleep-debug-en = <1>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc_1v8_s0>; ++}; ++ ++&sdhci { ++ bus-width = <8>; ++ no-sdio; ++ no-sd; ++ non-removable; ++ max-frequency = <200000000>; ++ mmc-hs400-1_8v; ++ mmc-hs400-enhanced-strobe; ++ status = "okay"; ++}; ++ ++&sdmmc { ++ max-frequency = <150000000>; ++ no-sdio; ++ no-mmc; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ sd-uhs-sdr104; ++ vqmmc-supply = <&vccio_sd_s0>; ++ vmmc-supply = <&vcc_3v3_sd_s0>; ++ status = "okay"; ++}; ++ ++&soc_thermal { ++ sustainable-power = <15000>; ++ polling-delay = <1000>; ++ polling-delay-passive = <2000>; ++ ++ trips { ++ trip0: trip-point@0 { ++ temperature = <55000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip1: trip-point@1 { ++ temperature = <60000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip2: trip-point@2 { ++ temperature = <65000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip3: trip-point@3 { ++ temperature = <70000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ trip4: trip-point@4 { ++ temperature = <75000>; ++ hysteresis = <5000>; ++ type = "active"; ++ }; ++ pcritical: trip-point@5 { ++ temperature = <80000>; ++ hysteresis = <1000>; ++ type = "active"; ++ }; ++ }; ++ ++ cooling-maps { ++ map0 { ++ trip = <&trip0>; ++ cooling-device = <&fan 0 1>; ++ contribution = <1024>; ++ }; ++ map1 { ++ trip = <&trip1>; ++ cooling-device = <&fan 1 2>; ++ contribution = <1024>; ++ }; ++ map2 { ++ trip = <&trip2>; ++ cooling-device = <&fan 2 3>; ++ contribution = <1024>; ++ }; ++ map3 { ++ trip = <&trip3>; ++ cooling-device = <&fan 3 4>; ++ contribution = <1024>; ++ }; ++ map4 { ++ trip = <&trip4>; ++ cooling-device = <&fan 4 5>; ++ contribution = <1024>; ++ }; ++ map5 { ++ trip = <&pcritical>; ++ cooling-device = <&fan 5 6>; ++ contribution = <1024>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-0 = <&uart0m2_xfer>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1m1_xfer>, <&uart1m1_ctsn>; ++}; ++ ++&uart3 { ++ status = "okay"; ++}; ++ ++&uart4 { ++ status = "okay"; ++}; ++ ++&uart5 { ++ status = "okay"; ++}; ++ ++&uart7 { ++ status = "okay"; ++}; ++ ++&uart9 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart9m2_xfer>; ++ status = "okay"; ++}; ++ ++&u2phy0_otg { ++ status = "okay"; ++}; ++ ++&u2phy2_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&usbdp_phy0 { ++ status = "okay"; ++ rockchip,dp-lane-mux = <2 3>; ++}; ++ ++&usbdp_phy0_dp { ++ status = "okay"; ++}; ++ ++&usbdp_phy0_u3 { ++ status = "okay"; ++}; ++ ++&usbdp_phy1 { ++ rockchip,dp-lane-mux = <2 3>; ++ status = "okay"; ++}; ++ ++&usbdp_phy1_dp { ++ status = "okay"; ++}; ++ ++&usbdp_phy1_u3 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_0 { ++ status = "okay"; ++ extcon = <&u2phy0>; ++ dr_mode = "host"; ++}; ++ ++&u2phy0 { ++ status = "okay"; ++}; ++ ++&u2phy2 { ++ status = "okay"; ++}; ++ ++&u2phy3_host { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy3 { ++ status = "okay"; ++}; ++ ++&usb_host0_ehci { ++ status = "okay"; ++}; ++ ++&usb_host0_ohci { ++ status = "okay"; ++}; ++ ++&usb_host1_ehci { ++ status = "okay"; ++}; ++ ++&usb_host1_ohci { ++ status = "okay"; ++}; ++ ++/*usb3.1 host2 controller for 5G module*/ ++&usbhost3_0 { ++ status = "okay"; ++}; ++ ++&usbhost_dwc3_0 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbdrd3_0 { ++ status = "okay"; ++}; ++ ++&usbdrd3_1 { ++ status = "okay"; ++}; ++ ++&usbdrd_dwc3_1 { ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&vdd_gpu_s0 { ++ regulator-always-on; ++}; ++ ++&vdd_log_s0 { ++ /delete-property/ regulator-off-in-suspend; ++ regulator-on-in-suspend; ++ regulator-min-microvolt = <750000>; ++}; ++ ++&vdd_ddr_s0 { ++ regulator-min-microvolt = <850000>; ++ regulator-max-microvolt = <850000>; ++}; ++ ++&vcc_2v0_pldo_s3 { ++ regulator-init-microvolt = <2000000>; ++}; ++ ++&vcc_3v3_s3 { ++ regulator-init-microvolt = <3300000>; ++}; ++ ++&vcc_1v8_s3 { ++ regulator-init-microvolt = <1800000>; ++}; ++ ++ ++/* vp0 & vp1 splice for 8K output */ ++&vp0 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; ++ rockchip,primary-plane = ; ++ assigned-clocks = <&cru ACLK_VOP>; ++ assigned-clock-rates = <800000000>; ++}; ++ ++&vp1 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp2 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; ++ rockchip,primary-plane = ; ++}; ++ ++&vp3 { ++ rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; ++ rockchip,primary-plane = ; ++}; ++ ++ ++&tsadc { ++ status = "okay"; ++}; ++ ++&vepu { ++ status = "okay"; ++}; ++ ++&vdpu { ++ status = "okay"; ++}; ++ ++&vdpu_mmu { ++ status = "okay"; ++}; ++ ++&vop { ++ status = "okay"; ++ vop-supply = <&vdd_log_s0>; ++}; ++ ++&vop_mmu { ++ status = "okay"; ++}; ++ ++&wdt { ++ status = "okay"; ++}; ++ ++&u2phy1_otg { ++ phy-supply = <&vcc5v0_host>; ++ status = "okay"; ++}; ++ ++&u2phy1 { ++ status = "okay"; ++}; ++ ++&sata0 { ++ status = "okay"; ++}; ++ ++/* ++&avcc_1v8_s0{ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++}; ++ ++&vcc_1v8_s0{ ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++}; ++*/ +\ No newline at end of file +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/kernel/rockchip-6.1-yjh-jm10/kernel-rk35xx-vendor-002-fix-jm10-dsa-88e6390x-and-typec-usb-dts.patch b/userpatches/kernel/rockchip-6.1-yjh-jm10/kernel-rk35xx-vendor-002-fix-jm10-dsa-88e6390x-and-typec-usb-dts.patch new file mode 100644 index 000000000000..3909d7395e4d --- /dev/null +++ b/userpatches/kernel/rockchip-6.1-yjh-jm10/kernel-rk35xx-vendor-002-fix-jm10-dsa-88e6390x-and-typec-usb-dts.patch @@ -0,0 +1,271 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Fri, 27 Dec 2024 21:46:03 +0800 +Subject: Patching kernel rk35xx files + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts + +Signed-off-by: John Doe +--- + arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts | 169 +++++++++- + 1 file changed, 160 insertions(+), 9 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +index b9f8ed9892a8..03f85444404e 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3588-yjh-jm10.dts +@@ -394,36 +394,163 @@ &gmac0_rgmii_clk + + tx_delay = <0x45>; + //rx_delay = <0x4a>; + status = "okay"; + +- phy-handle = <&rgmii_phy0>; ++ //phy-handle = <&rgmii_phy0>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + + }; + ++ ++/* + &mdio0 { + rgmii_phy0: phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x1>; + }; + }; ++*/ + +-&gmac0_mtl_rx_setup { +- snps,rx-queues-to-use = <2>; +- queue1 {}; +-}; + +-&gmac0_mtl_tx_setup { +- snps,tx-queues-to-use = <2>; +- queue1 {}; ++&mdio0 { ++ switch0: switch@0 { ++ compatible = "marvell,mv88e6190"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ reg = <0x1e>; ++ dsa,member = <0 0>; ++ status = "okay"; ++ ++ ports { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ port@0 { ++ reg = <0x0>; ++ label = "cpu"; ++ ethernet = <&gmac0>; ++ phy-handle = <&switch0phy0>; ++ phy-mode = "rgmii"; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ ++ }; ++ ++ port@1 { ++ reg = <0x1>; ++ label = "eth1"; ++ phy-handle = <&switch0phy1>; ++ }; ++ ++ port@2 { ++ reg = <0x2>; ++ label = "eth2"; ++ phy-handle = <&switch0phy2>; ++ }; ++ ++ port@3 { ++ reg = <0x3>; ++ label = "eth3"; ++ phy-handle = <&switch0phy3>; ++ }; ++ ++ port@4 { ++ reg = <0x4>; ++ label = "eth4"; ++ phy-handle = <&switch0phy4>; ++ }; ++ ++ port@5 { ++ reg = <0x5>; ++ label = "eth5"; ++ phy-handle = <&switch0phy5>; ++ }; ++ ++ port@6 { ++ reg = <0x6>; ++ label = "eth6"; ++ phy-handle = <&switch0phy6>; ++ }; ++ ++ ++ port@7 { ++ reg = <0x7>; ++ label = "eth7"; ++ phy-handle = <&switch0phy7>; ++ }; ++ ++ port@8 { ++ reg = <0x8>; ++ label = "eth8"; ++ phy-handle = <&switch0phy8>; ++ }; ++ }; ++ ++ mdio { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ // The MV88E6390 does not report the phy type on the MDIO bus properly, so we force it to the correct value here using the compatible property. ++ switch0phy0: ethernet-phy@0 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <0>; ++ broken-turn-around; ++ }; ++ switch0phy1: ethernet-phy@1 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <1>; ++ broken-turn-around; ++ }; ++ switch0phy2: ethernet-phy@2 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <2>; ++ broken-turn-around; ++ }; ++ switch0phy3: ethernet-phy@3 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <3>; ++ broken-turn-around; ++ }; ++ switch0phy4: ethernet-phy@4 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <4>; ++ broken-turn-around; ++ }; ++ switch0phy5: ethernet-phy@5 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <5>; ++ broken-turn-around; ++ }; ++ switch0phy6: ethernet-phy@6 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <6>; ++ broken-turn-around; ++ }; ++ switch0phy7: ethernet-phy@7 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <7>; ++ broken-turn-around; ++ }; ++ switch0phy8: ethernet-phy@8 { ++ compatible = "ethernet-phy-id0141.0f90"; ++ reg = <8>; ++ broken-turn-around; ++ }; ++ }; ++ ++ }; + }; + ++ + &gpu { + mali-supply = <&vdd_gpu_s0>; + mem-supply = <&vdd_gpu_mem_s0>; + status = "okay"; + }; +@@ -620,10 +747,11 @@ &pcie2x1l0 { + status = "okay"; + rockchip,perst-inactive-ms = <500>; + vpcie3v3-supply = <&vcc3v3_pcie30>; + }; + ++/* pcie3.0 x 4 slot */ + &pcie30phy { + status = "okay"; + rockchip,pcie30-phymode = ; + }; + +@@ -899,10 +1027,11 @@ &uart9 { + pinctrl-0 = <&uart9m2_xfer>; + status = "okay"; + }; + + &u2phy0_otg { ++ //rockchip,typec-vbus-det; + status = "okay"; + }; + + &u2phy2_host { + phy-supply = <&vcc5v0_host>; +@@ -910,10 +1039,30 @@ &u2phy2_host { + }; + + &usbdp_phy0 { + status = "okay"; + rockchip,dp-lane-mux = <2 3>; ++/* ++ orientation-switch; ++ svid = <0xff01>; ++ sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; ++ sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; ++ ++ port { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ usbdp_phy0_orientation_switch: endpoint@0 { ++ reg = <0>; ++ //remote-endpoint = <&usbc0_orien_sw>; ++ }; ++ ++ usbdp_phy0_dp_altmode_mux: endpoint@1 { ++ reg = <1>; ++ //remote-endpoint = <&dp_altmode_mux>; ++ }; ++ }; ++*/ + }; + + &usbdp_phy0_dp { + status = "okay"; + }; +@@ -936,11 +1085,11 @@ &usbdp_phy1_u3 { + }; + + &usbdrd_dwc3_0 { + status = "okay"; + extcon = <&u2phy0>; +- dr_mode = "host"; ++ dr_mode = "otg"; + }; + + &u2phy0 { + status = "okay"; + }; +@@ -1085,10 +1234,12 @@ &u2phy1_otg { + + &u2phy1 { + status = "okay"; + }; + ++ ++ + &sata0 { + status = "okay"; + }; + + /* +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/u-boot/v2017.09-rk3588-dr4/u-boot-rk35xx-legacy-dr4.patch b/userpatches/u-boot/v2017.09-rk3588-dr4/u-boot-rk35xx-legacy-dr4.patch new file mode 100644 index 000000000000..3cc41210b59d --- /dev/null +++ b/userpatches/u-boot/v2017.09-rk3588-dr4/u-boot-rk35xx-legacy-dr4.patch @@ -0,0 +1,867 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sun, 4 Aug 2024 21:13:02 +0800 +Subject: Patching u-boot rk35xx files arch/arm/dts/dr4-rk3566.dts + arch/arm/dts/rk3568-u-boot.dtsi configs/dr4-rk3566_defconfig + +Signed-off-by: John Doe +--- + arch/arm/dts/dr4-rk3566.dts | 520 ++++++++++ + arch/arm/dts/rk3568-u-boot.dtsi | 18 +- + configs/dr4-rk3566_defconfig | 237 +++++ + 3 files changed, 766 insertions(+), 9 deletions(-) + +diff --git a/arch/arm/dts/dr4-rk3566.dts b/arch/arm/dts/dr4-rk3566.dts +new file mode 100644 +index 00000000000..0198314b2eb +--- /dev/null ++++ b/arch/arm/dts/dr4-rk3566.dts +@@ -0,0 +1,520 @@ ++/* ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * (C) Copyright 2020 Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3568.dtsi" ++#include "rk3568-u-boot.dtsi" ++#include ++ ++/ { ++ model = "DR4 3566"; ++ compatible = "rockchip,DR4", "rockchip,rk3568"; ++ ++ dc_12v: dc-12v { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ u-boot,dm-spl; ++ status = "okay"; ++ ++ volumeup-key { ++ u-boot,dm-spl; ++ linux,code = ; ++ label = "volume up"; ++ press-threshold-microvolt = <9>; ++ }; ++ }; ++ ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x3c>; ++ rx_delay = <0x2f>; ++ ++ phy-handle = <&rgmii_phy0>; ++ status = "disabled"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x26>; ++ ++ phy-handle = <&rgmii_phy1>; ++ status = "okay"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&gpu { ++ u-boot,dm-pre-reloc; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_3v3>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++ clock-frequency = <100000>; ++ ++ vdd_cpu: tcs4525@1c { ++ u-boot,dm-pre-reloc; ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1390000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ u-boot,dm-pre-reloc; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ u-boot,dm-pre-reloc; ++ }; ++ }; ++ ++ regulators { ++ u-boot,dm-pre-reloc; ++ vdd_logic: DCDC_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ u-boot,dm-spl; ++ pmic { ++ u-boot,dm-pre-reloc; ++ pmic_int: pmic_int { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pipegrf { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&pipe_phy_grf2 { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++ +diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi +index 814e1fbda7f..38eb2920edd 100644 +--- a/arch/arm/dts/rk3568-u-boot.dtsi ++++ b/arch/arm/dts/rk3568-u-boot.dtsi +@@ -4,20 +4,20 @@ + * SPDX-License-Identifier: GPL-2.0+ + */ + + / { + aliases { +- ethernet0 = &gmac0; +- ethernet1 = &gmac1; +- mmc0 = &sdmmc0; +- mmc1 = &sdhci; ++ ethernet0 = &gmac1; ++ ethernet1 = &gmac0; ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + }; + + chosen { + stdout-path = &uart2; +- u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor; ++ u-boot,spl-boot-order = &sdhci, &sdmmc0, &nandc0, &spi_nand, &spi_nor; + }; + }; + + &psci { + u-boot,dm-pre-reloc; +@@ -133,11 +133,11 @@ + + &saradc { + u-boot,dm-spl; + status = "okay"; + }; +- ++/* + &sdmmc0 { + u-boot,dm-spl; + status = "okay"; + }; + +@@ -158,11 +158,11 @@ + }; + + &sdmmc0_det { + u-boot,dm-spl; + }; +- ++*/ + &sdmmc1 { + u-boot,dm-spl; + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +@@ -232,11 +232,11 @@ + &gmac1 { + u-boot,dm-pre-reloc; + phy-mode = "rgmii"; + clock_in_out = "output"; + +- snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; ++ snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; +@@ -252,11 +252,11 @@ + + tx_delay = <0x4f>; + rx_delay = <0x26>; + + phy-handle = <&rgmii_phy1>; +- status = "disabled"; ++ status = "okay"; + }; + + &gmac0_stmmac_axi_setup { + u-boot,dm-pre-reloc; + }; +diff --git a/configs/dr4-rk3566_defconfig b/configs/dr4-rk3566_defconfig +new file mode 100644 +index 00000000000..b92b8b1b8b1 +--- /dev/null ++++ b/configs/dr4-rk3566_defconfig +@@ -0,0 +1,237 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_DM_DMC=y ++CONFIG_ROCKCHIP_DMC_FSP=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_ROCKCHIP_NEW_IDB=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3568=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_NAND_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="dr4-rk3566" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_ANDROID_AVB=y ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y ++CONFIG_SPL_SHA256_SUPPORT=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_MTD_WRITE=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_SPL_AB=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_FASTBOOT_BUF_SIZE=0x04000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_BOOT_ROCKCHIP=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++# CONFIG_CMD_CHARGE_DISPLAY is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names assigned-clocks assigned-clock-rates assigned-clock-parents" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_SCMI=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_SCMI_FIRMWARE=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEY=y ++CONFIG_RK8XX_PWRKEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_NAND=y ++CONFIG_NAND_ROCKCHIP_V9=y ++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y ++CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000 ++CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000 ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_NANENG_EDP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_FUEL_GAUGE=y ++CONFIG_POWER_FG_RK817=y ++CONFIG_IO_DOMAIN=y ++CONFIG_ROCKCHIP_IO_DOMAIN=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_FAN53555=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_CHARGE_DISPLAY=y ++CONFIG_CHARGE_ANIMATION=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RAMDISK=y ++CONFIG_RAMDISK_RO=y ++CONFIG_ROCKCHIP_SDRAM_COMMON=y ++CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI=y ++CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y ++CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y ++CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y ++CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_DRM_ROCKCHIP_LVDS=y ++CONFIG_DRM_ROCKCHIP_RGB=y ++CONFIG_ROCKCHIP_CUBIC_LUT_SIZE=9 ++CONFIG_LCD=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_SHA512=y ++CONFIG_LZ4=y ++CONFIG_LZMA=y ++CONFIG_SPL_GZIP=y ++CONFIG_ERRNO_STR=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++CONFIG_OPTEE_CLIENT=y ++CONFIG_OPTEE_V2=y ++CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y ++CONFIG_LOADER_INI="RK3566MINIALL.ini" ++CONFIG_CMD_PCI=y ++CONFIG_NVME=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y ++CONFIG_DM_REGULATOR_FIXED=y ++#CONFIG_ROCKCHIP_BOOTDEV="nvme 0" ++CONFIG_SPL_FIT_IMAGE_KB=2560 ++CONFIG_CMD_SF=y ++CONFIG_MTD_BLK_U_BOOT_OFFS=0x400 ++CONFIG_ROCKCHIP_EMMC_IOMUX=y +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/u-boot/v2017.09-rk3588-jp-tvbox/u-boot-rk35xx-legacy.patch b/userpatches/u-boot/v2017.09-rk3588-jp-tvbox/u-boot-rk35xx-legacy.patch new file mode 100644 index 000000000000..11632973b0bc --- /dev/null +++ b/userpatches/u-boot/v2017.09-rk3588-jp-tvbox/u-boot-rk35xx-legacy.patch @@ -0,0 +1,867 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Sat, 24 Feb 2024 11:38:24 +0800 +Subject: Patching u-boot rk35xx files arch/arm/dts/jp-tvbox-3566.dts + arch/arm/dts/rk3568-u-boot.dtsi configs/jp-tvbox-3566_defconfig + +Signed-off-by: John Doe +--- + arch/arm/dts/jp-tvbox-3566.dts | 520 ++++++++++ + arch/arm/dts/rk3568-u-boot.dtsi | 18 +- + configs/jp-tvbox-3566_defconfig | 237 +++++ + 3 files changed, 766 insertions(+), 9 deletions(-) + +diff --git a/arch/arm/dts/jp-tvbox-3566.dts b/arch/arm/dts/jp-tvbox-3566.dts +new file mode 100644 +index 0000000000..4ffdd6e072 +--- /dev/null ++++ b/arch/arm/dts/jp-tvbox-3566.dts +@@ -0,0 +1,520 @@ ++/* ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * (C) Copyright 2020 Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3568.dtsi" ++#include "rk3568-u-boot.dtsi" ++#include ++ ++/ { ++ model = "JP TVbox 3566"; ++ compatible = "rockchip,JP-TVbox", "rockchip,rk3568"; ++ ++ dc_12v: dc-12v { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ u-boot,dm-spl; ++ status = "okay"; ++ ++ volumeup-key { ++ u-boot,dm-spl; ++ linux,code = ; ++ label = "volume up"; ++ press-threshold-microvolt = <9>; ++ }; ++ }; ++ ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x3c>; ++ rx_delay = <0x2f>; ++ ++ phy-handle = <&rgmii_phy0>; ++ status = "disabled"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x26>; ++ ++ phy-handle = <&rgmii_phy1>; ++ status = "disabled"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&gpu { ++ u-boot,dm-pre-reloc; ++ mali-supply = <&vdd_gpu>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc3v3_pmu>; ++ pmuio2-supply = <&vcc3v3_pmu>; ++ vccio1-supply = <&vccio_acodec>; ++ vccio3-supply = <&vccio_sd>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++ clock-frequency = <100000>; ++ ++ vdd_cpu: tcs4525@1c { ++ u-boot,dm-pre-reloc; ++ compatible = "tcs,tcs452x"; ++ reg = <0x1c>; ++ vin-supply = <&vcc5v0_sys>; ++ regulator-compatible = "fan53555-reg"; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <712500>; ++ regulator-max-microvolt = <1390000>; ++ regulator-ramp-delay = <2300>; ++ fcs,suspend-voltage-selector = <1>; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ rk809: pmic@20 { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++ compatible = "rockchip,rk809"; ++ reg = <0x20>; ++ interrupt-parent = <&gpio0>; ++ interrupts = <3 IRQ_TYPE_LEVEL_LOW>; ++ ++ pinctrl-names = "default", "pmic-sleep", ++ "pmic-power-off", "pmic-reset"; ++ pinctrl-0 = <&pmic_int>; ++ pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; ++ pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; ++ pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; ++ ++ rockchip,system-power-controller; ++ wakeup-source; ++ #clock-cells = <1>; ++ clock-output-names = "rk808-clkout1", "rk808-clkout2"; ++ //fb-inner-reg-idxs = <2>; ++ /* 1: rst regs (default in codes), 0: rst the pmic */ ++ pmic-reset-func = <0>; ++ ++ vcc1-supply = <&vcc3v3_sys>; ++ vcc2-supply = <&vcc3v3_sys>; ++ vcc3-supply = <&vcc3v3_sys>; ++ vcc4-supply = <&vcc3v3_sys>; ++ vcc5-supply = <&vcc3v3_sys>; ++ vcc6-supply = <&vcc3v3_sys>; ++ vcc7-supply = <&vcc3v3_sys>; ++ vcc8-supply = <&vcc3v3_sys>; ++ vcc9-supply = <&vcc3v3_sys>; ++ ++ pwrkey { ++ status = "okay"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ pinctrl_rk8xx: pinctrl_rk8xx { ++ u-boot,dm-pre-reloc; ++ gpio-controller; ++ #gpio-cells = <2>; ++ ++ rk817_slppin_null: rk817_slppin_null { ++ pins = "gpio_slp"; ++ function = "pin_fun0"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_slp: rk817_slppin_slp { ++ pins = "gpio_slp"; ++ function = "pin_fun1"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_pwrdn: rk817_slppin_pwrdn { ++ pins = "gpio_slp"; ++ function = "pin_fun2"; ++ u-boot,dm-pre-reloc; ++ }; ++ ++ rk817_slppin_rst: rk817_slppin_rst { ++ pins = "gpio_slp"; ++ function = "pin_fun3"; ++ u-boot,dm-pre-reloc; ++ }; ++ }; ++ ++ regulators { ++ u-boot,dm-pre-reloc; ++ vdd_logic: DCDC_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_logic"; ++ regulator-state-mem { ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_gpu: DCDC_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_gpu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vcc_ddr: DCDC_REG3 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vcc_ddr"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdd_npu: DCDC_REG4 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1350000>; ++ regulator-init-microvolt = <900000>; ++ regulator-ramp-delay = <6001>; ++ regulator-initial-mode = <0x2>; ++ regulator-name = "vdd_npu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_image: LDO_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_image"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda_0v9: LDO_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda_0v9"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vdda0v9_pmu: LDO_REG3 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <900000>; ++ regulator-max-microvolt = <900000>; ++ regulator-name = "vdda0v9_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <900000>; ++ }; ++ }; ++ ++ vccio_acodec: LDO_REG4 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_acodec"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vccio_sd: LDO_REG5 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vccio_sd"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_pmu: LDO_REG6 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <3300000>; ++ }; ++ }; ++ ++ vcca_1v8: LDO_REG7 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca_1v8"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcca1v8_pmu: LDO_REG8 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_pmu"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-on-in-suspend; ++ regulator-suspend-microvolt = <1800000>; ++ }; ++ }; ++ ++ vcca1v8_image: LDO_REG9 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcca1v8_image"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_1v8: DCDC_REG5 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc_1v8"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc_3v3: SWITCH_REG1 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc_3v3"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ ++ vcc3v3_sd: SWITCH_REG2 { ++ u-boot,dm-pre-reloc; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-name = "vcc3v3_sd"; ++ regulator-state-mem { ++ u-boot,dm-pre-reloc; ++ regulator-off-in-suspend; ++ }; ++ }; ++ }; ++ }; ++}; ++ ++&pinctrl { ++ u-boot,dm-spl; ++ pmic { ++ u-boot,dm-pre-reloc; ++ pmic_int: pmic_int { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; ++ }; ++ ++ soc_slppin_gpio: soc_slppin_gpio { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; ++ }; ++ ++ soc_slppin_slp: soc_slppin_slp { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_1 &pcfg_pull_none>; ++ }; ++ ++ soc_slppin_rst: soc_slppin_rst { ++ u-boot,dm-pre-reloc; ++ rockchip,pins = ++ <0 RK_PA2 RK_FUNC_2 &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pipegrf { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&pipe_phy_grf2 { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&combphy2_psq { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++ +diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi +index 814e1fbda7..38eb2920ed 100644 +--- a/arch/arm/dts/rk3568-u-boot.dtsi ++++ b/arch/arm/dts/rk3568-u-boot.dtsi +@@ -4,20 +4,20 @@ + * SPDX-License-Identifier: GPL-2.0+ + */ + + / { + aliases { +- ethernet0 = &gmac0; +- ethernet1 = &gmac1; +- mmc0 = &sdmmc0; +- mmc1 = &sdhci; ++ ethernet0 = &gmac1; ++ ethernet1 = &gmac0; ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + }; + + chosen { + stdout-path = &uart2; +- u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor; ++ u-boot,spl-boot-order = &sdhci, &sdmmc0, &nandc0, &spi_nand, &spi_nor; + }; + }; + + &psci { + u-boot,dm-pre-reloc; +@@ -133,11 +133,11 @@ + + &saradc { + u-boot,dm-spl; + status = "okay"; + }; +- ++/* + &sdmmc0 { + u-boot,dm-spl; + status = "okay"; + }; + +@@ -158,11 +158,11 @@ + }; + + &sdmmc0_det { + u-boot,dm-spl; + }; +- ++*/ + &sdmmc1 { + u-boot,dm-spl; + /delete-property/ pinctrl-names; + /delete-property/ pinctrl-0; + status = "okay"; +@@ -232,11 +232,11 @@ + &gmac1 { + u-boot,dm-pre-reloc; + phy-mode = "rgmii"; + clock_in_out = "output"; + +- snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; ++ snps,reset-gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; +@@ -252,11 +252,11 @@ + + tx_delay = <0x4f>; + rx_delay = <0x26>; + + phy-handle = <&rgmii_phy1>; +- status = "disabled"; ++ status = "okay"; + }; + + &gmac0_stmmac_axi_setup { + u-boot,dm-pre-reloc; + }; +diff --git a/configs/jp-tvbox-3566_defconfig b/configs/jp-tvbox-3566_defconfig +new file mode 100644 +index 0000000000..7cfd0410b2 +--- /dev/null ++++ b/configs/jp-tvbox-3566_defconfig +@@ -0,0 +1,237 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_DM_DMC=y ++CONFIG_ROCKCHIP_DMC_FSP=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_ROCKCHIP_NEW_IDB=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3568=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_NAND_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="jp-tvbox-3566" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_ANDROID_AVB=y ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y ++CONFIG_SPL_SHA256_SUPPORT=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_MTD_WRITE=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_SPL_AB=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_FASTBOOT_BUF_SIZE=0x04000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_BOOT_ROCKCHIP=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++# CONFIG_CMD_CHARGE_DISPLAY is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names assigned-clocks assigned-clock-rates assigned-clock-parents" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_SCMI=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_SCMI_FIRMWARE=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEY=y ++CONFIG_RK8XX_PWRKEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_NAND=y ++CONFIG_NAND_ROCKCHIP_V9=y ++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y ++CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000 ++CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000 ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_NANENG_EDP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_FUEL_GAUGE=y ++CONFIG_POWER_FG_RK817=y ++CONFIG_IO_DOMAIN=y ++CONFIG_ROCKCHIP_IO_DOMAIN=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_FAN53555=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_CHARGE_DISPLAY=y ++CONFIG_CHARGE_ANIMATION=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RAMDISK=y ++CONFIG_RAMDISK_RO=y ++CONFIG_ROCKCHIP_SDRAM_COMMON=y ++CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI=y ++CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y ++CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y ++CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y ++CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_DRM_ROCKCHIP_LVDS=y ++CONFIG_DRM_ROCKCHIP_RGB=y ++CONFIG_ROCKCHIP_CUBIC_LUT_SIZE=9 ++CONFIG_LCD=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_SHA512=y ++CONFIG_LZ4=y ++CONFIG_LZMA=y ++CONFIG_SPL_GZIP=y ++CONFIG_ERRNO_STR=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++CONFIG_OPTEE_CLIENT=y ++CONFIG_OPTEE_V2=y ++CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y ++CONFIG_LOADER_INI="RK3566MINIALL.ini" ++CONFIG_CMD_PCI=y ++CONFIG_NVME=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y ++CONFIG_DM_REGULATOR_FIXED=y ++#CONFIG_ROCKCHIP_BOOTDEV="nvme 0" ++CONFIG_SPL_FIT_IMAGE_KB=2560 ++CONFIG_CMD_SF=y ++CONFIG_MTD_BLK_U_BOOT_OFFS=0x400 ++CONFIG_ROCKCHIP_EMMC_IOMUX=y +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/u-boot/v2017.09-rk3588-nas-lite/u-boot-rk35xx-legacy-001-add-nas-lite.patch b/userpatches/u-boot/v2017.09-rk3588-nas-lite/u-boot-rk35xx-legacy-001-add-nas-lite.patch new file mode 100644 index 000000000000..340ccafcc0d1 --- /dev/null +++ b/userpatches/u-boot/v2017.09-rk3588-nas-lite/u-boot-rk35xx-legacy-001-add-nas-lite.patch @@ -0,0 +1,508 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Thu, 20 Jun 2024 23:03:26 +0800 +Subject: Patching u-boot rk35xx files arch/arm/dts/rk3568-nas-lite.dts + arch/arm/dts/rk3568-u-boot.dtsi configs/rk3568-nas-lite_defconfig + +Signed-off-by: John Doe +--- + arch/arm/dts/rk3568-nas-lite.dts | 106 +++++ + arch/arm/dts/rk3568-u-boot.dtsi | 37 +- + configs/rk3568-nas-lite_defconfig | 227 ++++++++++ + 3 files changed, 354 insertions(+), 16 deletions(-) + +diff --git a/arch/arm/dts/rk3568-nas-lite.dts b/arch/arm/dts/rk3568-nas-lite.dts +new file mode 100644 +index 00000000000..614736a019f +--- /dev/null ++++ b/arch/arm/dts/rk3568-nas-lite.dts +@@ -0,0 +1,106 @@ ++/* ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * (C) Copyright 2020 Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3568.dtsi" ++#include "rk3568-u-boot.dtsi" ++#include ++ ++/ { ++ model = "Rockchip RK3568 Evaluation Board"; ++ compatible = "rockchip,rk3568-evb", "rockchip,rk3568"; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ u-boot,dm-spl; ++ status = "okay"; ++ ++ volumeup-key { ++ u-boot,dm-spl; ++ linux,code = ; ++ label = "volume up"; ++ press-threshold-microvolt = <9>; ++ }; ++ }; ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x3c>; ++ rx_delay = <0x2f>; ++ ++ phy-handle = <&rgmii_phy0>; ++ status = "disabled"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x26>; ++ ++ phy-handle = <&rgmii_phy1>; ++ status = "disabled"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; +diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi +index 814e1fbda7f..a0678e35db1 100644 +--- a/arch/arm/dts/rk3568-u-boot.dtsi ++++ b/arch/arm/dts/rk3568-u-boot.dtsi +@@ -6,28 +6,37 @@ + + / { + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; +- mmc0 = &sdmmc0; +- mmc1 = &sdhci; ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + }; + + chosen { + stdout-path = &uart2; + u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor; + }; ++ ++ secure-otp@fe3a0000 { ++ compatible = "rockchip,rk3568-secure-otp"; ++ reg = <0x0 0xfe3a0000 0x0 0x4000>; ++ secure_conf = <0xfdd18008>; ++ mask_addr = <0xfe880000>; ++ cru_rst_addr = <0xfdd20470>; ++ u-boot,dm-spl; ++ }; + }; + + &psci { + u-boot,dm-pre-reloc; + status = "okay"; + }; + + &crypto { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + }; + + &uart2 { + clock-frequency = <24000000>; + u-boot,dm-spl; +@@ -35,16 +44,16 @@ + /delete-property/ pinctrl-0; + status = "okay"; + }; + + &grf { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + status = "okay"; + }; + + &pmugrf { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + status = "okay"; + }; + + &usb2phy0_grf { + u-boot,dm-pre-reloc; +@@ -85,16 +94,16 @@ + u-boot,dm-pre-reloc; + status = "okay"; + }; + + &cru { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + status = "okay"; + }; + + &pmucru { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + status = "okay"; + }; + + &rng { + u-boot,dm-pre-reloc; +@@ -130,11 +139,11 @@ + spi-max-frequency = <100000000>; + }; + }; + + &saradc { +- u-boot,dm-spl; ++ u-boot,dm-pre-reloc; + status = "okay"; + }; + + &sdmmc0 { + u-boot,dm-spl; +@@ -192,11 +201,11 @@ + nand-ecc-strength = <16>; + nand-ecc-step-size = <1024>; + }; + }; + +-&gmac0_clkin{ ++&gmac0_clkin { + u-boot,dm-pre-reloc; + }; + + &gmac1_clkin { + u-boot,dm-pre-reloc; +@@ -389,19 +398,19 @@ + &gpio1 { + u-boot,dm-spl; + }; + + &gpio2 { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + }; + + &pcfg_pull_none_drv_level_1 { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + }; + + &pcfg_pull_none_drv_level_2 { +- u-boot,dm-pre-reloc; ++ u-boot,dm-spl; + }; + + + &pcfg_pull_up_drv_level_1 { + u-boot,dm-spl; +@@ -414,14 +423,10 @@ + &pcfg_pull_up { + u-boot,dm-spl; + }; + + &pcfg_pull_none { +- u-boot,dm-pre-reloc; +-}; +- +-&secure_otp { + u-boot,dm-spl; + }; + + &wdt { + u-boot,dm-pre-reloc; +diff --git a/configs/rk3568-nas-lite_defconfig b/configs/rk3568-nas-lite_defconfig +new file mode 100644 +index 00000000000..8c1bc5453e9 +--- /dev/null ++++ b/configs/rk3568-nas-lite_defconfig +@@ -0,0 +1,227 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_EARLY_DISTRO_DTB=y ++CONFIG_ROCKCHIP_EARLY_DISTRO_DTB_PATH="/boot/rk-kernel.dtb" ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_ROCKCHIP_NEW_IDB=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3568=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_NAND_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3568-nas-lite" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_ANDROID_AVB=y ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y ++CONFIG_SPL_SHA256_SUPPORT=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_MTD_WRITE=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_SPL_AB=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_FASTBOOT_BUF_SIZE=0x04000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_BOOT_ROCKCHIP=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++# CONFIG_CMD_CHARGE_DISPLAY is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_SPL_DTB_MINIMUM=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_SCMI=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_SCMI_FIRMWARE=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_DM_PCA953X=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEY=y ++CONFIG_RK8XX_PWRKEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_NAND=y ++CONFIG_NAND_ROCKCHIP_V9=y ++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y ++CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000 ++CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000 ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_NANENG_EDP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_FUEL_GAUGE=y ++CONFIG_POWER_FG_RK817=y ++CONFIG_IO_DOMAIN=y ++CONFIG_ROCKCHIP_IO_DOMAIN=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_FAN53555=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_CHARGE_DISPLAY=y ++CONFIG_CHARGE_ANIMATION=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RAMDISK=y ++CONFIG_RAMDISK_RO=y ++CONFIG_DM_DMC=y ++CONFIG_ROCKCHIP_DMC_FSP=y ++CONFIG_ROCKCHIP_SDRAM_COMMON=y ++CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI=y ++CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y ++CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y ++CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y ++CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_DRM_ROCKCHIP_LVDS=y ++CONFIG_DRM_ROCKCHIP_RGB=y ++CONFIG_ROCKCHIP_CUBIC_LUT_SIZE=9 ++CONFIG_LCD=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_XBC=y ++CONFIG_SHA512=y ++CONFIG_LZ4=y ++CONFIG_LZMA=y ++CONFIG_SPL_GZIP=y ++CONFIG_ERRNO_STR=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++CONFIG_OPTEE_CLIENT=y ++CONFIG_OPTEE_V2=y ++CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/userpatches/u-boot/v2017.09-rk3588/u-boot-rockchip64-edge.patch b/userpatches/u-boot/v2017.09-rk3588/u-boot-rockchip64-edge.patch new file mode 100644 index 000000000000..3d12d0a10556 --- /dev/null +++ b/userpatches/u-boot/v2017.09-rk3588/u-boot-rockchip64-edge.patch @@ -0,0 +1,568 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: John Doe +Date: Mon, 6 May 2024 23:53:12 +0800 +Subject: Patching u-boot rockchip64 files arch/arm/dts/rk3566-oec-box-wxy4.dts + arch/arm/dts/rk3568-u-boot.dtsi configs/rk3566-oec-box-wxy4_defconfig + +Signed-off-by: John Doe +--- + arch/arm/dts/rk3566-oec-box-wxy4.dts | 277 ++++++++++ + arch/arm/dts/rk3568-u-boot.dtsi | 6 +- + configs/rk3566-oec-box-wxy4_defconfig | 237 ++++++++ + 3 files changed, 517 insertions(+), 3 deletions(-) + +diff --git a/arch/arm/dts/rk3566-oec-box-wxy4.dts b/arch/arm/dts/rk3566-oec-box-wxy4.dts +new file mode 100644 +index 00000000000..b4f88b617dc +--- /dev/null ++++ b/arch/arm/dts/rk3566-oec-box-wxy4.dts +@@ -0,0 +1,277 @@ ++/* ++ * SPDX-License-Identifier: GPL-2.0+ ++ * ++ * (C) Copyright 2020 Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include "rk3568.dtsi" ++#include "rk3568-u-boot.dtsi" ++#include ++ ++/ { ++ model = "OEC BOX WXY4"; ++ compatible = "rockchip,rk3566-oec-box-wxy4", "rockchip,rk3568"; ++ ++ aliases { ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc0; ++ mmc2 = &sdmmc1; ++ }; ++ ++ ++ dc_12v: dc-12v { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "dc_12v"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; ++ }; ++ ++ vcc5v0_sys: vcc5v0-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc5v0_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ vcc3v3_sys: vcc3v3-sys { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3_sys"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&dc_12v>; ++ }; ++ ++ adc-keys { ++ compatible = "adc-keys"; ++ io-channels = <&saradc 0>; ++ io-channel-names = "buttons"; ++ keyup-threshold-microvolt = <1800000>; ++ u-boot,dm-spl; ++ status = "okay"; ++ ++ volumeup-key { ++ u-boot,dm-spl; ++ linux,code = ; ++ label = "volume up"; ++ press-threshold-microvolt = <9>; ++ }; ++ }; ++ ++ /* labeled +3.3v For PCIe only in schematic */ ++ ++ vcc_1v8:vcc_1v8 { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vcc_3v3:vcc_3v3 { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_3v3"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vdd_fixed:vdd-fixed { ++ u-boot,dm-pre-reloc; ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_fixed"; ++ regulator-min-microvolt = <950000>; ++ regulator-max-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ vin-supply = <&vcc5v0_sys>; ++ }; ++ ++ vdd_cpu:vdd-cpu { ++ u-boot,dm-pre-reloc; ++ compatible = "pwm-regulator"; ++ pwms = <&pwm0 0 5000 1>; ++ regulator-name = "vdd_cpu"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ pwm-supply = <&vcc5v0_sys>; ++ regulator-ramp-delay = <2300>; ++ status = "okay"; ++ }; ++ ++ vdd_logic:vdd-logic { ++ u-boot,dm-pre-reloc; ++ compatible = "pwm-regulator"; ++ pwms = <&pwm1 0 5000 1>; ++ regulator-name = "vdd_logic"; ++ regulator-min-microvolt = <800000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-init-microvolt = <950000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ pwm-supply = <&vcc5v0_sys>; ++ regulator-ramp-delay = <6001>; ++ status = "okay"; ++ }; ++ ++ ++}; ++ ++&sata2 { ++ status = "okay"; ++}; ++ ++&gmac0 { ++ phy-mode = "rgmii"; ++ clock_in_out = "output"; ++ ++ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; ++ assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac0_miim ++ &gmac0_tx_bus2 ++ &gmac0_rx_bus2 ++ &gmac0_rgmii_clk ++ &gmac0_rgmii_bus>; ++ ++ tx_delay = <0x3c>; ++ rx_delay = <0x2f>; ++ ++ phy-handle = <&rgmii_phy0>; ++ status = "disabled"; ++}; ++ ++&gmac1 { ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ ++ snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ /* Reset time is 20ms, 100ms for rtl8211f */ ++ snps,reset-delays-us = <0 20000 100000>; ++ ++ assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; ++ assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; ++ assigned-clock-rates = <0>, <125000000>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&gmac1m1_miim ++ &gmac1m1_tx_bus2 ++ &gmac1m1_rx_bus2 ++ &gmac1m1_rgmii_clk ++ &gmac1m1_rgmii_bus>; ++ ++ tx_delay = <0x4f>; ++ rx_delay = <0x26>; ++ ++ phy-handle = <&rgmii_phy1>; ++ status = "disabled"; ++}; ++ ++&mdio0 { ++ rgmii_phy0: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&mdio1 { ++ rgmii_phy1: phy@0 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <0x0>; ++ }; ++}; ++ ++&crypto { ++ status = "okay"; ++}; ++ ++&uart2 { ++ status = "okay"; ++}; ++ ++&gpu { ++ u-boot,dm-pre-reloc; ++ mali-supply = <&vdd_fixed>; ++ status = "okay"; ++}; ++ ++&pmu_io_domains { ++ status = "okay"; ++ pmuio1-supply = <&vcc_3v3>; ++ pmuio2-supply = <&vcc_3v3>; ++ vccio1-supply = <&vcc_1v8>; ++ vccio3-supply = <&vcc_3v3>; ++ vccio4-supply = <&vcc_1v8>; ++ vccio5-supply = <&vcc_3v3>; ++ vccio6-supply = <&vcc_1v8>; ++ vccio7-supply = <&vcc_3v3>; ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&gpio4 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&i2c0 { ++ status = "disabled"; ++}; ++ ++&pinctrl { ++ u-boot,dm-spl; ++ ++}; ++ ++&pipegrf { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&pipe_phy_grf2 { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++&combphy1_usq { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++ ++&combphy2_psq { ++ u-boot,dm-pre-reloc; ++ status = "okay"; ++}; ++ ++ +diff --git a/arch/arm/dts/rk3568-u-boot.dtsi b/arch/arm/dts/rk3568-u-boot.dtsi +index 814e1fbda7f..35d1a6fbfc0 100644 +--- a/arch/arm/dts/rk3568-u-boot.dtsi ++++ b/arch/arm/dts/rk3568-u-boot.dtsi +@@ -6,18 +6,18 @@ + + / { + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; +- mmc0 = &sdmmc0; +- mmc1 = &sdhci; ++ mmc0 = &sdhci; ++ mmc1 = &sdmmc0; + mmc2 = &sdmmc1; + }; + + chosen { + stdout-path = &uart2; +- u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor; ++ u-boot,spl-boot-order = &sdhci, &sdmmc0, &nandc0, &spi_nand, &spi_nor; + }; + }; + + &psci { + u-boot,dm-pre-reloc; +diff --git a/configs/rk3566-oec-box-wxy4_defconfig b/configs/rk3566-oec-box-wxy4_defconfig +new file mode 100644 +index 00000000000..559af32e1e8 +--- /dev/null ++++ b/configs/rk3566-oec-box-wxy4_defconfig +@@ -0,0 +1,237 @@ ++CONFIG_ARM=y ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_SYS_MALLOC_F_LEN=0x80000 ++CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-rockchip/make_fit_atf.sh" ++CONFIG_ROCKCHIP_RK3568=y ++CONFIG_ROCKCHIP_FIT_IMAGE=y ++CONFIG_ROCKCHIP_VENDOR_PARTITION=y ++CONFIG_DM_DMC=y ++CONFIG_ROCKCHIP_DMC_FSP=y ++CONFIG_ROCKCHIP_FIT_IMAGE_PACK=y ++CONFIG_ROCKCHIP_NEW_IDB=y ++CONFIG_SPL_SERIAL_SUPPORT=y ++CONFIG_SPL_DRIVERS_MISC_SUPPORT=y ++CONFIG_TARGET_EVB_RK3568=y ++CONFIG_SPL_LIBDISK_SUPPORT=y ++CONFIG_SPL_NAND_SUPPORT=y ++CONFIG_SPL_SPI_FLASH_SUPPORT=y ++CONFIG_SPL_SPI_SUPPORT=y ++CONFIG_DEFAULT_DEVICE_TREE="rk3566-oec-box-wxy4" ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++CONFIG_FIT_IMAGE_POST_PROCESS=y ++CONFIG_FIT_HW_CRYPTO=y ++CONFIG_SPL_LOAD_FIT=y ++CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y ++CONFIG_SPL_FIT_HW_CRYPTO=y ++# CONFIG_SPL_SYS_DCACHE_OFF is not set ++CONFIG_BOOTDELAY=0 ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_ANDROID_BOOTLOADER=y ++CONFIG_ANDROID_AVB=y ++CONFIG_ANDROID_BOOT_IMAGE_HASH=y ++CONFIG_SPL_BOARD_INIT=y ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++# CONFIG_SPL_LEGACY_IMAGE_SUPPORT is not set ++CONFIG_SPL_SEPARATE_BSS=y ++CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y ++CONFIG_SPL_SHA256_SUPPORT=y ++CONFIG_SPL_CRYPTO_SUPPORT=y ++CONFIG_SPL_HASH_SUPPORT=y ++CONFIG_SPL_MMC_WRITE=y ++CONFIG_SPL_MTD_SUPPORT=y ++CONFIG_SPL_MTD_WRITE=y ++CONFIG_SPL_ATF=y ++CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y ++CONFIG_SPL_AB=y ++CONFIG_FASTBOOT_BUF_ADDR=0xc00800 ++CONFIG_FASTBOOT_BUF_SIZE=0x04000000 ++CONFIG_FASTBOOT_FLASH=y ++CONFIG_FASTBOOT_FLASH_MMC_DEV=0 ++CONFIG_CMD_BOOTZ=y ++CONFIG_CMD_DTIMG=y ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_IMI is not set ++# CONFIG_CMD_IMLS is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_LZMADEC is not set ++# CONFIG_CMD_UNZIP is not set ++# CONFIG_CMD_FLASH is not set ++# CONFIG_CMD_FPGA is not set ++CONFIG_CMD_GPT=y ++# CONFIG_CMD_LOADB is not set ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_BOOT_ANDROID=y ++CONFIG_CMD_BOOT_ROCKCHIP=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_NAND=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++# CONFIG_CMD_ITEST is not set ++# CONFIG_CMD_SETEXPR is not set ++CONFIG_CMD_TFTPPUT=y ++CONFIG_CMD_TFTP_BOOTM=y ++CONFIG_CMD_TFTP_FLASH=y ++# CONFIG_CMD_MISC is not set ++# CONFIG_CMD_CHARGE_DISPLAY is not set ++CONFIG_CMD_MTD_BLK=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION_ENTRIES_NUMBERS=64 ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names assigned-clocks assigned-clock-rates assigned-clock-parents" ++# CONFIG_NET_TFTP_VARS is not set ++CONFIG_REGMAP=y ++CONFIG_SPL_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_SPL_SYSCON=y ++CONFIG_CLK=y ++CONFIG_SPL_CLK=y ++CONFIG_CLK_SCMI=y ++CONFIG_DM_CRYPTO=y ++CONFIG_SPL_DM_CRYPTO=y ++CONFIG_ROCKCHIP_CRYPTO_V2=y ++CONFIG_SPL_ROCKCHIP_CRYPTO_V2=y ++CONFIG_DM_RNG=y ++CONFIG_RNG_ROCKCHIP=y ++CONFIG_SCMI_FIRMWARE=y ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_ROCKCHIP_GPIO_V2=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_DM_KEY=y ++CONFIG_RK8XX_PWRKEY=y ++CONFIG_ADC_KEY=y ++CONFIG_MISC=y ++CONFIG_SPL_MISC=y ++CONFIG_ROCKCHIP_OTP=y ++CONFIG_SPL_ROCKCHIP_SECURE_OTP=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_MMC_SDHCI=y ++CONFIG_MMC_SDHCI_SDMA=y ++CONFIG_MMC_SDHCI_ROCKCHIP=y ++CONFIG_MTD=y ++CONFIG_MTD_BLK=y ++CONFIG_MTD_DEVICE=y ++CONFIG_NAND=y ++CONFIG_NAND_ROCKCHIP_V9=y ++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y ++CONFIG_SYS_NAND_U_BOOT_OFFS=0x8000 ++CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND=0x10000 ++CONFIG_MTD_SPI_NAND=y ++CONFIG_SPI_FLASH=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_MTD=y ++CONFIG_DM_ETH=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_DWC_ETH_QOS=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_NANENG_EDP=y ++CONFIG_PINCTRL=y ++CONFIG_SPL_PINCTRL=y ++CONFIG_DM_FUEL_GAUGE=y ++CONFIG_POWER_FG_RK817=y ++CONFIG_IO_DOMAIN=y ++CONFIG_ROCKCHIP_IO_DOMAIN=y ++CONFIG_DM_PMIC=y ++CONFIG_PMIC_RK8XX=y ++CONFIG_REGULATOR_FAN53555=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_REGULATOR_RK8XX=y ++CONFIG_DM_CHARGE_DISPLAY=y ++CONFIG_CHARGE_ANIMATION=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_SPL_RAM=y ++CONFIG_TPL_RAM=y ++CONFIG_DM_RAMDISK=y ++CONFIG_RAMDISK_RO=y ++CONFIG_ROCKCHIP_SDRAM_COMMON=y ++CONFIG_ROCKCHIP_TPL_INIT_DRAM_TYPE=0 ++CONFIG_DM_RESET=y ++CONFIG_SPL_DM_RESET=y ++CONFIG_SPL_RESET_ROCKCHIP=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_BASE=0xFE660000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_ROCKCHIP_SFC=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_DWC3=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_OHCI_HCD=y ++CONFIG_USB_OHCI_GENERIC=y ++CONFIG_USB_DWC3=y ++CONFIG_USB_DWC3_GADGET=y ++CONFIG_USB_DWC3_GENERIC=y ++CONFIG_USB_STORAGE=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_MANUFACTURER="Rockchip" ++CONFIG_USB_GADGET_VENDOR_NUM=0x2207 ++CONFIG_USB_GADGET_PRODUCT_NUM=0x350a ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_DM_VIDEO=y ++CONFIG_DISPLAY=y ++CONFIG_DRM_ROCKCHIP=y ++CONFIG_DRM_ROCKCHIP_DW_HDMI=y ++CONFIG_DRM_ROCKCHIP_INNO_MIPI_PHY=y ++CONFIG_DRM_ROCKCHIP_INNO_VIDEO_COMBO_PHY=y ++CONFIG_DRM_ROCKCHIP_DW_MIPI_DSI=y ++CONFIG_DRM_ROCKCHIP_ANALOGIX_DP=y ++CONFIG_DRM_ROCKCHIP_LVDS=y ++CONFIG_DRM_ROCKCHIP_RGB=y ++CONFIG_ROCKCHIP_CUBIC_LUT_SIZE=9 ++CONFIG_LCD=y ++CONFIG_USE_TINY_PRINTF=y ++CONFIG_SPL_TINY_MEMSET=y ++CONFIG_RSA=y ++CONFIG_SPL_RSA=y ++CONFIG_RSA_N_SIZE=0x200 ++CONFIG_RSA_E_SIZE=0x10 ++CONFIG_RSA_C_SIZE=0x20 ++CONFIG_SHA512=y ++CONFIG_LZ4=y ++CONFIG_LZMA=y ++CONFIG_SPL_GZIP=y ++CONFIG_ERRNO_STR=y ++# CONFIG_EFI_LOADER is not set ++CONFIG_AVB_LIBAVB=y ++CONFIG_AVB_LIBAVB_AB=y ++CONFIG_AVB_LIBAVB_ATX=y ++CONFIG_AVB_LIBAVB_USER=y ++CONFIG_RK_AVB_LIBAVB_USER=y ++CONFIG_OPTEE_CLIENT=y ++CONFIG_OPTEE_V2=y ++CONFIG_OPTEE_ALWAYS_USE_SECURITY_PARTITION=y ++CONFIG_LOADER_INI="RK3566MINIALL.ini" ++CONFIG_CMD_PCI=y ++CONFIG_NVME=y ++CONFIG_PCI=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PCI_COMPAT=y ++CONFIG_PCIE_DW_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y ++CONFIG_PHY_ROCKCHIP_SNPS_PCIE3=y ++CONFIG_DM_REGULATOR_FIXED=y ++#CONFIG_ROCKCHIP_BOOTDEV="nvme 0" ++CONFIG_SPL_FIT_IMAGE_KB=2560 ++CONFIG_CMD_SF=y ++CONFIG_MTD_BLK_U_BOOT_OFFS=0x400 ++CONFIG_ROCKCHIP_EMMC_IOMUX=y +-- +Created with Armbian build tools https://github.com/armbian/build +