In Circuit, is there a way to copy a top-level design and paste the cell as a subcircuit in another design?

[pyAnsysUser]

In Circuit, is there a way to copy a top-level design and paste the cell as a subcircuit in another design?

[Samuelopez-ansys]

Hi @pyAnsysUser ,

This is a very specific request, please submit an issue, and the community will try to implement it.

Thanks

[pyAnsysUser]

@Samuelopez-ansys if there is no straightforward way to do this (I couldn't fine one either) I think I've come up with a workaround.
Thanks!

[Samuelopez-ansys]

Any workaround is welcomed to be shared here :)

[pyAnsysUser]

well, before I asked this question, I did not know about gRPC; with this, it is trivial:

circuit_test_project_path = r'Circuit_Project\data\test_copy\copy_test.aedt'
first_parent = 'the_first_parent'
second_parent = 'the_second_parent'
child_for_copy = 'the_child'

with pyaedt.Circuit(projectname=circuit_test_project_path, designname=first_parent, non_graphical=False) as cir:
    cir.insert_design(second_parent)
    cir.insert_design(child_for_copy)

    cir.oproject.CopyDesign(child_for_copy)
    cir.set_active_design(first_parent)
    cir.odesign.PasteDesign(0)
    cir.set_active_design(second_parent)
    cir.odesign.PasteDesign(0)
    cir.save_project()
    cir.close_desktop()