Skip to content

Commit 1ed633f

Browse files
committed
hw/bsp: Add support for Fanstel EV BT40E
This adds support for Fanstel EV BT40E. BSP uses common cortex startup code and auto generated linker script. Signed-off-by: Jerzy Kasenberg <[email protected]>
1 parent 0f2a4be commit 1ed633f

File tree

12 files changed

+909
-0
lines changed

12 files changed

+909
-0
lines changed

hw/bsp/fanstel_ev_bt40e/bsp.yml

+64
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,64 @@
1+
#
2+
# Licensed to the Apache Software Foundation (ASF) under one
3+
# or more contributor license agreements. See the NOTICE file
4+
# distributed with this work for additional information
5+
# regarding copyright ownership. The ASF licenses this file
6+
# to you under the Apache License, Version 2.0 (the
7+
# "License"); you may not use this file except in compliance
8+
# with the License. You may obtain a copy of the License at
9+
#
10+
# http://www.apache.org/licenses/LICENSE-2.0
11+
#
12+
# Unless required by applicable law or agreed to in writing,
13+
# software distributed under the License is distributed on an
14+
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
15+
# KIND, either express or implied. See the License for the
16+
# specific language governing permissions and limitations
17+
# under the License.
18+
#
19+
20+
bsp.name: "Fanstel EV BT40E"
21+
bsp.url: https://www.fanstel.com/bt40f-nrf5340
22+
bsp.maker: "Fanstel"
23+
bsp.arch: cortex_m33
24+
bsp.compiler: "@apache-mynewt-core/compiler/arm-none-eabi-m33"
25+
bsp.linkerscript: autogenerated
26+
bsp.downloadscript: "hw/scripts/download.sh"
27+
bsp.debugscript: "hw/bsp/fanstel_ev_bt40e/debug.sh"
28+
29+
bsp.flash_map:
30+
areas:
31+
# System areas.
32+
FLASH_AREA_BOOTLOADER:
33+
device: 0
34+
offset: 0x00000000
35+
size: 32kB
36+
FLASH_AREA_IMAGE_0:
37+
device: 0
38+
offset: 0x0000c000
39+
size: 472kB
40+
FLASH_AREA_IMAGE_1:
41+
device: 0
42+
offset: 0x00082000
43+
size: 472kB
44+
FLASH_AREA_IMAGE_SCRATCH:
45+
device: 0
46+
offset: 0x000f8000
47+
size: 16kB
48+
49+
# User areas.
50+
FLASH_AREA_REBOOT_LOG:
51+
user_id: 0
52+
device: 0
53+
offset: 0x00008000
54+
size: 16kB
55+
FLASH_AREA_NFFS:
56+
user_id: 1
57+
device: 0
58+
offset: 0x000fc000
59+
size: 16kB
60+
FLASH_AREA_NET_COREDUMP:
61+
user_id: 2
62+
device: 2
63+
offset: 0x01028000
64+
size: 68kB

hw/bsp/fanstel_ev_bt40e/debug.sh

+37
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,37 @@
1+
#!/bin/sh
2+
# Licensed to the Apache Software Foundation (ASF) under one
3+
# or more contributor license agreements. See the NOTICE file
4+
# distributed with this work for additional information
5+
# regarding copyright ownership. The ASF licenses this file
6+
# to you under the Apache License, Version 2.0 (the
7+
# "License"); you may not use this file except in compliance
8+
# with the License. You may obtain a copy of the License at
9+
#
10+
# http://www.apache.org/licenses/LICENSE-2.0
11+
#
12+
# Unless required by applicable law or agreed to in writing,
13+
# software distributed under the License is distributed on an
14+
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
15+
# KIND, either express or implied. See the License for the
16+
# specific language governing permissions and limitations
17+
# under the License.
18+
#
19+
20+
# Called with following variables set:
21+
# - CORE_PATH is absolute path to @apache-mynewt-core
22+
# - BSP_PATH is absolute path to hw/bsp/bsp_name
23+
# - BIN_BASENAME is the path to prefix to target binary,
24+
# .elf appended to name is the ELF file
25+
# - FEATURES holds the target features string
26+
# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
27+
# - RESET set if target should be reset when attaching
28+
# - NO_GDB set if we should not start gdb to debug
29+
#
30+
31+
. $CORE_PATH/hw/scripts/jlink.sh
32+
33+
FILE_NAME=$BIN_BASENAME.elf
34+
JLINK_DEV="nrf5340_xxaa_app"
35+
36+
jlink_debug
37+
+89
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,89 @@
1+
/*
2+
* Licensed to the Apache Software Foundation (ASF) under one
3+
* or more contributor license agreements. See the NOTICE file
4+
* distributed with this work for additional information
5+
* regarding copyright ownership. The ASF licenses this file
6+
* to you under the Apache License, Version 2.0 (the
7+
* "License"); you may not use this file except in compliance
8+
* with the License. You may obtain a copy of the License at
9+
*
10+
* http://www.apache.org/licenses/LICENSE-2.0
11+
*
12+
* Unless required by applicable law or agreed to in writing,
13+
* software distributed under the License is distributed on an
14+
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
15+
* KIND, either express or implied. See the License for the
16+
* specific language governing permissions and limitations
17+
* under the License.
18+
*/
19+
20+
#ifndef _BSP_H_
21+
#define _BSP_H_
22+
23+
#include <inttypes.h>
24+
25+
#ifdef __cplusplus
26+
extern "C" {
27+
#endif
28+
29+
/* Define special stackos sections */
30+
#define sec_data_core __attribute__((section(".data.core")))
31+
#define sec_bss_core __attribute__((section(".bss.core")))
32+
#define sec_bss_nz_core __attribute__((section(".bss.core.nz")))
33+
34+
/* More convenient section placement macros. */
35+
#define bssnz_t sec_bss_nz_core
36+
37+
extern uint8_t _ram_start;
38+
#define RAM_SIZE 0x80000
39+
40+
/* LED pins */
41+
#define LED_1 (28)
42+
#define LED_2 (29)
43+
#define LED_3 (30)
44+
#define LED_4 (31)
45+
#define LED_BLINK_PIN (LED_1)
46+
47+
/* Buttons */
48+
#define BUTTON_1 (23)
49+
#define BUTTON_2 (24)
50+
#define BUTTON_3 (8)
51+
#define BUTTON_4 (9)
52+
53+
/* Arduino pins */
54+
#define ARDUINO_PIN_D0 32
55+
#define ARDUINO_PIN_D1 33
56+
#define ARDUINO_PIN_D2 36
57+
#define ARDUINO_PIN_D3 37
58+
#define ARDUINO_PIN_D4 38
59+
#define ARDUINO_PIN_D5 39
60+
#define ARDUINO_PIN_D6 40
61+
#define ARDUINO_PIN_D7 41
62+
#define ARDUINO_PIN_D8 42
63+
#define ARDUINO_PIN_D9 43
64+
#define ARDUINO_PIN_D10 44
65+
#define ARDUINO_PIN_D11 45
66+
#define ARDUINO_PIN_D12 46
67+
#define ARDUINO_PIN_D13 47
68+
#define ARDUINO_PIN_A0 4
69+
#define ARDUINO_PIN_A1 5
70+
#define ARDUINO_PIN_A2 6
71+
#define ARDUINO_PIN_A3 7
72+
#define ARDUINO_PIN_A4 25
73+
#define ARDUINO_PIN_A5 26
74+
75+
#define ARDUINO_PIN_RX ARDUINO_PIN_D0
76+
#define ARDUINO_PIN_TX ARDUINO_PIN_D1
77+
78+
#define ARDUINO_PIN_SCL 35
79+
#define ARDUINO_PIN_SDA 34
80+
81+
#define ARDUINO_PIN_SCK ARDUINO_PIN_D13
82+
#define ARDUINO_PIN_MOSI ARDUINO_PIN_D11
83+
#define ARDUINO_PIN_MISO ARDUINO_PIN_D12
84+
85+
#ifdef __cplusplus
86+
}
87+
#endif
88+
89+
#endif /* _BSP_H_ */

hw/bsp/fanstel_ev_bt40e/net/bsp.yml

+65
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,65 @@
1+
#
2+
# Licensed to the Apache Software Foundation (ASF) under one
3+
# or more contributor license agreements. See the NOTICE file
4+
# distributed with this work for additional information
5+
# regarding copyright ownership. The ASF licenses this file
6+
# to you under the Apache License, Version 2.0 (the
7+
# "License"); you may not use this file except in compliance
8+
# with the License. You may obtain a copy of the License at
9+
#
10+
# http://www.apache.org/licenses/LICENSE-2.0
11+
#
12+
# Unless required by applicable law or agreed to in writing,
13+
# software distributed under the License is distributed on an
14+
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
15+
# KIND, either express or implied. See the License for the
16+
# specific language governing permissions and limitations
17+
# under the License.
18+
#
19+
20+
bsp.name: "Fanstel EV BT40E (Net Core)"
21+
bsp.url: https://www.fanstel.com/bt40f-nrf5340
22+
bsp.maker: "Fanstel"
23+
bsp.arch: cortex_m33
24+
bsp.compiler: "@apache-mynewt-core/compiler/arm-none-eabi-m33"
25+
bsp.linkerscript: autogenerated
26+
bsp.downloadscript: "hw/scripts/download.sh"
27+
bsp.debugscript: "hw/bsp/fanstel_ev_bt40e/net/debug.sh"
28+
29+
bsp.flash_map:
30+
areas:
31+
# System areas.
32+
FLASH_AREA_BOOTLOADER:
33+
device: 0
34+
offset: 0x01000000
35+
size: 16kB
36+
FLASH_AREA_IMAGE_0:
37+
device: 0
38+
offset: 0x01008000
39+
size: 128kB
40+
FLASH_AREA_COREDUMP:
41+
user_id: 2
42+
device: 0
43+
offset: 0x01028000
44+
size: 68kB
45+
# This maps to app flash and uses vflash
46+
FLASH_AREA_IMAGE_1:
47+
device: 1
48+
offset: 0x00000000
49+
size: 128kB
50+
FLASH_AREA_IMAGE_SCRATCH:
51+
device: 0
52+
offset: 0x0103a000
53+
size: 8kB
54+
55+
# User areas.
56+
FLASH_AREA_REBOOT_LOG:
57+
user_id: 0
58+
device: 0
59+
offset: 0x01004000
60+
size: 16kB
61+
FLASH_AREA_NFFS:
62+
user_id: 1
63+
device: 0
64+
offset: 0x010fc000
65+
size: 16kB

hw/bsp/fanstel_ev_bt40e/net/debug.sh

+40
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
#!/bin/sh
2+
# Licensed to the Apache Software Foundation (ASF) under one
3+
# or more contributor license agreements. See the NOTICE file
4+
# distributed with this work for additional information
5+
# regarding copyright ownership. The ASF licenses this file
6+
# to you under the Apache License, Version 2.0 (the
7+
# "License"); you may not use this file except in compliance
8+
# with the License. You may obtain a copy of the License at
9+
#
10+
# http://www.apache.org/licenses/LICENSE-2.0
11+
#
12+
# Unless required by applicable law or agreed to in writing,
13+
# software distributed under the License is distributed on an
14+
# "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
15+
# KIND, either express or implied. See the License for the
16+
# specific language governing permissions and limitations
17+
# under the License.
18+
#
19+
20+
# Called with following variables set:
21+
# - CORE_PATH is absolute path to @apache-mynewt-core
22+
# - BSP_PATH is absolute path to hw/bsp/bsp_name
23+
# - BIN_BASENAME is the path to prefix to target binary,
24+
# .elf appended to name is the ELF file
25+
# - FEATURES holds the target features string
26+
# - EXTRA_JTAG_CMD holds extra parameters to pass to jtag software
27+
# - RESET set if target should be reset when attaching
28+
# - NO_GDB set if we should not start gdb to debug
29+
#
30+
31+
#Use custom ports for debuging so that newt debug works on both cores
32+
EXTRA_JTAG_CMD="-port 3334"
33+
34+
. $CORE_PATH/hw/scripts/jlink.sh
35+
36+
FILE_NAME=$BIN_BASENAME.elf
37+
JLINK_DEV="nrf5340_xxaa_net"
38+
39+
jlink_debug
40+
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,98 @@
1+
/*
2+
* Licensed to the Apache Software Foundation (ASF) under one
3+
* or more contributor license agreements. See the NOTICE file
4+
* distributed with this work for additional information
5+
* regarding copyright ownership. The ASF licenses this file
6+
* to you under the Apache License, Version 2.0 (the
7+
* "License"); you may not use this file except in compliance
8+
* with the License. You may obtain a copy of the License at
9+
*
10+
* http://www.apache.org/licenses/LICENSE-2.0
11+
*
12+
* Unless required by applicable law or agreed to in writing,
13+
* software distributed under the License is distributed on an
14+
* "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY
15+
* KIND, either express or implied. See the License for the
16+
* specific language governing permissions and limitations
17+
* under the License.
18+
*/
19+
20+
#ifndef _BSP_H_
21+
#define _BSP_H_
22+
23+
#include <inttypes.h>
24+
25+
#ifdef __cplusplus
26+
extern "C" {
27+
#endif
28+
29+
/* Define special stackos sections */
30+
#define sec_data_core __attribute__((section(".data.core")))
31+
#define sec_bss_core __attribute__((section(".bss.core")))
32+
#define sec_bss_nz_core __attribute__((section(".bss.core.nz")))
33+
34+
/* More convenient section placement macros. */
35+
#define bssnz_t sec_bss_nz_core
36+
37+
extern uint8_t _ram_start[];
38+
#define RAM_SIZE 0x10000
39+
40+
/* LED pins */
41+
#define LED_RED (28)
42+
#define LED_GREEN (30)
43+
#define LED_BLUE (43)
44+
#define LED_1 (LED_GREEN)
45+
#define LED_2 (LED_RED)
46+
#define LED_3 (LED_BLUE)
47+
#define LED_BLINK_PIN (LED_1)
48+
49+
/* Buttons */
50+
#define BUTTON_1 (4)
51+
#define BUTTON_2 (22)
52+
53+
/* MikroBUS(R) pins */
54+
#define MIKROBUS_1_PIN_AN (26) /* P0_26 */
55+
#define MIKROBUS_1_PIN_CS (11) /* P0_11 */
56+
#define MIKROBUS_1_PIN_SCK (8) /* P0_08 */
57+
#define MIKROBUS_1_PIN_MISO (10) /* P0_10 */
58+
#define MIKROBUS_1_PIN_MOSI (9) /* P0_09 */
59+
#define MIKROBUS_1_PIN_PWM (12) /* P0_12 */
60+
#define MIKROBUS_1_PIN_INT (25) /* P0_25 */
61+
#define MIKROBUS_1_PIN_RX (6) /* P0_06 */
62+
#define MIKROBUS_1_PIN_TX (27) /* P0_27 */
63+
#define MIKROBUS_1_PIN_SCL (35) /* P1_03 */
64+
#define MIKROBUS_1_PIN_SDA (34) /* P1_02 */
65+
66+
#define MIKROBUS_2_PIN_AN (5) /* P0_05 */
67+
#define MIKROBUS_2_PIN_CS (37) /* P1_05 */
68+
#define MIKROBUS_2_PIN_SCK (24) /* P0_24 */
69+
#define MIKROBUS_2_PIN_MISO (38) /* P1_06 */
70+
#define MIKROBUS_2_PIN_MOSI (39) /* P1_07 */
71+
#define MIKROBUS_2_PIN_PWM (29) /* P0_29 */
72+
#define MIKROBUS_2_PIN_INT (32) /* P1_00 */
73+
#define MIKROBUS_2_PIN_RX (33) /* P1_01 */
74+
#define MIKROBUS_2_PIN_TX (31) /* P0_31 */
75+
#define MIKROBUS_2_PIN_SCL (35) /* P1_03 */
76+
#define MIKROBUS_2_PIN_SDA (34) /* P1_02 */
77+
78+
/* QWIIC */
79+
#define QWICC_PIN_SCL (35) /* P1_03 */
80+
#define QWICC_PIN_SDA (34) /* P1_02 */
81+
82+
/* UART CP2105 ECI */
83+
#define CP2105_ECI_RXD 44
84+
#define CP2105_ECI_TXD 45
85+
#define CP2105_ECI_CTS 46
86+
#define CP2105_ECI_RTS 47
87+
88+
/* UART CP2105 SCI */
89+
#define CP2105_SCI_RXD 20
90+
#define CP2105_SCI_TXD 23
91+
#define CP2105_SCI_RTS 19
92+
#define CP2105_SCI_CTS 21
93+
94+
#ifdef __cplusplus
95+
}
96+
#endif
97+
98+
#endif /* _BSP_H_ */

0 commit comments

Comments
 (0)