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refactor: Remove BLS12381 G2 Add and Double functionalities (#183)
* refactor: Remove BLS12381 G2 Add and Double functionalities - Removed the `bls12381-g2-add` and `bls12381-g2-double` functions related to BLS12381 G2Affine points from various files. - Deleted associated tests, files, modules, and references from test suite, codebase, libraries, and syscall map. * chore: bump the circuit version
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.gitignore

+2-1
Original file line numberDiff line numberDiff line change
@@ -24,4 +24,5 @@ prover/build
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prover/*.tar.gz
2525

2626
# IDE Conf
27-
.idea
27+
.idea
28+
prover/data

core/src/lib.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -30,4 +30,4 @@ use stark::StarkGenericConfig;
3030
/// This string should be updated whenever any step in verifying an SP1 proof changes, including
3131
/// core, recursion, and plonk-bn254. This string is used to download SP1 artifacts and the gnark
3232
/// docker image.
33-
pub const SPHINX_CIRCUIT_VERSION: &str = "v1.0.8.2-testnet";
33+
pub const SPHINX_CIRCUIT_VERSION: &str = "v1.0.8.3-testnet";

core/src/runtime/record.rs

+1-43
Original file line numberDiff line numberDiff line change
@@ -28,11 +28,7 @@ use crate::{
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operations::field::params::FieldParameters,
2929
stark::Indexed,
3030
syscall::precompiles::{
31-
bls12_381::{
32-
g1_decompress::{Bls12381G1DecompressChip, Bls12381G1DecompressEvent},
33-
g2_add::{Bls12381G2AffineAddChip, Bls12381G2AffineAddEvent},
34-
g2_double::{Bls12381G2AffineDoubleChip, Bls12381G2AffineDoubleEvent},
35-
},
31+
bls12_381::g1_decompress::{Bls12381G1DecompressChip, Bls12381G1DecompressEvent},
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field::{FieldChip, FieldEvent},
3733
quad_field::{QuadFieldChip, QuadFieldEvent},
3834
secp256k1::decompress::{Secp256k1DecompressChip, Secp256k1DecompressEvent},
@@ -131,8 +127,6 @@ pub struct ExecutionRecord {
131127
pub bls12381_fp_events: Vec<FieldEvent<Bls12381BaseField>>,
132128
pub bls12381_fp2_events: Vec<QuadFieldEvent<Bls12381BaseField>>,
133129
pub bls12381_g1_decompress_events: Vec<Bls12381G1DecompressEvent>,
134-
pub bls12381_g2_add_events: Vec<Bls12381G2AffineAddEvent>,
135-
pub bls12381_g2_double_events: Vec<Bls12381G2AffineDoubleEvent>,
136130

137131
// Blake2s
138132
pub blake2s_round_events: Vec<Blake2sRoundEvent>,
@@ -262,18 +256,6 @@ impl EventLens<Secp256k1DecompressChip> for ExecutionRecord {
262256
}
263257
}
264258

265-
impl EventLens<Bls12381G2AffineAddChip> for ExecutionRecord {
266-
fn events(&self) -> <Bls12381G2AffineAddChip as crate::air::WithEvents<'_>>::Events {
267-
&self.bls12381_g2_add_events
268-
}
269-
}
270-
271-
impl EventLens<Bls12381G2AffineDoubleChip> for ExecutionRecord {
272-
fn events(&self) -> <Bls12381G2AffineDoubleChip as crate::air::WithEvents<'_>>::Events {
273-
&self.bls12381_g2_double_events
274-
}
275-
}
276-
277259
impl EventLens<FieldChip<Bls12381BaseField>> for ExecutionRecord {
278260
fn events(&self) -> <FieldChip<Bls12381BaseField> as crate::air::WithEvents<'_>>::Events {
279261
&self.bls12381_fp_events
@@ -495,14 +477,6 @@ impl MachineRecord for ExecutionRecord {
495477
"bls12381_fp2_events".to_string(),
496478
self.bls12381_fp2_events.len(),
497479
);
498-
stats.insert(
499-
"bls12381_g2_add_events".to_string(),
500-
self.bls12381_g2_add_events.len(),
501-
);
502-
stats.insert(
503-
"bls12381_g2_double_events".to_string(),
504-
self.bls12381_g2_double_events.len(),
505-
);
506480

507481
stats.insert(
508482
"blake2s_round_events".to_string(),
@@ -554,10 +528,6 @@ impl MachineRecord for ExecutionRecord {
554528
.append(&mut other.bls12381_fp2_events);
555529
self.bls12381_g1_decompress_events
556530
.append(&mut other.bls12381_g1_decompress_events);
557-
self.bls12381_g2_add_events
558-
.append(&mut other.bls12381_g2_add_events);
559-
self.bls12381_g2_double_events
560-
.append(&mut other.bls12381_g2_double_events);
561531
self.blake2s_round_events
562532
.append(&mut other.blake2s_round_events);
563533

@@ -887,18 +857,6 @@ impl MachineRecord for ExecutionRecord {
887857
self.nonce_lookup.insert(event.lookup_id, i as u32);
888858
}
889859

890-
// Bls12-381 G2Affine addition events.
891-
first.bls12381_g2_add_events = take(&mut self.bls12381_g2_add_events);
892-
for (i, event) in first.bls12381_g2_add_events.iter().enumerate() {
893-
self.nonce_lookup.insert(event.lookup_id, i as u32);
894-
}
895-
896-
// Bls12-381 G2Affine doubling events.
897-
first.bls12381_g2_double_events = take(&mut self.bls12381_g2_double_events);
898-
for (i, event) in first.bls12381_g2_double_events.iter().enumerate() {
899-
self.nonce_lookup.insert(event.lookup_id, i as u32);
900-
}
901-
902860
// blake2s_round events
903861
first.blake2s_round_events = take(&mut self.blake2s_round_events);
904862
for (i, event) in first.blake2s_round_events.iter().enumerate() {

core/src/runtime/syscall.rs

-20
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,6 @@ use crate::runtime::{Register, Runtime};
88
use crate::stark::Ed25519Parameters;
99
use crate::syscall::precompiles::blake2s::Blake2sRoundChip;
1010
use crate::syscall::precompiles::bls12_381::g1_decompress::Bls12381G1DecompressChip;
11-
use crate::syscall::precompiles::bls12_381::g2_add::Bls12381G2AffineAddChip;
12-
use crate::syscall::precompiles::bls12_381::g2_double::Bls12381G2AffineDoubleChip;
1311
use crate::syscall::precompiles::edwards::EdAddAssignChip;
1412
use crate::syscall::precompiles::edwards::EdDecompressChip;
1513
use crate::syscall::precompiles::field::{FieldAddSyscall, FieldMulSyscall, FieldSubSyscall};
@@ -101,8 +99,6 @@ pub enum SyscallCode {
10199
BLS12381_FP2_ADD = 0x00_01_01_77,
102100
BLS12381_FP2_SUB = 0x00_01_01_78,
103101
BLS12381_FP2_MUL = 0x00_01_01_79,
104-
BLS12381_G2_ADD = 0x00_01_01_80,
105-
BLS12381_G2_DOUBLE = 0x00_00_01_81,
106102

107103
/// Executes the `SHA512_EXTEND` precompile.
108104
SHA512_EXTEND = 0x00_00_01_C1,
@@ -160,8 +156,6 @@ impl SyscallCode {
160156
0x00_01_01_71 => SyscallCode::BLS12381_G1_ADD,
161157
0x00_00_01_72 => SyscallCode::BLS12381_G1_DOUBLE,
162158
0x00_01_01_F2 => SyscallCode::BLS12381_G1_DECOMPRESS,
163-
0x00_01_01_80 => SyscallCode::BLS12381_G2_ADD,
164-
0x00_00_01_81 => SyscallCode::BLS12381_G2_DOUBLE,
165159
0x00_01_01_ED => SyscallCode::BLAKE_2S_ROUND,
166160
0x00_00_01_C1 => SyscallCode::SHA512_EXTEND,
167161
0x00_00_01_C2 => SyscallCode::SHA512_COMPRESS,
@@ -394,14 +388,6 @@ pub fn default_syscall_map() -> HashMap<SyscallCode, Arc<dyn Syscall>> {
394388
SyscallCode::BLS12381_G1_DECOMPRESS,
395389
Arc::new(Bls12381G1DecompressChip::new()),
396390
);
397-
syscall_map.insert(
398-
SyscallCode::BLS12381_G2_ADD,
399-
Arc::new(Bls12381G2AffineAddChip::new()),
400-
);
401-
syscall_map.insert(
402-
SyscallCode::BLS12381_G2_DOUBLE,
403-
Arc::new(Bls12381G2AffineDoubleChip::new()),
404-
);
405391
syscall_map.insert(
406392
SyscallCode::SHA512_EXTEND,
407393
Arc::new(Sha512ExtendChip::new()),
@@ -523,12 +509,6 @@ mod tests {
523509
}
524510
SyscallCode::HINT_LEN => assert_eq!(code as u32, sphinx_zkvm::syscalls::HINT_LEN),
525511
SyscallCode::HINT_READ => assert_eq!(code as u32, sphinx_zkvm::syscalls::HINT_READ),
526-
SyscallCode::BLS12381_G2_ADD => {
527-
assert_eq!(code as u32, sphinx_zkvm::syscalls::BLS12381_G2_ADD)
528-
}
529-
SyscallCode::BLS12381_G2_DOUBLE => {
530-
assert_eq!(code as u32, sphinx_zkvm::syscalls::BLS12381_G2_DOUBLE)
531-
}
532512
SyscallCode::BLAKE_2S_ROUND => {
533513
assert_eq!(code as u32, sphinx_zkvm::syscalls::BLAKE_2S_ROUND)
534514
}

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