Problems with access information for some TriCore operands

[b1llow]

Originally posted by @Rot127 in #2523 (review)

Need to fix all fixme in tests/details/tricore.yaml

[b1llow]

Also note that when an operand of type TRICORE_OP_MEM is written, the access information is wrong.

Maybe need to construct a new Operand Class in the td file to fix this?

[Rot127]

Maybe need to construct a new Operand Class in the td file to fix this?

Yeah, this would be the way. Also we would need to mark all store/load instructions with mayLoad = 1 or mayStore = 1. The mapping table generator will add the read/write details for iPtr operands. So making the registers and immediate values of type iPtr might be even enough.

[Rot127]

You can also add supplement information to the TriCore tables. Like here.
It assumes that there is only a single memory operand (hopefully true for TriCore) and the mayStore, mayLoad attributes are set correctly. FIxing mayLoad, mauStore ins the TriCore files is way easier then changing operands.

Then you assign this access value whenever a memory operand is created.