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### This is the Verilog source code for the Xenium Flash Memory programming.
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- Its fairly straight forward, the CPLD acts as a bridge between the Raspberry PI (or any other device) and the OpenXenium Flash memory and translates writing and reading instructions from a single 4-bit bus to a 21-bit Address + 8-bit bus.
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- [[ MORE DETAILS TO FOLLOW SOON ]]

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