88 *
99 * This software component is licensed by Rohit Nimkar under BSD 3-Clause license,
1010 * the "License"; You may not use this file except in compliance with the
11- * License. You may obtain a copy of the License at:
12- * opensource.org/licenses/BSD-3-Clause
11+ * License. You may obtain a copy of the License at: opensource.org/licenses/BSD-3-Clause
1312 *
1413 ******************************************************************************
1514 */
1817#include <stm32f1xx.h>
1918
2019#include <time.h>
21- #include <uart .h>
20+ #include <main .h>
2221
23- char msg [28 ] = "Hello world\r\n\0" ;
22+ #define RX_BUFFER_LENGTH 20U
23+ #define TX_BUFFER_LENGTH 13U
2424
25- int main (void )
26- {
25+ const char * msg = "Hello world\r\n\0" ;
26+
27+ char buff [RX_BUFFER_LENGTH ];
28+
29+
30+ /**
31+ * @brief Configure DMA1 channel 4 to work with USART1 transmitter
32+ * It reads from memory and writes to USART data register
33+ */
34+ void dma_usart_tx_init (void ){
35+ // enable clock for dma peripheral registers
2736 RCC -> AHBENR |= RCC_AHBENR_DMA1EN ;
2837
38+ // USART TX is mapped to DMA1 channel 4
39+ // set peripheral address to USART data register
2940 DMA1_Channel4 -> CPAR = (uint32_t ) & USART1 -> DR ;
41+
42+ // set memory address to address of string
3043 DMA1_Channel4 -> CMAR = (uint32_t ) msg ;
31- DMA1_Channel4 -> CNDTR = 13U ;
32- DMA1_Channel4 -> CCR |= DMA_CCR_MINC | DMA_CCR_CIRC | DMA_CCR_DIR ;
3344
34- // enable clock for GPIOA and USART1
45+ // set number od dma transactions
46+ DMA1_Channel4 -> CNDTR = RX_BUFFER_LENGTH ;
47+
48+ // set memory address incement by 1byte
49+ DMA1_Channel4 -> CCR |= DMA_CCR_MINC ;
50+
51+ // enable circular mode
52+ DMA1_Channel4 -> CCR |= DMA_CCR_CIRC ;
53+
54+ // set data transfer direction - memory -> peripheral
55+ DMA1_Channel4 -> CCR |= DMA_CCR_DIR ;
56+ }
57+
58+ /**
59+ * @brief Enable DMA to accept request for channel 4
60+ */
61+ void dma_usart_tx_enable (void ){
62+ DMA1_Channel4 -> CCR |= DMA_CCR_EN ;
63+ }
64+
65+ void usart1_init (void ){
66+ // enable clock for GPIOA and USART1
3567 RCC -> APB2ENR |= RCC_APB2ENR_USART1EN | RCC_APB2ENR_IOPAEN ;
3668
3769 // reset pin configurations for PA9 and PA10
@@ -43,34 +75,35 @@ int main(void)
4375 // PA10 as floating input
4476 GPIOA -> CRH |= GPIO_CRH_CNF10_0 ;
4577
78+ // set baud rate as 9600
4679 uint32_t baud = (uint32_t )(SystemCoreClock / 9600 );
47-
4880 USART1 -> BRR = baud ;
4981
50- USART1 -> CR3 |= USART_CR3_DMAT ;
51-
52- DMA1_Channel4 -> CCR |= DMA_CCR_EN ;
53- // transmitter enable, receiver enable, receiver interrupt enable and USART enable
54- USART1 -> CR1 = USART_CR1_TE | USART_CR1_RE | USART_CR1_RXNEIE | USART_CR1_UE ;
55-
56-
57-
58- // enable USART1 interrupt
59- // NVIC_EnableIRQ(USART1_IRQn);
82+ // Enable transmitter
83+ USART1 -> CR1 |= USART_CR1_TE ;
6084
85+ // Enable DMA mode for transmitter
86+ USART1 -> CR3 |= USART_CR3_DMAT ;
87+ }
6188
89+ /**
90+ * @brief Enable USART1 prescalers and output
91+ */
92+ void usart1_enable (void ){
93+ USART1 -> CR1 |= USART_CR1_UE ;
94+ }
6295
63- // USART1_init(9600U);
64-
65- int ret = SysTick_Config (SystemCoreClock /1000 );
66- if (ret < 0 )
67- while (1 )
68- ;
96+ int main (void )
97+ {
98+ SysTick_Config (SystemCoreClock /1000 );
99+ usart1_init ();
100+ dma_usart_tx_init ();
101+ dma_usart_tx_enable ();
102+ usart1_enable ();
69103
70104 while (1 )
71105 {
72- // USART1_puts(msg);
73- // delay(5000U);
106+
74107 }
75108
76109
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