iommu/vt-d: Disallow dirty tracking if incoherent page walk

jira KERNEL-318
cve CVE-2025-40058
Rebuild_History Non-Buildable kernel-6.12.0-124.20.1.el10_1
commit-author Lu Baolu <[email protected]>
commit 57f5504

Dirty page tracking relies on the IOMMU atomically updating the dirty bit
in the paging-structure entry. For this operation to succeed, the paging-
structure memory must be coherent between the IOMMU and the CPU. In
another word, if the iommu page walk is incoherent, dirty page tracking
doesn't work.

The Intel VT-d specification, Section 3.10 "Snoop Behavior" states:

"Remapping hardware encountering the need to atomically update A/EA/D bits
 in a paging-structure entry that is not snooped will result in a non-
 recoverable fault."

To prevent an IOMMU from being incorrectly configured for dirty page
tracking when it is operating in an incoherent mode, mark SSADS as
supported only when both ecap_slads and ecap_smpwc are supported.

Fixes: f35f22c ("iommu/vt-d: Access/Dirty bit support for SS domains")
	Signed-off-by: Lu Baolu <[email protected]>
	Reviewed-by: Jason Gunthorpe <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
	Signed-off-by: Joerg Roedel <[email protected]>
(cherry picked from commit 57f5504)
	Signed-off-by: Jonathan Maple <[email protected]>

Author: PlaidCat

drivers/iommu/intel/iommu.h

@@ -542,7 +542,8 @@ enum {
 #define pasid_supported(iommu)	(sm_supported(iommu) &&			\
 				 ecap_pasid((iommu)->ecap))
 #define ssads_supported(iommu) (sm_supported(iommu) &&                 \
-				ecap_slads((iommu)->ecap))
+				ecap_slads((iommu)->ecap) &&           \
+				ecap_smpwc(iommu->ecap))
 #define nested_supported(iommu)	(sm_supported(iommu) &&			\
 				 ecap_nest((iommu)->ecap))