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Merge branch 'devicetree-org:main' into main
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dtschema/schemas/gpio/gpio.yaml

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@@ -4,7 +4,19 @@ $id: http://devicetree.org/schemas/gpio/gpio.yaml#
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$schema: http://devicetree.org/meta-schemas/base.yaml#
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title: GPIO Controller Common Properties
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description: Schema for GPIO devicetree bindings
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description: |
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Every GPIO controller node must contain both an empty "gpio-controller"
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property, and a #gpio-cells integer property, which indicates the number of
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cells in a gpio-specifier.
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Some system-on-chips (SoCs) use the concept of GPIO banks. A GPIO bank is an
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instance of a hardware IP core on a silicon die, usually exposed to the
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programmer as a coherent range of I/O addresses. Usually each such bank is
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exposed in the device tree as an individual gpio-controller node, reflecting
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the fact that the hardware was synthesized by reusing the same IP block a few
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times over.
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maintainers:
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- Rob Herring <[email protected]>
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@@ -17,13 +29,43 @@ properties:
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$ref: /schemas/types.yaml#/definitions/flag
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gpio-line-names:
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$ref: /schemas/types.yaml#/definitions/non-unique-string-array
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description: >
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An array of strings defining the names of the GPIO lines going out of the
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GPIO controller. This name should be the most meaningful producer name for
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the system, such as a rail name indicating the usage. Package names such
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as pin name are discouraged: such lines have opaque names (since they are
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by definition generic purpose) and such names are usually not very
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helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
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reasonable line names as they describe what the line is used for. "GPIO0"
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is not a good name to give to a GPIO line. Placeholders are discouraged:
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rather use the "" (blank string) if the use of the GPIO line is undefined
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in your design. The names are assigned starting from line offset 0 from
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left to right from the passed array. An incomplete array (where the number
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of passed named are less than ngpios) will still be used up until the last
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provided valid line index.
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ngpios:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: >
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Indicates the number of in-use slots of available slots for GPIOs. The
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typical example is something like this: the hardware register is 32 bits
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wide, but only 18 of the bits have a physical counterpart. The driver is
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generally written so that all 32 bits can be used, but the IP block is
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reused in a lot of designs, some using all 32 bits, some using 18 and some
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using 12. In this case, setting "ngpios = <18>;" informs the driver that
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only the first 18 GPIOs, at local offset 0 .. 17, are in use. If these
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GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an
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additional set of tuples is needed to specify which GPIOs are unusable,
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with the gpio-reserved-ranges binding.
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gpio-reserved-ranges:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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minItems: 2
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maxItems: 2
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description:
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Indicates the start and size of the GPIOs that can't be used.
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gpio-ranges:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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items:

dtschema/schemas/pci/pci-bus-common.yaml

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@@ -128,6 +128,16 @@ properties:
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$ref: /schemas/types.yaml#/definitions/uint32
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enum: [ 1, 2, 4, 8, 16, 32 ]
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n-fts:
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description:
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The number of Fast Training Sequences (N_FTS) required by the
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Receiver (this component) when transitioning the Link from L0s
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to L0; advertised during initial Link training. Each entry in
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the array specifies a PCIe data rate
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$ref: /schemas/types.yaml#/definitions/uint8-array
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minItems: 1
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maxItems: 5
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reset-gpios:
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description: GPIO controlled connection to PERST# signal
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maxItems: 1
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description: Disables ASPM L0s capability
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type: boolean
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aspm-l0s-entry-delay-ns:
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description: ASPM L0s entry delay
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aspm-l1-entry-delay-ns:
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description: ASPM L1 entry delay
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vpcie12v-supply:
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description: 12v regulator phandle for the slot
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dtschema/schemas/root-node.yaml

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@@ -28,6 +28,7 @@ properties:
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- watch
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- embedded
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- television
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- spectacles
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"#address-cells":
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enum: [1, 2]
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"#size-cells":

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