Two tests for SVA->Buechi->BDD

This adds two further tests for the SVA->Buechi->BDD flow.

Author: kroening

regression/verilog/SVA/sequence_and2.sv

@@ -1,6 +1,6 @@
 module main(input clk);
 
-  reg [31:0] x = 0;
+  reg [7:0] x = 0;
 
   always @(posedge clk)
     x<=x+1;

regression/verilog/SVA/sequence_or1.sv

@@ -1,6 +1,6 @@
 module main(input clk);
 
-  reg [31:0] x = 0;
+  reg [7:0] x = 0;
 
   always @(posedge clk)
     x<=x+1;