stm32/i2c: remove busy waiting on BUSY flag in v2

mahu-wm · mahu-wm · commit 3a207a6e6c6e · 2025-11-14T17:22:47.000+01:00
diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ## Unreleased - ReleaseDate
 
+- fix: stm32/i2c fix busy waiting on BUSY flag in v2
 - fix: flash erase on dual-bank STM32Gxxx
 - feat: Add support for STM32N657X0
 - feat: timer: Add 32-bit timer support to SimplePwm waveform_up method following waveform pattern ([#4717](https://github.com/embassy-rs/embassy/pull/4717))
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
@@ -199,13 +199,7 @@ impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM> {
             while info.regs.cr2().read().start() {
                 timeout.check()?;
             }
-
-            // Wait for the bus to be free
-            while info.regs.isr().read().busy() {
-                timeout.check()?;
-            }
         }
-
         // Set START and prepare to send `bytes`. The
         // START bit can be set even if the bus is BUSY or
         // I2C is in slave mode.

Original file line number	Diff line number	Diff line change
`@@ -199,13 +199,7 @@ impl<'d, M: Mode, IM: MasterMode> I2c<'d, M, IM> {`
`199`	`199`	`while info.regs.cr2().read().start() {`
`200`	`200`	`timeout.check()?;`
`201`	`201`	`}`
`202`		`-`
`203`		`- // Wait for the bus to be free`
`204`		`- while info.regs.isr().read().busy() {`
`205`		`- timeout.check()?;`
`206`		`- }`
`207`	`202`	`}`
`208`		`-`
`209`	`203`	// Set START and prepare to send `bytes`. The
`210`	`204`	`// START bit can be set even if the bus is BUSY or`
`211`	`205`	`// I2C is in slave mode.`