From f52587700f5e7690e6068b4d45afd8be7e7e861f Mon Sep 17 00:00:00 2001 From: Jeff Hlywa Date: Wed, 10 Sep 2025 19:51:51 -0400 Subject: [PATCH] Consolidate AES peripheral map using IP version This commit simplifies and corrects a portion of the AES peripheral map. The AES peripheral is not currently used within the embassy-stm32 crate, therefore this change, while breaking, should have minimal impact. --- data/registers/{aes_f7.yaml => aes_v2a.yaml} | 0 data/registers/{aes_v2.yaml => aes_v2b.yaml} | 0 stm32-data-gen/src/perimap.rs | 19 ++++++------------- 3 files changed, 6 insertions(+), 13 deletions(-) rename data/registers/{aes_f7.yaml => aes_v2a.yaml} (100%) rename data/registers/{aes_v2.yaml => aes_v2b.yaml} (100%) diff --git a/data/registers/aes_f7.yaml b/data/registers/aes_v2a.yaml similarity index 100% rename from data/registers/aes_f7.yaml rename to data/registers/aes_v2a.yaml diff --git a/data/registers/aes_v2.yaml b/data/registers/aes_v2b.yaml similarity index 100% rename from data/registers/aes_v2.yaml rename to data/registers/aes_v2b.yaml diff --git a/stm32-data-gen/src/perimap.rs b/stm32-data-gen/src/perimap.rs index 035d9c4db..e96057a5b 100644 --- a/stm32-data-gen/src/perimap.rs +++ b/stm32-data-gen/src/perimap.rs @@ -37,19 +37,12 @@ pub static PERIMAP: RegexMap<(&str, &str, &str)> = RegexMap::new(&[ ("STM32G0.*:RNG:.*", ("rng", "v1", "RNG")), ("STM32G4.*:RNG:.*", ("rng", "v1", "RNG")), ("STM32WB.*:RNG:.*", ("rng", "v1", "RNG")), - ("STM32F7.*:AES:.*", ("aes", "f7", "AES")), - ("STM32F4.*:AES:.*", ("aes", "v1", "AES")), - ("STM32G0.*:AES:.*", ("aes", "v2", "AES")), - ("STM32U0.*:AES:.*", ("aes", "v2", "AES")), - ("STM32G4.*:AES:.*", ("aes", "v2", "AES")), - ("STM32L0.*:AES:.*", ("aes", "v1", "AES")), - ("STM32L1.*:AES:.*", ("aes", "v1", "AES")), - ("STM32L4.*:AES:.*", ("aes", "v1", "AES")), - ("STM32L5.*:AES:.*", ("aes", "v2", "AES")), - ("STM32WL5.*:AES:.*", ("aes", "v2", "AES")), - ("STM32WLE.*:AES:.*", ("aes", "v2", "AES")), - ("STM32U5.*:AES:.*", ("aes", "v3a", "AES")), - ("STM32(H5|WBA).*:AES:.*", ("aes", "v3b", "AES")), + (".*:AES:aes1_v1_0", ("aes", "v1", "AES")), + (".*:AES:aes2_v1_[01]", ("aes", "v2a", "AES")), + (".*:AES:aes3_v1_0_(F4|F7)", ("aes", "v2a", "AES")), + (".*:AES:aes3_v1_0.*", ("aes", "v2b", "AES")), + (".*:AES:aes3_v2_0_U5", ("aes", "v3a", "AES")), + (".*:AES:aes3_v2_0_(H5|WBA)", ("aes", "v3b", "AES")), ("STM32(H5|WBA).*:SAES:.*", ("saes", "v1a", "SAES")), ("STM32U5.*:SAES:.*", ("saes", "v1b", "SAES")), ("STM32F10[57].*:SPI:.*", ("spi", "v1_i2s", "SPI")),