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Understanding Benchmark Speed score #137
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Well LaurelinTheGold, you've raised a can of worms here. I thought the situation was unclear but explicable. However, it looks like we ended up with a discrepancy between theory (documentation) and practice. Anyhow, this is what I think is going on, I may be wrong. But whether I'm right or wrong, your point that we have a documentation problem remains valid. When got Embench working on Apple Mac I also found the documentation Before building on your comments, I want to address the number of Moving to your comments:
Clearly there is a problem with the documentation. Someone (maybe me, maybe other people) are misinterpreting it to the extent that I think people are publishing wrong results. Regarding your suggestions:
I suspect we have to change the documentation to match usage, although from a quick look at a couple of papers which use Embench it seems people quote figures relative to there own baseline, so perhaps we can keep the definitions we have and correct our published results. (Or maybe I've got things wrong here). Personally, I think we should define an Embench MIP which is the speed of a nominal 1 MIP processor running Embench (anyone want to port Embench to a vintage VAX 11/780?). This can be just a fudge factor to the reference score - if people think a 16MHz M4 is a worthy 1 MIP processor, then the reference platform would be a 16 Embench MIP platform. Finally, for V2, I think we should have a scheme where there is a per-benchmark normalisation factor |
Hi Roger, most of what you are saying makes sense but I will disagree on point 5 that normalized time ratios yields the same results as unnormalized time ratios. If the chip has a clock of C and the baseline benchmark takes N cycles, then the scaled cycles is CN and the time taken to run is CN/C=N. The normalized time to run would be N/C (C being unitless). If we set the baseline normalized time B=N_0/C_0, the ratio of the normalized times is B/(N/C)=BC/N=N_0C/(NC_0). The ratio of the real times is N/N_0=scorepermhz. Even if the baseline clock is set to 1MHz, the normalized time still gives scorepermhz*C where C is the clock speed of the chip being tested. Is there a better way of finding papers that use embench other than google scholar searching embench? I am not experienced enough in benchmarking lore to worry about V2 yet. Thanks for the reply! |
LaurelinTheGold,
You are right. Quickly thinking about my responses to 6, 7, and 8.
You being right about 5 means I don't understand how the reporting is working! Line 549 of
Not that I know of. |
@LaurelinTheGold, and @Roger-Shepherd, I also confused by the description in "Computing a benchmark value for speed" section. Here is my summary.
size
speed
The current last two paragraph:
How about change this as follows?
If you agree with me, shall I send a PR? |
I am a little confused, but this is my understanding of the speed benchmark from the readme, results, and looking at past issues.
Point 8 seems to be how the speed results are being recorded on the results repository.
Assuming this is correct, it would be helpful to update the readme to
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