@@ -615,13 +615,28 @@ void log_print_buf(const uint8_t *b, size_t len){
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*/
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unsigned long uartBaudrateDetect (uart_t * uart , bool flg )
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{
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- #ifndef CONFIG_IDF_TARGET_ESP32S3
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+
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if (uart == NULL ) {
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return 0 ;
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}
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uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
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+ #ifdef CONFIG_IDF_TARGET_ESP32S3
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+
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+ while (hw -> rxd_cnt .rxd_edge_cnt < 30 ) { // UART_PULSE_NUM(uart_num)
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+ if (flg ) return 0 ;
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+ ets_delay_us (1000 );
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+ }
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+
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+ UART_MUTEX_LOCK ();
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+ //log_i("lowpulse_min_cnt = %d hightpulse_min_cnt = %d", hw->lowpulse.min_cnt, hw->highpulse.min_cnt);
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+ unsigned long ret = (hw -> lowpulse .lowpulse_min_cnt + hw -> highpulse .highpulse_min_cnt + 2 ) / 2 ;
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+ UART_MUTEX_UNLOCK ();
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+
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+ return ret ;
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+
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+ #else
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while (hw -> rxd_cnt .edge_cnt < 30 ) { // UART_PULSE_NUM(uart_num)
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if (flg ) return 0 ;
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ets_delay_us (1000 );
@@ -633,8 +648,7 @@ unsigned long uartBaudrateDetect(uart_t *uart, bool flg)
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UART_MUTEX_UNLOCK ();
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return ret ;
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- #else
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- return 0 ;
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+
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#endif
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}
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@@ -679,6 +693,11 @@ void uartStartDetectBaudrate(uart_t *uart) {
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//hw->conf0.autobaud_en = 0;
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//hw->conf0.autobaud_en = 1;
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#elif CONFIG_IDF_TARGET_ESP32S3
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+ uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
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+ hw -> rx_filt .glitch_filt = 0x08 ;
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+ hw -> rx_filt .glitch_filt_en = 1 ;
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+ hw -> conf0 .autobaud_en = 0 ;
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+ hw -> conf0 .autobaud_en = 1 ;
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#else
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uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
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hw -> auto_baud .glitch_filt = 0x08 ;
@@ -707,23 +726,54 @@ uartDetectBaudrate(uart_t *uart)
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if (!divisor ) {
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return 0 ;
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}
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+
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// log_i(...) below has been used to check C3 baud rate detection results
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//log_i("Divisor = %d\n", divisor);
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//log_i("BAUD RATE based on Positive Pulse %d\n", getApbFrequency()/((hw->pospulse.min_cnt + 1)/2));
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//log_i("BAUD RATE based on Negative Pulse %d\n", getApbFrequency()/((hw->negpulse.min_cnt + 1)/2));
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-
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- #ifdef CONFIG_IDF_TARGET_ESP32C3
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- //hw->conf0.autobaud_en = 0;
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- #elif CONFIG_IDF_TARGET_ESP32S3
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- #else
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uart_dev_t * hw = UART_LL_GET_HW (uart -> num );
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- hw -> auto_baud .en = 0 ;
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- #endif
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+
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uartStateDetectingBaudrate = false; // Initialize for the next round
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+ unsigned long baudrate = 0 ;
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+
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+
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+ #ifdef CONFIG_IDF_TARGET_ESP32S3
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+ hw -> conf0 .autobaud_en = 0 ;
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+
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+ uart_sclk_t clk_src ;
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+ uart_ll_get_sclk (hw , & clk_src );
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+
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+ switch (clk_src )
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+ {
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+ case UART_SCLK_APB :
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+ baudrate = getApbFrequency () / divisor ;
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+ break ;
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+
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+ #if SOC_UART_SUPPORT_RTC_CLK
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+ case UART_SCLK_RTC :
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+ // baudrate = rtc_clk_slow_freq_get_hz() / divisor;
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+ log_e ("Currently unsupported clock source: UART_SCLK_RTC" );
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+ return 0 ;
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+ #endif
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+
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+ #if SOC_UART_SUPPORT_XTAL_CLK
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+ case UART_SCLK_XTAL :
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+ baudrate = (getXtalFrequencyMhz () * 1000000 ) / divisor ;
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+ break ;
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+ #endif
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+
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+ default :
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+ log_e ("You should not ended up here! Unsupported clock source: %d" , clk_src );
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+ return 0 ;
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+ }
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+
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+ #else
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+ hw -> auto_baud .en = 0 ;
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+ baudrate = getApbFrequency () / divisor ;
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+ //log_i("APB_FREQ = %d\nraw baudrate detected = %d", getApbFrequency(), baudrate);
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+ #endif
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- unsigned long baudrate = getApbFrequency () / divisor ;
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- //log_i("APB_FREQ = %d\nraw baudrate detected = %d", getApbFrequency(), baudrate);
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static const unsigned long default_rates [] = {300 , 600 , 1200 , 2400 , 4800 , 9600 , 19200 , 38400 , 57600 , 74880 , 115200 , 230400 , 256000 , 460800 , 921600 , 1843200 , 3686400 };
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