Fix some incorrect link markup

Author: ISSOtm

src/HuC1.md

@@ -14,7 +14,7 @@ Address range | Feature
   $6000–7FFF  | Nothing?
   $A000–BFFF  | Cart RAM or IR register
 
-### 0000–1FFF — IR Select [write-only]
+### 0000–1FFF — IR Select \[write-only\]
 
 Most MBCs can disable the cartridge RAM to prevent accidental writes.
 HuC1 doesn’t do this. Instead, this register swtiches the $A000–BFFF
@@ -24,21 +24,21 @@ switch to IR mode, or anything else to switch to RAM mode.
 Some HuC1 games still write $0A and $00 to this region as if it would
 enable/disable cart RAM.
 
-### 2000–3FFF — ROM Bank Number [write-only]
+### 2000–3FFF — ROM Bank Number \[write-only\]
 
 HuC1 can accept a bank number of at least 6 bits here.
 
-### 4000–5FFF — RAM Bank Select [write-only]
+### 4000–5FFF — RAM Bank Select \[write-only\]
 
 HuC1 can accept a bank number of at least 2 bits here.
 
-### 6000–7FFF — Nothing? [write-only]
+### 6000–7FFF — Nothing? \[write-only\]
 
 Writes to this region seem to have no effect. Even so, some games do
 write to this region, as if it had the same effect as on MBC1. You may
 safely ignore these writes.
 
-### A000–BFFF — Cart RAM or IR register [read/write]
+### A000–BFFF — Cart RAM or IR register \[read/write\]
 
 When in “IR mode” (wrote $0E to $0000), the IR register is visible
 here. Write to this region to control the IR transmitter. $01 turns it

src/HuC3.md

@@ -11,24 +11,24 @@ microcontroller core with internal program ROM.
 
 ## Memory
 
-### 0000–3FFF — ROM Bank 00 [read-only]
+### 0000–3FFF — ROM Bank 00 \[read-only\]
 
 Contains the first 16 KiB of the ROM.
 
-### 4000–7FFF — ROM Bank 00–7F [read-only]
+### 4000–7FFF — ROM Bank 00–7F \[read-only\]
 
 This area may contain any of the further 16 KiB banks of the ROM. Like the MBC5,
 bank $00 can also be mapped to this region.
 
-### A000–BFFF — RAM Bank 00–03, or RTC/IR register [read/write]
+### A000–BFFF — RAM Bank 00–03, or RTC/IR register \[read/write\]
 
 Depending on the current register selection and RAM Bank Number (see
 below), this memory space is used to access an 8 KiB external RAM Bank,
 or a single I/O Register.
 
 ## Memory Control Registers
 
-### 0000–1FFF — RAM/RTC/IR Select [read/write]
+### 0000–1FFF — RAM/RTC/IR Select \[read/write\]
 
 Writing to this register maps cart RAM, RTC registers or IR registers
 into memory at $A000–BFFF. Only the lower 4 bits are significant.
@@ -70,27 +70,27 @@ ignored.
 
 The RTC MCU communication protocol is described below.
 
-### $B — RTC Command/Argument [write]
+### $B — RTC Command/Argument \[write\]
 
 The value written consists of a command in bits 6-4, and an argument
 value in bits 3–0. For example the value $62 is command $6 with argument
 value $2. Writing to this register just sets the values in the mailbox
 registers – it does not cause the command to be executed.
 
-### $C — RTC Command/Response [read]
+### $C — RTC Command/Response \[read\]
 
 When read, bits 6–4 return the last command written to register $B, and
 bits 3–0 contain the result from the last command executed.
 
-### $D — RTC Semaphore [read/write]
+### $D — RTC Semaphore \[read/write\]
 
 When reading, the least significant bit is high when the RTC MCU is
 ready to receive a command, or low when the RTC MCU is busy.
 
 Writing with the least significant bit clear requests that the RTC MCU
 execute the last command written to register $B.
 
-### $E — IR [read/write]
+### $E — IR \[read/write\]
 
 Similar to the equivalent register of the HuC1. The least significant
 bit is used for infrared communication.

src/MMM01.md

@@ -36,7 +36,7 @@ On startup (in "unmapped" mode), this is mapped to the first half of the menu pr
 
 When a game is mapped, this area normally contains the first 16 KiB (bank 00) of the game ROM.
 
-If [multiplex is enabled[(<#Multiplex Enable>)], entering mode 1 allows mapping game ROM banks $20, $40, and $60 to this region.
+If [multiplex is enabled](<#Multiplex Enable>), entering mode 1 allows mapping game ROM banks $20, $40, and $60 to this region.
 
 #### Addressing diagrams
 
@@ -75,7 +75,7 @@ i.e. in mapped mode, if `(ROM Bank Low) & ~(ROM Bank Mask)` is equal to $00 (ind
 As an example, if ROM Bank Low is set to $10, and the ROM Bank Mask is set to $30, then the bank within the game ROM would be `($10) & ~($30) = $00`.
 As game bank $00 is disallowed, the low bit is forced on, mapping bank $11 instead of $10.
 
-If [multiplex is enabled[(<#Multiplex Enable>)], the MMM01 has the same limitation as MBC1 regarding accessing game ROM banks $20, $40, and $60 - they can only be mapped to 0000-3FFF (in mode 1), and not to 4000-7FFF.
+If [multiplex is enabled](<#Multiplex Enable>), the MMM01 has the same limitation as MBC1 regarding accessing game ROM banks $20, $40, and $60 - they can only be mapped to 0000-3FFF (in mode 1), and not to 4000-7FFF.
 
 #### Addressing diagrams
 
@@ -180,7 +180,7 @@ Setting these bits effectively reduces the size of the ram available to the game
 | 10   | 16 KiB   |
 | 11   | 8 KiB    |
 
-If [multiplex is enabled[(<#Multiplex Enable>)], this mask still applies to the RAM Bank Low register, even though that register is used as part of the **ROM** bank number in multiplex mode.
+If [multiplex is enabled](<#Multiplex Enable>), this mask still applies to the RAM Bank Low register, even though that register is used as part of the **ROM** bank number in multiplex mode.
 This has the effect of reducing the ROM size instead of the RAM size, as follows:
 
 | Mask | Game ROM  |
@@ -225,7 +225,7 @@ This register represents an additional two bits of ROM bank number, for game sel
 Affects both the 0000-3FFF and 4000-7FFF region.
 Can only be used for game selection, as it's not writeable once entering a game (mapped mode).
 
-If [multiplex is enabled[(<#Multiplex Enable>)], functionality is swapped with [RAM Bank Low](<#Bits 0-1: RAM Bank Low>) allowing for larger game ROM.
+If [multiplex is enabled](<#Multiplex Enable>), functionality is swapped with [RAM Bank Low](<#Bits 0-1: RAM Bank Low>) allowing for larger game ROM.
 
 ### 4000-5FFF - RAM Bank Number (Write Only)
 
@@ -243,7 +243,7 @@ Bits: X 6 5 4 3 2 1 0
 This is equivalent to the MBC1 RAM Bank register.
 It can be masked to reduce its size, reserving some bits for game select (see [RAM Bank Mask](<#Bits 4-5: RAM Bank Mask>)).
 
-If [multiplex is enabled[(<#Multiplex Enable>)], functionality is swapped with [ROM Bank Mid](<#Bits 5-6: ROM Bank Mid>) allowing for larger game ROM.
+If [multiplex is enabled](<#Multiplex Enable>), functionality is swapped with [ROM Bank Mid](<#Bits 5-6: ROM Bank Mid>) allowing for larger game ROM.
 
 #### Bits 1-2: RAM Bank High
 
@@ -330,7 +330,7 @@ Note: changing the mask can alter which bank would be mapped.
 Only the _unmasked_ bits of [ROM Bank Low](<#Bits 0-4: ROM Bank Low>) are used for the "[attempting to map bank 0 maps bank 1](<#4000-7FFF - ROM Bank $01-7F (Read Only)>)" logic, and it updates live if the ROM Bank Mask changes.
 ROM Bank Low itself doesn't change when this happens — only the value used for calculating the bank number.
 
-If [multiplex is enabled[(<#Multiplex Enable>)], the [RAM Bank Mask](<#Bits 4-5: RAM Bank Mask>) affects ROM banking as well.
+If [multiplex is enabled](<#Multiplex Enable>), the [RAM Bank Mask](<#Bits 4-5: RAM Bank Mask>) affects ROM banking as well.
 In this case the ROM Bank Mask should be set to 00000 to avoid masking bits in the _middle_ of the full game ROM bank number.
 
 #### Multiplex Enable
@@ -344,7 +344,7 @@ This is equivalent to the ["large ROM" wiring of an MBC1 cartridge](#MBC1).
 
 ## Multiplex addressing diagrams
 
-If [multiplex is enabled[(<#Multiplex Enable>)], the addressing diagrams change as follows (changes marked with `*`):
+If [multiplex is enabled](<#Multiplex Enable>), the addressing diagrams change as follows (changes marked with `*`):
 
 ### 0000-3FFF - ROM Bank X0