From 87a7258ab7975f0d7cc906fdbb9c131895c560d0 Mon Sep 17 00:00:00 2001 From: Solomon Ucko Date: Mon, 19 Sep 2022 23:13:55 -0400 Subject: [PATCH 1/2] add x86 documentation --- TheTechTree.md | 2 ++ 1 file changed, 2 insertions(+) diff --git a/TheTechTree.md b/TheTechTree.md index eb1d880e575..63c333a8fbb 100644 --- a/TheTechTree.md +++ b/TheTechTree.md @@ -279,6 +279,8 @@ _RISC-V Specifications_ by the RISC-V International Technical Committee _Learning FPGAs_ by Justin Rajewski (O'Reilly) +_Intel® 64 and IA-32 Architectures Software Developer’s Manual Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D, and 4_ (Intel) + ## Hardware development _Digital Computer Electronics_ by Albert P. Malvino and Jerald A Brown (Career Education) From 260b6a6b688a23721cffa144b35336c9602a45fa Mon Sep 17 00:00:00 2001 From: Solomon Ucko Date: Mon, 19 Sep 2022 23:17:03 -0400 Subject: [PATCH 2/2] update publisher for Intel manual to Lulu --- TheTechTree.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/TheTechTree.md b/TheTechTree.md index 63c333a8fbb..3189a54bd5b 100644 --- a/TheTechTree.md +++ b/TheTechTree.md @@ -279,7 +279,7 @@ _RISC-V Specifications_ by the RISC-V International Technical Committee _Learning FPGAs_ by Justin Rajewski (O'Reilly) -_Intel® 64 and IA-32 Architectures Software Developer’s Manual Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D, and 4_ (Intel) +_Intel® 64 and IA-32 Architectures Software Developer’s Manual Combined Volumes: 1, 2A, 2B, 2C, 2D, 3A, 3B, 3C, 3D, and 4_ (Lulu) ## Hardware development