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OracleLabsAutomationmarwan-hallaoui
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[GR-67254] Merge in jdk-25+28 (25.0)
PullRequest: labsjdk-ce/188
2 parents d5db35b + 957d6d9 commit 9a7dbc0

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‎make/autoconf/configure‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
#!/bin/bash
22
#
3-
# Copyright (c) 2012, 2023, Oracle and/or its affiliates. All rights reserved.
3+
# Copyright (c) 2012, 2025, Oracle and/or its affiliates. All rights reserved.
44
# DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
55
#
66
# This code is free software; you can redistribute it and/or modify it
@@ -366,7 +366,7 @@ EOT
366366
367367
# Print additional help, e.g. a list of toolchains and JVM features.
368368
# This must be done by the autoconf script.
369-
( CONFIGURE_PRINT_ADDITIONAL_HELP=true . $generated_script PRINTF=printf )
369+
( CONFIGURE_PRINT_ADDITIONAL_HELP=true . $generated_script PRINTF=printf ECHO=echo )
370370
371371
cat <<EOT
372372

‎src/hotspot/cpu/riscv/c2_MacroAssembler_riscv.cpp‎

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2170,15 +2170,13 @@ void C2_MacroAssembler::enc_cmove_cmp_fp(int cmpFlag, FloatRegister op1, FloatRe
21702170
cmov_cmp_fp_le(op1, op2, dst, src, is_single);
21712171
break;
21722172
case BoolTest::ge:
2173-
assert(false, "Should go to BoolTest::le case");
2174-
ShouldNotReachHere();
2173+
cmov_cmp_fp_ge(op1, op2, dst, src, is_single);
21752174
break;
21762175
case BoolTest::lt:
21772176
cmov_cmp_fp_lt(op1, op2, dst, src, is_single);
21782177
break;
21792178
case BoolTest::gt:
2180-
assert(false, "Should go to BoolTest::lt case");
2181-
ShouldNotReachHere();
2179+
cmov_cmp_fp_gt(op1, op2, dst, src, is_single);
21822180
break;
21832181
default:
21842182
assert(false, "unsupported compare condition");

‎src/hotspot/cpu/riscv/macroAssembler_riscv.cpp‎

Lines changed: 64 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -1268,12 +1268,19 @@ void MacroAssembler::cmov_gtu(Register cmp1, Register cmp2, Register dst, Regist
12681268
}
12691269

12701270
// ----------- cmove, compare float -----------
1271+
//
1272+
// For CmpF/D + CMoveI/L, ordered ones are quite straight and simple,
1273+
// so, just list behaviour of unordered ones as follow.
1274+
//
1275+
// Set dst (CMoveI (Binary cop (CmpF/D op1 op2)) (Binary dst src))
1276+
// (If one or both inputs to the compare are NaN, then)
1277+
// 1. (op1 lt op2) => true => CMove: dst = src
1278+
// 2. (op1 le op2) => true => CMove: dst = src
1279+
// 3. (op1 gt op2) => false => CMove: dst = dst
1280+
// 4. (op1 ge op2) => false => CMove: dst = dst
1281+
// 5. (op1 eq op2) => false => CMove: dst = dst
1282+
// 6. (op1 ne op2) => true => CMove: dst = src
12711283

1272-
// Move src to dst only if cmp1 == cmp2,
1273-
// otherwise leave dst unchanged, including the case where one of them is NaN.
1274-
// Clarification:
1275-
// java code : cmp1 != cmp2 ? dst : src
1276-
// transformed to : CMove dst, (cmp1 eq cmp2), dst, src
12771284
void MacroAssembler::cmov_cmp_fp_eq(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
12781285
if (UseZicond) {
12791286
if (is_single) {
@@ -1289,7 +1296,7 @@ void MacroAssembler::cmov_cmp_fp_eq(FloatRegister cmp1, FloatRegister cmp2, Regi
12891296
Label no_set;
12901297
if (is_single) {
12911298
// jump if cmp1 != cmp2, including the case of NaN
1292-
// not jump (i.e. move src to dst) if cmp1 == cmp2
1299+
// fallthrough (i.e. move src to dst) if cmp1 == cmp2
12931300
float_bne(cmp1, cmp2, no_set);
12941301
} else {
12951302
double_bne(cmp1, cmp2, no_set);
@@ -1298,11 +1305,6 @@ void MacroAssembler::cmov_cmp_fp_eq(FloatRegister cmp1, FloatRegister cmp2, Regi
12981305
bind(no_set);
12991306
}
13001307

1301-
// Keep dst unchanged only if cmp1 == cmp2,
1302-
// otherwise move src to dst, including the case where one of them is NaN.
1303-
// Clarification:
1304-
// java code : cmp1 == cmp2 ? dst : src
1305-
// transformed to : CMove dst, (cmp1 ne cmp2), dst, src
13061308
void MacroAssembler::cmov_cmp_fp_ne(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
13071309
if (UseZicond) {
13081310
if (is_single) {
@@ -1318,7 +1320,7 @@ void MacroAssembler::cmov_cmp_fp_ne(FloatRegister cmp1, FloatRegister cmp2, Regi
13181320
Label no_set;
13191321
if (is_single) {
13201322
// jump if cmp1 == cmp2
1321-
// not jump (i.e. move src to dst) if cmp1 != cmp2, including the case of NaN
1323+
// fallthrough (i.e. move src to dst) if cmp1 != cmp2, including the case of NaN
13221324
float_beq(cmp1, cmp2, no_set);
13231325
} else {
13241326
double_beq(cmp1, cmp2, no_set);
@@ -1327,14 +1329,6 @@ void MacroAssembler::cmov_cmp_fp_ne(FloatRegister cmp1, FloatRegister cmp2, Regi
13271329
bind(no_set);
13281330
}
13291331

1330-
// When cmp1 <= cmp2 or any of them is NaN then dst = src, otherwise, dst = dst
1331-
// Clarification
1332-
// scenario 1:
1333-
// java code : cmp2 < cmp1 ? dst : src
1334-
// transformed to : CMove dst, (cmp1 le cmp2), dst, src
1335-
// scenario 2:
1336-
// java code : cmp1 > cmp2 ? dst : src
1337-
// transformed to : CMove dst, (cmp1 le cmp2), dst, src
13381332
void MacroAssembler::cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
13391333
if (UseZicond) {
13401334
if (is_single) {
@@ -1350,7 +1344,7 @@ void MacroAssembler::cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Regi
13501344
Label no_set;
13511345
if (is_single) {
13521346
// jump if cmp1 > cmp2
1353-
// not jump (i.e. move src to dst) if cmp1 <= cmp2 or either is NaN
1347+
// fallthrough (i.e. move src to dst) if cmp1 <= cmp2 or either is NaN
13541348
float_bgt(cmp1, cmp2, no_set);
13551349
} else {
13561350
double_bgt(cmp1, cmp2, no_set);
@@ -1359,14 +1353,30 @@ void MacroAssembler::cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Regi
13591353
bind(no_set);
13601354
}
13611355

1362-
// When cmp1 < cmp2 or any of them is NaN then dst = src, otherwise, dst = dst
1363-
// Clarification
1364-
// scenario 1:
1365-
// java code : cmp2 <= cmp1 ? dst : src
1366-
// transformed to : CMove dst, (cmp1 lt cmp2), dst, src
1367-
// scenario 2:
1368-
// java code : cmp1 >= cmp2 ? dst : src
1369-
// transformed to : CMove dst, (cmp1 lt cmp2), dst, src
1356+
void MacroAssembler::cmov_cmp_fp_ge(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
1357+
if (UseZicond) {
1358+
if (is_single) {
1359+
fle_s(t0, cmp2, cmp1);
1360+
} else {
1361+
fle_d(t0, cmp2, cmp1);
1362+
}
1363+
czero_nez(dst, dst, t0);
1364+
czero_eqz(t0 , src, t0);
1365+
orr(dst, dst, t0);
1366+
return;
1367+
}
1368+
Label no_set;
1369+
if (is_single) {
1370+
// jump if cmp1 < cmp2 or either is NaN
1371+
// fallthrough (i.e. move src to dst) if cmp1 >= cmp2
1372+
float_blt(cmp1, cmp2, no_set, false, true);
1373+
} else {
1374+
double_blt(cmp1, cmp2, no_set, false, true);
1375+
}
1376+
mv(dst, src);
1377+
bind(no_set);
1378+
}
1379+
13701380
void MacroAssembler::cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
13711381
if (UseZicond) {
13721382
if (is_single) {
@@ -1382,7 +1392,7 @@ void MacroAssembler::cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Regi
13821392
Label no_set;
13831393
if (is_single) {
13841394
// jump if cmp1 >= cmp2
1385-
// not jump (i.e. move src to dst) if cmp1 < cmp2 or either is NaN
1395+
// fallthrough (i.e. move src to dst) if cmp1 < cmp2 or either is NaN
13861396
float_bge(cmp1, cmp2, no_set);
13871397
} else {
13881398
double_bge(cmp1, cmp2, no_set);
@@ -1391,6 +1401,30 @@ void MacroAssembler::cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Regi
13911401
bind(no_set);
13921402
}
13931403

1404+
void MacroAssembler::cmov_cmp_fp_gt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single) {
1405+
if (UseZicond) {
1406+
if (is_single) {
1407+
flt_s(t0, cmp2, cmp1);
1408+
} else {
1409+
flt_d(t0, cmp2, cmp1);
1410+
}
1411+
czero_nez(dst, dst, t0);
1412+
czero_eqz(t0 , src, t0);
1413+
orr(dst, dst, t0);
1414+
return;
1415+
}
1416+
Label no_set;
1417+
if (is_single) {
1418+
// jump if cmp1 <= cmp2 or either is NaN
1419+
// fallthrough (i.e. move src to dst) if cmp1 > cmp2
1420+
float_ble(cmp1, cmp2, no_set, false, true);
1421+
} else {
1422+
double_ble(cmp1, cmp2, no_set, false, true);
1423+
}
1424+
mv(dst, src);
1425+
bind(no_set);
1426+
}
1427+
13941428
// Float compare branch instructions
13951429

13961430
#define INSN(NAME, FLOATCMP, BRANCH) \

‎src/hotspot/cpu/riscv/macroAssembler_riscv.hpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -660,7 +660,9 @@ class MacroAssembler: public Assembler {
660660
void cmov_cmp_fp_eq(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
661661
void cmov_cmp_fp_ne(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
662662
void cmov_cmp_fp_le(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
663+
void cmov_cmp_fp_ge(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
663664
void cmov_cmp_fp_lt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
665+
void cmov_cmp_fp_gt(FloatRegister cmp1, FloatRegister cmp2, Register dst, Register src, bool is_single);
664666

665667
public:
666668
// We try to follow risc-v asm menomics.

‎src/hotspot/cpu/x86/stubDeclarations_x86.hpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -239,7 +239,7 @@
239239
do_arch_blob, \
240240
do_arch_entry, \
241241
do_arch_entry_init) \
242-
do_arch_blob(final, 31000 \
242+
do_arch_blob(final, 33000 \
243243
WINDOWS_ONLY(+22000) ZGC_ONLY(+20000)) \
244244

245245
#endif // CPU_X86_STUBDECLARATIONS_HPP

‎src/hotspot/cpu/x86/vm_version_x86.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2111,7 +2111,7 @@ bool VM_Version::is_intel_cascade_lake() {
21112111
// has improved implementation of 64-byte load/stores and so the default
21122112
// threshold is set to 0 for these platforms.
21132113
int VM_Version::avx3_threshold() {
2114-
return (is_intel_family_core() &&
2114+
return (is_intel_server_family() &&
21152115
supports_serialize() &&
21162116
FLAG_IS_DEFAULT(AVX3Threshold)) ? 0 : AVX3Threshold;
21172117
}

‎src/hotspot/cpu/x86/x86_64.ad‎

Lines changed: 10 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -10527,7 +10527,8 @@ instruct xorI_rReg_im1_ndd(rRegI dst, rRegI src, immI_M1 imm)
1052710527
// Xor Register with Immediate
1052810528
instruct xorI_rReg_imm(rRegI dst, immI src, rFlagsReg cr)
1052910529
%{
10530-
predicate(!UseAPX);
10530+
// Strict predicate check to make selection of xorI_rReg_im1 cost agnostic if immI src is -1.
10531+
predicate(!UseAPX && n->in(2)->bottom_type()->is_int()->get_con() != -1);
1053110532
match(Set dst (XorI dst src));
1053210533
effect(KILL cr);
1053310534
flag(PD::Flag_sets_sign_flag, PD::Flag_sets_zero_flag, PD::Flag_sets_parity_flag, PD::Flag_clears_overflow_flag, PD::Flag_clears_carry_flag);
@@ -10541,7 +10542,8 @@ instruct xorI_rReg_imm(rRegI dst, immI src, rFlagsReg cr)
1054110542

1054210543
instruct xorI_rReg_rReg_imm_ndd(rRegI dst, rRegI src1, immI src2, rFlagsReg cr)
1054310544
%{
10544-
predicate(UseAPX);
10545+
// Strict predicate check to make selection of xorI_rReg_im1_ndd cost agnostic if immI src2 is -1.
10546+
predicate(UseAPX && n->in(2)->bottom_type()->is_int()->get_con() != -1);
1054510547
match(Set dst (XorI src1 src2));
1054610548
effect(KILL cr);
1054710549
flag(PD::Flag_sets_sign_flag, PD::Flag_sets_zero_flag, PD::Flag_sets_parity_flag, PD::Flag_clears_overflow_flag, PD::Flag_clears_carry_flag);
@@ -10559,6 +10561,7 @@ instruct xorI_rReg_mem_imm_ndd(rRegI dst, memory src1, immI src2, rFlagsReg cr)
1055910561
predicate(UseAPX);
1056010562
match(Set dst (XorI (LoadI src1) src2));
1056110563
effect(KILL cr);
10564+
ins_cost(150);
1056210565
flag(PD::Flag_sets_sign_flag, PD::Flag_sets_zero_flag, PD::Flag_sets_parity_flag, PD::Flag_clears_overflow_flag, PD::Flag_clears_carry_flag);
1056310566

1056410567
format %{ "exorl $dst, $src1, $src2\t# int ndd" %}
@@ -11201,7 +11204,8 @@ instruct xorL_rReg_im1_ndd(rRegL dst,rRegL src, immL_M1 imm)
1120111204
// Xor Register with Immediate
1120211205
instruct xorL_rReg_imm(rRegL dst, immL32 src, rFlagsReg cr)
1120311206
%{
11204-
predicate(!UseAPX);
11207+
// Strict predicate check to make selection of xorL_rReg_im1 cost agnostic if immL32 src is -1.
11208+
predicate(!UseAPX && n->in(2)->bottom_type()->is_long()->get_con() != -1L);
1120511209
match(Set dst (XorL dst src));
1120611210
effect(KILL cr);
1120711211
flag(PD::Flag_sets_sign_flag, PD::Flag_sets_zero_flag, PD::Flag_sets_parity_flag, PD::Flag_clears_overflow_flag, PD::Flag_clears_carry_flag);
@@ -11215,7 +11219,8 @@ instruct xorL_rReg_imm(rRegL dst, immL32 src, rFlagsReg cr)
1121511219

1121611220
instruct xorL_rReg_rReg_imm(rRegL dst, rRegL src1, immL32 src2, rFlagsReg cr)
1121711221
%{
11218-
predicate(UseAPX);
11222+
// Strict predicate check to make selection of xorL_rReg_im1_ndd cost agnostic if immL32 src2 is -1.
11223+
predicate(UseAPX && n->in(2)->bottom_type()->is_long()->get_con() != -1L);
1121911224
match(Set dst (XorL src1 src2));
1122011225
effect(KILL cr);
1122111226
flag(PD::Flag_sets_sign_flag, PD::Flag_sets_zero_flag, PD::Flag_sets_parity_flag, PD::Flag_clears_overflow_flag, PD::Flag_clears_carry_flag);
@@ -11234,6 +11239,7 @@ instruct xorL_rReg_mem_imm(rRegL dst, memory src1, immL32 src2, rFlagsReg cr)
1123411239
match(Set dst (XorL (LoadL src1) src2));
1123511240
effect(KILL cr);
1123611241
flag(PD::Flag_sets_sign_flag, PD::Flag_sets_zero_flag, PD::Flag_sets_parity_flag, PD::Flag_clears_overflow_flag, PD::Flag_clears_carry_flag);
11242+
ins_cost(150);
1123711243

1123811244
format %{ "exorq $dst, $src1, $src2\t# long ndd" %}
1123911245
ins_encode %{

‎src/hotspot/share/c1/c1_ValueMap.hpp‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/*
2-
* Copyright (c) 1999, 2023, Oracle and/or its affiliates. All rights reserved.
2+
* Copyright (c) 1999, 2025, Oracle and/or its affiliates. All rights reserved.
33
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
44
*
55
* This code is free software; you can redistribute it and/or modify it
@@ -187,7 +187,13 @@ class ValueNumberingVisitor: public InstructionVisitor {
187187
void do_Convert (Convert* x) { /* nothing to do */ }
188188
void do_NullCheck (NullCheck* x) { /* nothing to do */ }
189189
void do_TypeCast (TypeCast* x) { /* nothing to do */ }
190-
void do_NewInstance (NewInstance* x) { /* nothing to do */ }
190+
void do_NewInstance (NewInstance* x) {
191+
ciInstanceKlass* c = x->klass();
192+
if (c != nullptr && !c->is_initialized() &&
193+
(!c->is_loaded() || c->has_class_initializer())) {
194+
kill_memory();
195+
}
196+
}
191197
void do_NewTypeArray (NewTypeArray* x) { /* nothing to do */ }
192198
void do_NewObjectArray (NewObjectArray* x) { /* nothing to do */ }
193199
void do_NewMultiArray (NewMultiArray* x) { /* nothing to do */ }

‎src/hotspot/share/ci/ciInstanceKlass.cpp‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -549,6 +549,11 @@ bool ciInstanceKlass::compute_has_trusted_loader() {
549549
return java_lang_ClassLoader::is_trusted_loader(loader_oop);
550550
}
551551

552+
bool ciInstanceKlass::has_class_initializer() {
553+
VM_ENTRY_MARK;
554+
return get_instanceKlass()->class_initializer() != nullptr;
555+
}
556+
552557
// ------------------------------------------------------------------
553558
// ciInstanceKlass::find_method
554559
//

‎src/hotspot/share/ci/ciInstanceKlass.hpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -231,6 +231,8 @@ class ciInstanceKlass : public ciKlass {
231231
ciInstanceKlass* unique_concrete_subklass();
232232
bool has_finalizable_subclass();
233233

234+
bool has_class_initializer();
235+
234236
bool contains_field_offset(int offset);
235237

236238
// Get the instance of java.lang.Class corresponding to

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