diff --git a/src/mips/common/hardware/hwregs.h b/src/mips/common/hardware/hwregs.h index 7e0e1087f..effcfc087 100644 --- a/src/mips/common/hardware/hwregs.h +++ b/src/mips/common/hardware/hwregs.h @@ -30,17 +30,6 @@ SOFTWARE. #include "common/hardware/counters.h" -struct SIO { - uint8_t fifo; - uint8_t preview[3]; - uint16_t stat; - uint16_t padding; - uint16_t mode; - uint16_t ctrl; - uint16_t reserved; - uint16_t baudRate; -}; - #define HW_U8(x) (*(volatile uint8_t *)(x)) #define HW_U16(x) (*(volatile uint16_t *)(x)) #define HW_U32(x) (*(volatile uint32_t *)(x)) @@ -52,8 +41,6 @@ struct SIO { #define SBUS_DEV5_CTRL HW_U32(0x1f801018) #define SBUS_COM_CTRL HW_U32(0x1f801020) -#define SIOS ((volatile struct SIO *)0x1f801040) - #define RAM_SIZE HW_U32(0x1f801060) #define IREG HW_U32(0xbf801070) diff --git a/src/mips/common/hardware/sio.h b/src/mips/common/hardware/sio.h new file mode 100644 index 000000000..1c2bdb8cb --- /dev/null +++ b/src/mips/common/hardware/sio.h @@ -0,0 +1,79 @@ +/* + +MIT License + +Copyright (c) 2020 PCSX-Redux authors + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. + +*/ + +#pragma once + +#include +#include "common/hardware/irq.h" + +struct SIOPort { + uint8_t fifo; + uint8_t preview[3]; + uint16_t stat; + uint16_t padding; + uint16_t mode; + uint16_t ctrl; + uint16_t reserved; + uint16_t baudRate; +}; + +#define SIOS ((volatile struct SIOPort *)0x1f801040) + +enum { + SIO_CTRL_TXEN = (1 << 0), // Transmit Enable + SIO_CTRL_DTR = (1 << 1), // Data Terminal Ready, aka Select (output) + SIO_CTRL_RXE = (1 << 2), // Receive Enable + SIO_CTRL_SBRK = (1 << 3), // Send Break character + SIO_CTRL_ERRRES = (1 << 4), // Error Reset + SIO_CTRL_RTS = (1 << 5), // Request to Send (output) + SIO_CTRL_IR = (1 << 6), // Internal Reset, resets most SIO registers + SIO_CTRL_RXIRQMODE = (1 << 8), // Receive IRQ Mode (0..3 = IRQ when RX FIFO contains 1,2,4,8 bytes) + SIO_CTRL_TXIRQEN = (1 << 10), // Transmit IRQ Enable + SIO_CTRL_RXIRQEN = (1 << 11), // Receive IRQ Enable + SIO_CTRL_ACKIRQEN = (1 << 12), // Acknowledge IRQ Enable + SIO_CTRL_PORTSEL = (1 << 13), // Port Select +}; + +enum { + SIO_STAT_TXRDY = (1 << 0), // TX buffer is empty + SIO_STAT_RXRDY = (1 << 1), // RX buffer has data + SIO_STAT_TXEMPTY = (1 << 2), // No data in TX buffer + SIO_STAT_PE = (1 << 3), // Parity Error + SIO_STAT_OE = (1 << 4), // Overrun Error + SIO_STAT_FE = (1 << 5), // Framing Error + SIO_STAT_SYNDET = (1 << 6), // Sync Detect + SIO_STAT_ACK = (1 << 7), // ACK signal level (input) + SIO_STAT_CTS = (1 << 8), // Clear to Send (output), unused on SIO0 + SIO_STAT_IRQ = (1 << 9), // Interrupt Request +}; + +static inline uint8_t __attribute__((always_inline)) exchangeByte(uint8_t b) { + uint8_t ret = SIOS[0].fifo; // may throw away + SIOS[0].fifo = b; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; + IREG = ~IRQ_CONTROLLER; + return ret; +} \ No newline at end of file diff --git a/src/mips/common/hardware/sio1.c b/src/mips/common/hardware/sio1.c deleted file mode 100644 index cfb3e8ca8..000000000 --- a/src/mips/common/hardware/sio1.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - -MIT License - -Copyright (c) 2019 PCSX-Redux authors - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. - -*/ - -#include "common/hardware/sio1.h" - -#include "common/hardware/hwregs.h" - -void sio1_init() { - // TX and RX enabled, all other bits disabled - // RTS on (for systems that loop it back to CTS, e.g. 573) - SIO1_CTRL = 0x25; - // 01001110 - // Baudrate Reload Factor: MUL16 (2) - // Character length: 8 (3) - // Parity Disabled - // Parity Type: irrelevant - // Stop bit length: 1 (1) - // --> 8N1 - SIO1_MODE = 0x4e; - SIO1_BAUD = 2073600 / 115200; -} - -void sio1_putc(uint8_t byte) { - while ((SIO1_STAT & 1) == 0); - SIO1_DATA = byte; -} diff --git a/src/mips/common/hardware/sio1.h b/src/mips/common/hardware/sio1.h deleted file mode 100644 index 08d49728f..000000000 --- a/src/mips/common/hardware/sio1.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - -MIT License - -Copyright (c) 2019 PCSX-Redux authors - -Permission is hereby granted, free of charge, to any person obtaining a copy -of this software and associated documentation files (the "Software"), to deal -in the Software without restriction, including without limitation the rights -to use, copy, modify, merge, publish, distribute, sublicense, and/or sell -copies of the Software, and to permit persons to whom the Software is -furnished to do so, subject to the following conditions: - -The above copyright notice and this permission notice shall be included in all -copies or substantial portions of the Software. - -THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR -IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, -FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE -AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER -LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, -OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE -SOFTWARE. - -*/ - -#pragma once - -#include - -#include "common/hardware/hwregs.h" - -#define SIO1_DATA HW_U8(0x1f801050) -#define SIO1_STAT HW_U16(0x1f801054) -#define SIO1_MODE HW_U16(0x1f801058) -#define SIO1_CTRL HW_U16(0x1f80105a) -#define SIO1_BAUD HW_U16(0x1f80105e) - -void sio1_init(); -void sio1_putc(uint8_t byte); diff --git a/src/mips/openbios/Makefile b/src/mips/openbios/Makefile index c3f8d7082..9d2978e44 100644 --- a/src/mips/openbios/Makefile +++ b/src/mips/openbios/Makefile @@ -5,7 +5,6 @@ TARGET = openbios TYPE = bin SRCS = \ -../common/hardware/sio1.c \ ../common/psxlibc/fastmemset.s \ boot/$(BOARD).s \ card/backupunit.c \ diff --git a/src/mips/openbios/sio0/card.c b/src/mips/openbios/sio0/card.c index a08ea55b6..70f664e6a 100644 --- a/src/mips/openbios/sio0/card.c +++ b/src/mips/openbios/sio0/card.c @@ -30,6 +30,7 @@ SOFTWARE. #include "common/hardware/hwregs.h" #include "common/hardware/irq.h" +#include "common/hardware/sio.h" #include "common/kernel/events.h" #include "common/syscalls/syscalls.h" #include "openbios/kernel/events.h" @@ -95,25 +96,17 @@ int __attribute__((section(".ramtext"))) mcReadHandler() { switch (g_mcOperation) { case 1: - g_sio0Mask = port == 0 ? 0x0000 : 0x2000; - SIOS[0].ctrl = g_sio0Mask | 0x1003; - SIOS[0].fifo; // throw away - SIOS[0].fifo = (g_mcDeviceId[port] & 0x0f) + 0x81; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + g_sio0Mask = port == 0 ? 0x0000 : SIO_CTRL_PORTSEL; + SIOS[0].ctrl = g_sio0Mask | SIO_CTRL_TXEN | SIO_CTRL_ACKIRQEN + | SIO_CTRL_DTR; + exchangeByte((g_mcDeviceId[port] & 0x0f) + 0x81); g_mcActionInProgress = 1; break; case 2: - SIOS[0].fifo; // throw away - SIOS[0].fifo = 'R'; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte('R'); break; case 3: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (g_skipErrorOnNewCard) return 0; if ((b & 0x08) == 0) return 0; g_skipErrorOnNewCard = 0; // durr? @@ -125,77 +118,47 @@ int __attribute__((section(".ramtext"))) mcReadHandler() { return -1; break; case 4: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != 0x5a) return -1; break; case 5: - b = SIOS[0].fifo; - SIOS[0].fifo = sector >> 8; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(sector >> 8); if (b != 0x5d) return -1; break; case 6: - SIOS[0].fifo; // throw away - SIOS[0].fifo = sector; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte(sector); break; case 7: - SIOS[0].fifo; // throw away - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte(0); break; case 8: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != 0x5c) return -1; break; case 9: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != 0x5d) return -1; break; case 10: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != (sector >> 8)) return -1; g_mcChecksum[port] = (sector ^ (sector >> 8)) & 0xff; s_mcCommand[port] = 0; break; case 11: - b = SIOS[0].fifo; - SIOS[0].fifo = s_mcCommand[port]; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(s_mcCommand[port]); if (b != (sector & 0xff)) return -1; g_mcFastTrackActive = 1; break; case 12: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); buffer[0x7f] = b; g_mcChecksum[port] ^= b; break; case 13: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != g_mcChecksum[port]) return -1; - while ((SIOS[0].stat & 2) == 0); + while ((SIOS[0].stat & SIO_STAT_RXRDY) == 0); return SIOS[0].fifo == 0x47 ? 1 : -1; default: return -1; @@ -212,25 +175,17 @@ int __attribute__((section(".ramtext"))) mcWriteHandler() { switch (g_mcOperation) { case 1: - g_sio0Mask = port == 0 ? 0x0000 : 0x2000; - SIOS[0].ctrl = g_sio0Mask | 0x1003; - SIOS[0].fifo; // throw away - SIOS[0].fifo = (g_mcDeviceId[port] & 0x0f) + 0x81; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + g_sio0Mask = port == 0 ? 0x0000 : SIO_CTRL_PORTSEL; + SIOS[0].ctrl = g_sio0Mask | SIO_CTRL_TXEN | SIO_CTRL_ACKIRQEN + | SIO_CTRL_DTR; + exchangeByte((g_mcDeviceId[port] & 0x0f) + 0x81); g_mcActionInProgress = 1; break; case 2: - SIOS[0].fifo; // throw away - SIOS[0].fifo = 'W'; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte('W'); break; case 3: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); s_mcFlagByte[port] = b; if (g_skipErrorOnNewCard) return 0; if ((b & 0x08) == 0) return 0; @@ -243,55 +198,34 @@ int __attribute__((section(".ramtext"))) mcWriteHandler() { return -1; break; case 4: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != 0x5a) return -1; break; case 5: - b = SIOS[0].fifo; - SIOS[0].fifo = sector >> 8; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(sector >> 8); if (b != 0x5d) return -1; g_mcChecksum[port] = sector >> 8; break; case 6: - SIOS[0].fifo; // throw away - SIOS[0].fifo = sector & 0xff; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte(sector & 0xff); g_mcChecksum[port] ^= sector & 0xff; g_mcFastTrackActive = 1; break; case 7: SIOS[0].fifo; // throw away - SIOS[0].fifo; // throw away - SIOS[0].fifo = g_mcChecksum[port]; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte(g_mcChecksum[port]); break; case 8: - SIOS[0].fifo; // throw away - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte(0); break; case 9: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != 0x5c) return -1; break; case 10: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; - IREG = ~IRQ_CONTROLLER; + b = exchangeByte(0); if (b != 0x5d) return -1; - while ((SIOS[0].stat & 2) == 0); + while ((SIOS[0].stat & SIO_STAT_RXRDY) == 0); if (!g_skipErrorOnNewCard && ((s_mcFlagByte[port] & 4) != 0)) { g_mcLastPort = g_mcPortFlipping; g_skipErrorOnNewCard = 0; // whyyyy @@ -314,28 +248,20 @@ int __attribute__((section(".ramtext"))) mcInfoHandler() { port = g_mcPortFlipping; switch (g_mcOperation) { case 1: - g_sio0Mask = port == 0 ? 0x0000 : 0x2000; - SIOS[0].ctrl = g_sio0Mask | 0x1003; - SIOS[0].fifo; // throw away - SIOS[0].fifo = (g_mcDeviceId[port] & 0x0f) + 0x81; - SIOS[0].ctrl = SIOS[0].ctrl | 0x0010; - IREG = ~IRQ_CONTROLLER; + g_sio0Mask = port == 0 ? 0x0000 : SIO_CTRL_PORTSEL; + SIOS[0].ctrl = g_sio0Mask | SIO_CTRL_TXEN | SIO_CTRL_ACKIRQEN + | SIO_CTRL_DTR; + exchangeByte((g_mcDeviceId[port] & 0x0f) + 0x81); g_mcActionInProgress = 1; break; case 2: - SIOS[0].fifo; // throw away - SIOS[0].fifo = 'R'; - SIOS[0].ctrl = SIOS[0].ctrl | 0x0010; - IREG = ~IRQ_CONTROLLER; + exchangeByte('R'); break; case 3: - b = SIOS[0].fifo; - SIOS[0].fifo = 0; - SIOS[0].ctrl = SIOS[0].ctrl | 0x0010; - IREG = ~IRQ_CONTROLLER; + + b = exchangeByte(0); if (g_skipErrorOnNewCard) return 0; if ((b & 0x0c) == 0) break; - g_skipErrorOnNewCard = 0; g_mcFlags[port] = 1; g_mcLastPort = g_mcPortFlipping; @@ -351,7 +277,7 @@ int __attribute__((section(".ramtext"))) mcInfoHandler() { case 4: b = SIOS[0].fifo; if (!g_mcCardInfoPatchActivated) SIOS[0].fifo = 0; - SIOS[0].ctrl |= 0x0010; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; IREG = ~IRQ_CONTROLLER; return (b == 0x5a) ? 1 : -1; default: diff --git a/src/mips/openbios/sio0/driver.c b/src/mips/openbios/sio0/driver.c index e33dba5f3..b846e440f 100644 --- a/src/mips/openbios/sio0/driver.c +++ b/src/mips/openbios/sio0/driver.c @@ -26,6 +26,7 @@ SOFTWARE. #include "common/hardware/hwregs.h" #include "common/hardware/irq.h" +#include "common/hardware/sio.h" #include "common/kernel/events.h" #include "common/psxlibc/string.h" #include "common/syscalls/syscalls.h" @@ -95,7 +96,7 @@ static void __attribute__((section(".ramtext"))) padAbort(int pad) { padBuffer[0] = 0xff; if (s_disable_slotChangeOnAbort) { - SIOS[0].ctrl = pad ? 0x2002 : 0x0002; + SIOS[0].ctrl = SIO_CTRL_DTR | (pad ? SIO_CTRL_PORTSEL : 0x0000); busyloop(10); } SIOS[0].ctrl = 0; @@ -105,21 +106,21 @@ static uint32_t __attribute__((section(".ramtext"))) readPad(int pad) { uint8_t** padBufferPtr = &s_padBufferPtrs[pad]; uint8_t* padBuffer = *padBufferPtr; padBuffer[0] = 0xff; - uint16_t mask = pad == 0 ? 0x0000 : 0x2000; - SIOS[0].ctrl = mask | 2; + uint16_t mask = pad == 0 ? 0x0000 : SIO_CTRL_PORTSEL; + SIOS[0].ctrl = mask | SIO_CTRL_DTR; uint8_t* padOutputBuffer = s_padOutputBuffers[pad]; // always NULL // this test is reversed in retail; first dereference, then test for NULL int doPadOutput = padOutputBuffer && *padOutputBuffer ? -1 : 0; SIOS[0].fifo; // throw away busyloop(40); - SIOS[0].ctrl = mask | 0x1003; - while (!(SIOS[0].stat & 1)); + SIOS[0].ctrl = mask | SIO_CTRL_TXEN | SIO_CTRL_DTR | SIO_CTRL_ACKIRQEN; + while (!(SIOS[0].stat & SIO_STAT_TXRDY)); g_sio0Mask = mask; SIOS[0].fifo = 1; busyloop(20); - SIOS[0].ctrl |= 0x10; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; IREG = ~IRQ_CONTROLLER; - while (!(SIOS[0].stat & 2)); + while (!(SIOS[0].stat & SIO_STAT_RXRDY)); SIOS[0].fifo; // throw away busyloop(40); @@ -133,10 +134,10 @@ static uint32_t __attribute__((section(".ramtext"))) readPad(int pad) { SIOS[0].fifo = 0x42; busyloop(25); - SIOS[0].ctrl |= 0x10; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; IREG = ~IRQ_CONTROLLER; - while (!(SIOS[0].stat & 2)); + while (!(SIOS[0].stat & SIO_STAT_RXRDY)); uint32_t fifoBytes = SIOS[0].fifo; padBuffer[1] = fifoBytes & 0xff; fifoBytes &= 0x0f; @@ -153,10 +154,10 @@ static uint32_t __attribute__((section(".ramtext"))) readPad(int pad) { SIOS[0].fifo = 0; busyloop(20); - SIOS[0].ctrl |= 0x10; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; IREG = ~IRQ_CONTROLLER; - while (!(SIOS[0].stat & 2)); + while (!(SIOS[0].stat & SIO_STAT_RXRDY)); if (SIOS[0].fifo != 0x5a) { padAbort(pad); @@ -176,13 +177,13 @@ static uint32_t __attribute__((section(".ramtext"))) readPad(int pad) { SIOS[0].fifo = s_send_pad ? doPadOutput & padOutputBuffer[1] : doPadOutput && padOutputBuffer[1]; padOutputBuffer += 2; busyloop(10); - SIOS[0].ctrl |= 0x10; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; IREG = ~IRQ_CONTROLLER; cyclesWaited = 0; - while (!(SIOS[0].stat & 2)) { + while (!(SIOS[0].stat & SIO_STAT_RXRDY)) { if (!(IREG & IRQ_CONTROLLER)) continue; - while (!(SIOS[0].stat & 2)); + while (!(SIOS[0].stat & SIO_STAT_RXRDY)); padAbort(pad); return 0xffff; } @@ -201,10 +202,10 @@ static uint32_t __attribute__((section(".ramtext"))) readPad(int pad) { SIOS[0].fifo = s_send_pad ? doPadOutput & padOutputBuffer[0] : doPadOutput && padOutputBuffer[0]; busyloop(10); - SIOS[0].ctrl |= 0x10; + SIOS[0].ctrl |= SIO_CTRL_ERRRES; IREG = ~IRQ_CONTROLLER; - while (!(SIOS[0].stat & 2)); + while (!(SIOS[0].stat & SIO_STAT_RXRDY)); padBuffer[3] = SIOS[0].fifo; padBuffer += 2; @@ -251,7 +252,7 @@ static void __attribute__((section(".ramtext"))) mcHandler(int v) { g_sio0Mask = 0x2000; } - SIOS[0].ctrl |= g_sio0Mask | 0x0012; + SIOS[0].ctrl |= g_sio0Mask | SIO_CTRL_ERRRES | SIO_CTRL_DTR; int delay = g_mcHandlerDelayPatch; for (unsigned i = 0; i < delay; i++) __asm__ __volatile__(""); @@ -315,9 +316,9 @@ static void __attribute__((section(".ramtext"))) firstStageCardAction() { syscall_buLowLevelOpError2(); deliverEvent(EVENT_CARD, 0x0100); sysDeqIntRP(1, &g_mcHandlerInfo); - SIOS[0].ctrl = 0x40; - SIOS[0].baudRate = 0x88; - SIOS[0].mode = 13; + SIOS[0].ctrl = SIO_CTRL_IR; + SIOS[0].baudRate = 2073600 / 15200; + SIOS[0].mode = 13; // MUL1, 8bit, no parity, normal polarity SIOS[0].ctrl = 0; return; } @@ -377,14 +378,14 @@ int __attribute__((section(".ramtext"))) initPad(uint8_t* pad1Buffer, size_t pad } static void __attribute__((section(".ramtext"))) setupSIO0() { - SIOS[0].ctrl = 0x40; - SIOS[0].baudRate = 0x88; + SIOS[0].ctrl = SIO_CTRL_IR; + SIOS[0].baudRate = 2073600 / 15200; SIOS[0].mode = 13; SIOS[0].ctrl = 0; busyloop(10); - SIOS[0].ctrl = 2; + SIOS[0].ctrl = SIO_CTRL_DTR; busyloop(10); - SIOS[0].ctrl = 0x2002; + SIOS[0].ctrl = SIO_CTRL_PORTSEL | SIO_CTRL_DTR; busyloop(10); SIOS[0].ctrl = 0; g_skipErrorOnNewCard = 0;