files.qip

set_global_assignment -name VERILOG_FILE sys/vga_pwm.v
set_global_assignment -name SDC_FILE Groovy.sdc
set_global_assignment -name VERILOG_FILE rtl/binary_to_bcd.v
set_global_assignment -name VHDL_FILE rtl/vga_overlay.vhd
set_global_assignment -name QIP_FILE rtl/fifo_vga.qip
set_global_assignment -name QIP_FILE rtl/fifo_sound.qip
set_global_assignment -name VERILOG_FILE rtl/lz4.v
set_global_assignment -name VERILOG_FILE rtl/hps_ext.v
set_global_assignment -name VERILOG_FILE rtl/JTFRAME/jtframe_resync.v
set_global_assignment -name VERILOG_FILE rtl/vga.v
set_global_assignment -name VERILOG_FILE rtl/sound.v
set_global_assignment -name SYSTEMVERILOG_FILE rtl/ddram.sv
set_global_assignment -name SYSTEMVERILOG_FILE Groovy.sv
set_global_assignment -name VERILOG_FILE rtl/JTFRAME/jtframe_rpwp_ram.v
set_global_assignment -name VERILOG_FILE rtl/JTFRAME/jtframe_linebuf.v
set_global_assignment -name VERILOG_FILE rtl/JTFRAME/jtframe_hsize.v