👷 Add clang-20 support

Problem:
- clang-20 is stable and not yet used to compile this repo.

Solution:
- Add clang-20 support to CI.

Author: elbeno

.github/workflows/unit_tests.yml

@@ -13,7 +13,7 @@ env:
   DEBIAN_FRONTEND: noninteractive
   CMAKE_GENERATOR: Ninja
   DEFAULT_CXX_STANDARD: 20
-  DEFAULT_LLVM_VERSION: 19
+  DEFAULT_LLVM_VERSION: 20
   DEFAULT_GCC_VERSION: 13
 
 concurrency:
@@ -27,7 +27,7 @@ jobs:
       fail-fast: false
       matrix:
         compiler: [clang, gcc]
-        version: [12, 13, 16, 17, 18, 19]
+        version: [12, 13, 16, 17, 18, 19, 20]
         cxx_standard: [20]
         stdlib: [libstdc++, libc++]
         build_type: [Debug]
@@ -36,6 +36,15 @@ jobs:
             cc: "clang"
             cxx: "clang++"
             cxx_flags: "-stdlib=libstdc++"
+          - version: 20
+            compiler: clang
+            install: wget https://apt.llvm.org/llvm.sh && chmod +x llvm.sh && sudo ./llvm.sh 20
+            toolchain_root: "/usr/lib/llvm-20"
+          - version: 20
+            compiler: clang
+            stdlib: libc++
+            install: wget https://apt.llvm.org/llvm.sh && chmod +x llvm.sh && sudo ./llvm.sh 20 && sudo apt install -y libc++-20-dev libc++abi-20-dev
+            cxx_flags: "-stdlib=libc++"
           - version: 19
             compiler: clang
             install: wget https://apt.llvm.org/llvm.sh && chmod +x llvm.sh && sudo ./llvm.sh 19
@@ -87,6 +96,8 @@ jobs:
             cxx: "g++-12"
             cxx_flags: ""
         exclude:
+          - compiler: gcc
+            version: 20
           - compiler: gcc
             version: 19
           - compiler: gcc
@@ -289,8 +300,8 @@ jobs:
           - compiler: clang
             cc: "clang"
             cxx: "clang++"
-            install: wget https://apt.llvm.org/llvm.sh && chmod +x llvm.sh && sudo ./llvm.sh 19
-            toolchain_root: "/usr/lib/llvm-19"
+            install: wget https://apt.llvm.org/llvm.sh && chmod +x llvm.sh && sudo ./llvm.sh 20
+            toolchain_root: "/usr/lib/llvm-20"
           - compiler: gcc
             cc: "gcc-13"
             cxx: "g++-13"

CMakeLists.txt

@@ -14,9 +14,9 @@ else()
 endif()
 
 add_versioned_package("gh:boostorg/mp11#boost-1.83.0")
-add_versioned_package("gh:intel/cpp-baremetal-concurrency#7c5b26c")
-add_versioned_package("gh:intel/cpp-std-extensions#5530b5d")
-add_versioned_package("gh:intel/cpp-baremetal-senders-and-receivers#73d95bc")
+add_versioned_package("gh:intel/cpp-baremetal-concurrency#0ddce52")
+add_versioned_package("gh:intel/cpp-std-extensions#7e1cbc7")
+add_versioned_package("gh:intel/cpp-baremetal-senders-and-receivers#22c8006")
 add_versioned_package("gh:intel/safe-arithmetic#9ea549a")
 
 find_package(Python3 COMPONENTS Interpreter)

test/mmio_bus.cpp

@@ -8,6 +8,7 @@
 
 #include <catch2/catch_test_macros.hpp>
 
+#include <cstddef>
 #include <cstdint>
 
 namespace {
@@ -45,58 +46,61 @@ TEST_CASE("subword write optimization", "[mmio_bus]") {
     iface::num_loads = {};
 
     SECTION("write the whole register") {
-        bus::write<0xffff'ffffu, 0u, 0u>(addr32, 0xc001'd00du) |
-            async::sync_wait();
+        CHECK(bus::write<0xffff'ffffu, 0u, 0u>(addr32, 0xc001'd00du) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xc001'd00du);
     }
 
     SECTION("write byte 0") {
-        bus::write<0xffu, 0u, 0u>(addr32, 0x38u) | async::sync_wait();
+        CHECK(bus::write<0xffu, 0u, 0u>(addr32, 0x38u) | async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0x8765'4338u);
     }
 
     SECTION("write byte 1") {
-        bus::write<0xff00u, 0u, 0u>(addr32, 0x4200u) | async::sync_wait();
+        CHECK(bus::write<0xff00u, 0u, 0u>(addr32, 0x4200u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0x8765'4221u);
     }
 
     SECTION("write byte 2") {
-        bus::write<0xff'0000u, 0u, 0u>(addr32, 0x55'0000u) | async::sync_wait();
+        CHECK(bus::write<0xff'0000u, 0u, 0u>(addr32, 0x55'0000u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0x8755'4321u);
     }
 
     SECTION("write byte 3") {
-        bus::write<0xff00'0000u, 0u, 0u>(addr32, 0x1300'0000u) |
-            async::sync_wait();
+        CHECK(bus::write<0xff00'0000u, 0u, 0u>(addr32, 0x1300'0000u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0x1365'4321u);
     }
 
     SECTION("write word at offset 0") {
-        bus::write<0xffffu, 0u, 0u>(addr32, 0xd00du) | async::sync_wait();
+        CHECK(bus::write<0xffffu, 0u, 0u>(addr32, 0xd00du) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0x8765'd00du);
     }
 
     SECTION("write word at offset 2") {
-        bus::write<0xffff'0000u, 0u, 0u>(addr32, 0x6502'0000u) |
-            async::sync_wait();
+        CHECK(bus::write<0xffff'0000u, 0u, 0u>(addr32, 0x6502'0000u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
@@ -110,15 +114,16 @@ TEST_CASE("read-modify-write", "[mmio_bus]") {
     iface::num_loads = {};
 
     SECTION("write a single bit") {
-        bus::write<0x1u, 0u, 0u>(addr32, 0u) | async::sync_wait();
+        CHECK(bus::write<0x1u, 0u, 0u>(addr32, 0u) | async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 1);
         CHECK(reg32 == 0xffff'fffeu);
     }
 
     SECTION("write a nibble") {
-        bus::write<0xf000u, 0u, 0u>(addr32, 0x7000u) | async::sync_wait();
+        CHECK(bus::write<0xf000u, 0u, 0u>(addr32, 0x7000u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 1);
@@ -132,89 +137,91 @@ TEST_CASE("idmask write optimization", "[mmio_bus]") {
     iface::num_loads = {};
 
     SECTION("write bit in byte 0") {
-        bus::write<0x1u, 0xffff'fffeu, 0xffff'fffeu>(addr32, 0u) |
-            async::sync_wait();
+        CHECK(bus::write<0x1u, 0xffff'fffeu, 0xffff'fffeu>(addr32, 0u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xffff'fffeu);
     }
     SECTION("write bit in byte 0 - requires subword write") {
-        bus::write<0x1u, 0xfeu, 0xfeu>(addr32, 0u) | async::sync_wait();
+        CHECK(bus::write<0x1u, 0xfeu, 0xfeu>(addr32, 0u) | async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xffff'fffeu);
     }
 
     SECTION("write nibble in byte 1") {
-        bus::write<0x0f00u, 0xffff'f0ffu, 0xffff'f0ffu>(addr32, 0x0300u) |
-            async::sync_wait();
+        CHECK(bus::write<0x0f00u, 0xffff'f0ffu, 0xffff'f0ffu>(addr32, 0x0300u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xffff'f3ffu);
     }
 
     SECTION("write nibble in byte 1 - requires subword write") {
-        bus::write<0x0f00u, 0xf0ffu, 0xf0ffu>(addr32, 0x0300u) |
-            async::sync_wait();
+        CHECK(bus::write<0x0f00u, 0xf0ffu, 0xf0ffu>(addr32, 0x0300u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xffff'f3ffu);
     }
 
     SECTION("write across two bytes - requires subword write") {
-        bus::write<0x0ff0u, 0xf00fu, 0xf00fu>(addr32, 0x0340u) |
-            async::sync_wait();
+        CHECK(bus::write<0x0ff0u, 0xf00fu, 0xf00fu>(addr32, 0x0340u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xffff'f34fu);
     }
 
     SECTION("write nibble in byte 2") {
-        bus::write<0xf0'0000u, 0xff0f'ffffu, 0xff0f'ffffu>(addr32, 0x40'0000u) |
-            async::sync_wait();
+        CHECK(bus::write<0xf0'0000u, 0xff0f'ffffu, 0xff0f'ffffu>(addr32,
+                                                                 0x40'0000u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xff4f'ffffu);
     }
 
     SECTION("write nibble in byte 3") {
-        bus::write<0x0f00'0000u, 0xf0ff'ffffu, 0xf0ff'ffffu>(addr32,
-                                                             0x1300'0000u) |
-            async::sync_wait();
+        CHECK(bus::write<0x0f00'0000u, 0xf0ff'ffffu, 0xf0ff'ffffu>(
+                  addr32, 0x1300'0000u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xf3ff'ffffu);
     }
 
     SECTION("write across three bytes") {
-        bus::write<0xff'ffffu, 0xff00'0000u, 0xff00'0000u>(addr32, 0x41'd00du) |
-            async::sync_wait();
+        CHECK(bus::write<0xff'ffffu, 0xff00'0000u, 0xff00'0000u>(addr32,
+                                                                 0x41'd00du) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0xff41'd00du);
     }
 
     SECTION("write across three bytes - check id bit write") {
-        bus::write<0x00ff'ffffu, 0xff00'0000u, 0u>(addr32, 0x41'd00du) |
-            async::sync_wait();
+        CHECK(bus::write<0x00ff'ffffu, 0xff00'0000u, 0u>(addr32, 0x41'd00du) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);
         CHECK(reg32 == 0x0041'd00du);
     }
 
     SECTION("write across three bytes - start at byte 1") {
-        bus::write<0xffff'ff00u, 0x0000'00ffu, 0x0000'00ffu>(addr32,
-                                                             0x41d0'0d00u) |
-            async::sync_wait();
+        CHECK(bus::write<0xffff'ff00u, 0x0000'00ffu, 0x0000'00ffu>(
+                  addr32, 0x41d0'0d00u) |
+              async::sync_wait());
 
         CHECK(iface::num_stores == 1);
         CHECK(iface::num_loads == 0);

test/write.cpp

@@ -113,22 +113,24 @@ TEST_CASE("write mask is passed to bus", "[write]") {
 
 TEST_CASE("write is pipeable", "[write]") {
     using namespace groov::literals;
-    async::just(grp("reg0"_r = 0xa5a5'a5a5u)) | groov::write |
-        async::sync_wait();
+    auto r = async::just(grp("reg0"_r = 0xa5a5'a5a5u)) | groov::write |
+             async::sync_wait();
+    CHECK(r);
     CHECK(data0 == 0xa5a5'a5a5u);
 }
 
 TEST_CASE("piped read-modify-write", "[write]") {
     using namespace groov::literals;
     data0 = 0xa5u;
-    async::just(grp / "reg0"_r) //
-        | groov::read           //
-        | async::then([](auto spec) {
-              spec["reg0"_r] ^= 0xff;
-              return spec;
-          })           //
-        | groov::write //
-        | async::sync_wait();
+    auto r = async::just(grp / "reg0"_r) //
+             | groov::read               //
+             | async::then([](auto spec) {
+                   spec["reg0"_r] ^= 0xff;
+                   return spec;
+               })           //
+             | groov::write //
+             | async::sync_wait();
+    CHECK(r);
     CHECK(data0 == 0x5au);
 }