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Bump clang-tidy to 16 #427
* Bump clang-tidy to 16 * fix style to satisfy clang-format 18.1.3 --------- Co-authored-by: Artem Kroviakov <[email protected]>
1 parent 6c407ec commit 1fa5c26

36 files changed

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-915
lines changed

‎.github/workflows/clang-tidy.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -102,4 +102,4 @@ jobs:
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shell: bash
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run: |
104104
cd build
105-
python3 ../llvm-project/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py -warnings-as-errors=* -p ./ -config-file ../llvm-project/mlir/.clang-tidy -clang-tidy-binary $(which clang-tidy-15) ${{ env.CHANGED_FILES }}
105+
python3 ../llvm-project/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py -warnings-as-errors=* -p ./ -config-file ../llvm-project/mlir/.clang-tidy -clang-tidy-binary $(which clang-tidy-16) ${{ env.CHANGED_FILES }}

‎legacy/core/src/compiler/codegen/codegen_c.cpp

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2020-2023 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
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*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#include "codegen_c.hpp"
1819
#include "../ir/viewer.hpp"
@@ -1219,9 +1220,8 @@ void c_generator_pass_t::operator()(func_t f) {
12191220
c_generator_pass_t::c_generator_pass_t(std::ostream &source,
12201221
const context_ptr &ctx, bool gen_wrapper,
12211222
c_generator_optional_out_t *optional_out)
1222-
: source_(source), context_(ctx),
1223-
gen_wrapper_(gen_wrapper), pre_passes_{get_default_precodegen_passes(
1224-
ctx, gen_wrapper)},
1223+
: source_(source), context_(ctx), gen_wrapper_(gen_wrapper),
1224+
pre_passes_{get_default_precodegen_passes(ctx, gen_wrapper)},
12251225
optional_out_(optional_out) {
12261226
prepare_include(&source_);
12271227
if (optional_out_) {

‎legacy/core/src/compiler/codegen/llvm/intrinsic_impl.cpp

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2023-2024 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617
#include <algorithm>
1718
#include <fstream>
1819
#include <memory>
@@ -74,7 +75,7 @@ Value *codegen_llvm_vis_t::make_int_min_max(const intrin_call_c &v, bool ismin,
7475
Value *codegen_llvm_vis_t::make_int_min_max(Value *v1, Value *v2, bool ismin,
7576
type_category cate) {
7677
// fix-me: use smax/smin for newer LLVM
77-
llvm::Value *(llvm::IRBuilder<>::*ptr)(llvm::Value * LHS, llvm::Value * RHS,
78+
llvm::Value *(llvm::IRBuilder<>::*ptr)(llvm::Value *LHS, llvm::Value *RHS,
7879
const llvm::Twine &Name);
7980
if (ismin) {
8081
if (cate == CATE_INT) {

‎legacy/core/src/compiler/ir/graph/anchor_loop_generator.cpp

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2023 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#include "anchor_loop_generator.hpp"
1819
#include "fusible_op_utils.hpp"

‎legacy/core/src/compiler/ir/graph/anchor_loop_generator.hpp

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2023 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#ifndef GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_GRAPH_ANCHOR_LOOP_GENERATOR_HPP
1819
#define GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_GRAPH_ANCHOR_LOOP_GENERATOR_HPP
@@ -54,7 +55,7 @@ class anchor_loop_generator_t : public body_generator_base_t {
5455
const std::shared_ptr<fusion_anchor_t> &parent_fanchor) const;
5556

5657
void schedule_loops(context_ptr ctx, const void *config, stmt body,
57-
std::vector<for_loop> &fors) const override{};
58+
std::vector<for_loop> &fors) const override {};
5859
float get_gflop() const override { return 0; }
5960
};
6061

‎legacy/core/src/compiler/ir/graph/graph_map.hpp

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2022-2023 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#ifndef GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_GRAPH_GRAPH_MAP_HPP
1819
#define GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_GRAPH_GRAPH_MAP_HPP
@@ -26,7 +27,9 @@ namespace impl {
2627
namespace graph {
2728
namespace gc {
2829

29-
template <typename T> struct is_vector { static constexpr bool value = false; };
30+
template <typename T> struct is_vector {
31+
static constexpr bool value = false;
32+
};
3033

3134
template <typename T, typename Alloc> struct is_vector<std::vector<T, Alloc>> {
3235
static constexpr bool value = true;

‎legacy/core/src/compiler/ir/graph/graph_op.hpp

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2020-2023 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617
#ifndef GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_GRAPH_GRAPH_OP_HPP
1718
#define GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_GRAPH_GRAPH_OP_HPP
1819

@@ -48,7 +49,7 @@ class graph_op_t : public sc_op {
4849
void query_format(
4950
context_ptr ctx,
5051
std::vector<std::vector<format_stride_pair>> &supported_ins,
51-
std::vector<std::vector<format_stride_pair>> &supported_outs) override{};
52+
std::vector<std::vector<format_stride_pair>> &supported_outs) override {};
5253

5354
// the param graph is created by upper function and passed to this function.
5455
// It should be an empty graph and already synced with external graph.

‎legacy/core/src/compiler/ir/graph/mixed_partition.cpp

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2022-2024 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#include "mixed_partition.hpp"
1819
#include "binding_axis.hpp"
@@ -1849,8 +1850,8 @@ static bool try_merge_mixed_parti_parallel(mixed_parti_t *A, mixed_parti_t *B) {
18491850

18501851
auto append_parti = (dep == parti_dep::l_dep_r) ? A : B,
18511852
target_parti = (dep == parti_dep::l_dep_r) ? B : A;
1852-
SC_MODULE_INFO << "Start try_merge_mixed_parti_parallel: "
1853-
<< "Target: " << target_parti->func_->name_
1853+
SC_MODULE_INFO << "Start try_merge_mixed_parti_parallel: " << "Target: "
1854+
<< target_parti->func_->name_
18541855
<< ", Append: " << append_parti->func_->name_;
18551856

18561857
auto outer_loops_target = target_parti->get_outer_loops(),
@@ -4028,7 +4029,7 @@ static void
40284029
crossover_dispatcher(const std::vector<mixed_parti_t::ptr> &parti_vec,
40294030
parti_merge_kind merge_kind) {
40304031
// select merger by merge kind
4031-
bool (*merger)(mixed_parti_t * A, mixed_parti_t * B);
4032+
bool (*merger)(mixed_parti_t *A, mixed_parti_t *B);
40324033
switch (merge_kind) {
40334034
case parti_merge_kind::vertical: {
40344035
merger = try_merge_mixed_parti_vertically;

‎legacy/core/src/compiler/ir/intrinsics.hpp

Lines changed: 10 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2020-2024 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#ifndef GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_INTRINSICS_HPP
1819
#define GRAPH_BACKEND_GRAPH_COMPILER_CORE_SRC_COMPILER_IR_INTRINSICS_HPP
@@ -38,7 +39,7 @@ struct intrinsic_handler_t {
3839
};
3940

4041
struct x86_intrinsic_handler_t : public intrinsic_handler_t {
41-
virtual void on_initialize(intrin_call_node &node){};
42+
virtual void on_initialize(intrin_call_node &node) {};
4243
virtual void on_initialize(low_level_intrin_node &node) = 0;
4344
x86_intrinsic_handler_t(const std::string &name);
4445
virtual ~x86_intrinsic_handler_t() = default;

‎legacy/core/src/compiler/ir/transform/dynamic_parallel_transform.cpp

Lines changed: 11 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,19 @@
1-
/*******************************************************************************
2-
* Copyright 2023-2024 Intel Corporation
1+
/*
2+
* Copyright (C) 2025 Intel Corporation
33
*
44
* Licensed under the Apache License, Version 2.0 (the "License");
55
* you may not use this file except in compliance with the License.
66
* You may obtain a copy of the License at
77
*
8-
* http://www.apache.org/licenses/LICENSE-2.0
8+
* http://www.apache.org/licenses/LICENSE-2.0
99
*
10-
* Unless required by applicable law or agreed to in writing, software
11-
* distributed under the License is distributed on an "AS IS" BASIS,
10+
* Unless required by applicable law or agreed to in writing,
11+
* software distributed under the License is distributed on an "AS IS" BASIS,
1212
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13-
* See the License for the specific language governing permissions and
14-
* limitations under the License.
15-
*******************************************************************************/
13+
* See the License for the specific language governing permissions
14+
* and limitations under the License.
15+
* SPDX-License-Identifier: Apache-2.0
16+
*/
1617

1718
#include "dynamic_parallel_transform.hpp"
1819
#include <algorithm>
@@ -123,8 +124,8 @@ struct parallel_for_scope_t {
123124
bool is_start, uint64_t tid_step,
124125
const std::vector<expr_c> *parent_iters,
125126
const expr_c &cur_iter)
126-
: loop_{loop},
127-
nested_level_{nested_level}, is_start_{is_start}, tid_step_{tid_step} {
127+
: loop_{loop}, nested_level_{nested_level}, is_start_{is_start},
128+
tid_step_{tid_step} {
128129
if (parent_iters) {
129130
iters_ = *parent_iters;
130131
if (cur_iter.defined()) {

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