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esukhovpszymich
esukhov
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pszymich
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Fixed bug in vectorizer
Wider extract elements are treated correctly now. (cherry picked from commit ae00cfb)
1 parent e4ddfe4 commit 2fe7e81

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2 files changed

+98
-1
lines changed

2 files changed

+98
-1
lines changed

‎IGC/Compiler/CISACodeGen/IGCVectorizer.cpp

+6-1
Original file line numberDiff line numberDiff line change
@@ -169,7 +169,7 @@ unsigned int getConstantValueAsInt(Value *I) {
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return Result;
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}
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unsigned int getVectorSize(Instruction *I) {
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unsigned int getVectorSize(Value *I) {
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IGCLLVM::FixedVectorType *VecType =
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llvm::dyn_cast<IGCLLVM::FixedVectorType>(I->getType());
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if (!VecType)
@@ -620,6 +620,11 @@ bool IGCVectorizer::checkInsertElement(Instruction *First, VecArr &Slice) {
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bool IGCVectorizer::checkExtractElement(Instruction *Compare, VecArr &Slice) {
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Value *CompareSource = Slice[0]->getOperand(0);
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if (getVectorSize(CompareSource) != Slice.size()) {
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PRINT_LOG_NL("Extract is wider than the slice, need additional handling, not implemented");
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return false;
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}
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if (!llvm::isa<Instruction>(CompareSource)) {
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PRINT_LOG_NL("Source is not an instruction");
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return false;

‎IGC/Compiler/tests/IGCVectorizer/vectorizer-wider-than-slice.ll

+92
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,92 @@
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;=========================== begin_copyright_notice ============================
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;
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; Copyright (C) 2024 Intel Corporation
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;
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; SPDX-License-Identifier: MIT
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;
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;============================ end_copyright_notice =============================
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; UNSUPPORTED: system-windows
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; RUN: igc_opt --igc-vectorizer -S -dce < %s 2>&1 | FileCheck %s
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define spir_kernel void @wibble(<64 x float> %arg) {
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bb:
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br label %bb2
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bb1: ; No predecessors!
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br label %bb2
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bb2: ; preds = %bb1, %bb
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%tmp = phi <64 x float> [ zeroinitializer, %bb ], [ zeroinitializer, %bb1 ]
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%tmp3 = extractelement <64 x float> %arg, i64 0
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%tmp4 = extractelement <64 x float> %arg, i64 1
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%tmp5 = extractelement <64 x float> %arg, i64 2
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%tmp6 = extractelement <64 x float> %arg, i64 3
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%tmp7 = extractelement <64 x float> %arg, i64 4
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%tmp8 = extractelement <64 x float> %arg, i64 5
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%tmp9 = extractelement <64 x float> %arg, i64 6
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%tmp10 = extractelement <64 x float> %arg, i64 7
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%tmp11 = extractelement <64 x float> %arg, i64 8
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%tmp12 = extractelement <64 x float> %arg, i64 9
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%tmp13 = extractelement <64 x float> %arg, i64 10
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%tmp14 = extractelement <64 x float> %arg, i64 11
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%tmp15 = extractelement <64 x float> %arg, i64 12
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%tmp16 = extractelement <64 x float> %arg, i64 13
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%tmp17 = extractelement <64 x float> %arg, i64 14
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%tmp18 = extractelement <64 x float> %arg, i64 15
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br label %bb19
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bb19: ; preds = %bb36, %bb2
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; CHECK-LABEL: bb19:
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; CHECK-NOT: phi <8 x float>{{.*}}[ %arg, %bb2 ]
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; CHECK: ret void
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%tmp20 = phi float [ %tmp18, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp21 = phi float [ %tmp17, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp22 = phi float [ %tmp16, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp23 = phi float [ %tmp15, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp24 = phi float [ %tmp14, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp25 = phi float [ %tmp13, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp26 = phi float [ %tmp12, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp27 = phi float [ %tmp11, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp28 = phi float [ %tmp10, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp29 = phi float [ %tmp9, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp30 = phi float [ %tmp8, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp31 = phi float [ %tmp7, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp32 = phi float [ %tmp6, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp33 = phi float [ %tmp5, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp34 = phi float [ %tmp4, %bb2 ], [ 0.000000e+00, %bb36 ]
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%tmp35 = phi float [ %tmp3, %bb2 ], [ 0.000000e+00, %bb36 ]
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ret void
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bb36: ; No predecessors!
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%tmp37 = insertelement <8 x float> zeroinitializer, float %tmp35, i64 0
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%tmp38 = insertelement <8 x float> %tmp37, float %tmp34, i64 0
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%tmp39 = insertelement <8 x float> %tmp38, float %tmp33, i64 0
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%tmp40 = insertelement <8 x float> %tmp39, float %tmp32, i64 0
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%tmp41 = insertelement <8 x float> %tmp40, float %tmp31, i64 0
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%tmp42 = insertelement <8 x float> %tmp41, float %tmp30, i64 0
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%tmp43 = insertelement <8 x float> %tmp42, float %tmp29, i64 0
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%tmp44 = insertelement <8 x float> %tmp43, float %tmp28, i64 0
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%tmp45 = insertelement <8 x float> zeroinitializer, float %tmp27, i64 0
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%tmp46 = insertelement <8 x float> %tmp45, float %tmp26, i64 0
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%tmp47 = insertelement <8 x float> %tmp46, float %tmp25, i64 0
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%tmp48 = insertelement <8 x float> %tmp47, float %tmp24, i64 0
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%tmp49 = insertelement <8 x float> %tmp48, float %tmp23, i64 0
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%tmp50 = insertelement <8 x float> %tmp49, float %tmp22, i64 0
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%tmp51 = insertelement <8 x float> %tmp50, float %tmp21, i64 0
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%tmp52 = insertelement <8 x float> %tmp51, float %tmp20, i64 0
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%tmp53 = call <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8 x float> %tmp44, <8 x i16> zeroinitializer, <8 x i32> zeroinitializer, i32 0, i32 0, i32 0, i32 0, i1 false)
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%tmp54 = call <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8 x float> %tmp52, <8 x i16> zeroinitializer, <8 x i32> zeroinitializer, i32 0, i32 0, i32 0, i32 0, i1 false)
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br label %bb19
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}
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; Function Attrs: inaccessiblememonly nofree nosync nounwind willreturn
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declare void @llvm.assume(i1 noundef) #0
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declare i16 @llvm.genx.GenISA.simdLaneId()
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declare <8 x float> @llvm.genx.GenISA.sub.group.dpas.v8f32.v8f32.v8i16.v8i32(<8 x float>, <8 x i16>, <8 x i32>, i32, i32, i32, i32, i1)
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attributes #0 = { inaccessiblememonly nofree nosync nounwind willreturn }
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!igc.functions = !{}

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