Skip to content

Commit f83f1bd

Browse files
jlabundySasha Levin
authored and
Sasha Levin
committed
Input: iqs7222 - add support for IQS7222D v1.1 and v1.2
[ Upstream commit 992cf65 ] The vendor has introduced two new revisions with slightly different memory maps; update the driver to support them. Fixes: dd24e20 ("Input: iqs7222 - add support for Azoteq IQS7222D") Signed-off-by: Jeff LaBundy <[email protected]> Link: https://lore.kernel.org/r/ZelTRYX3fenMQuhF@nixie71 Signed-off-by: Dmitry Torokhov <[email protected]> Signed-off-by: Sasha Levin <[email protected]>
1 parent 304bc00 commit f83f1bd

File tree

1 file changed

+112
-0
lines changed

1 file changed

+112
-0
lines changed

drivers/input/misc/iqs7222.c

Lines changed: 112 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -620,6 +620,118 @@ static const struct iqs7222_dev_desc iqs7222_devs[] = {
620620
},
621621
},
622622
},
623+
{
624+
.prod_num = IQS7222_PROD_NUM_D,
625+
.fw_major = 1,
626+
.fw_minor = 2,
627+
.touch_link = 1770,
628+
.allow_offset = 9,
629+
.event_offset = 10,
630+
.comms_offset = 11,
631+
.reg_grps = {
632+
[IQS7222_REG_GRP_STAT] = {
633+
.base = IQS7222_SYS_STATUS,
634+
.num_row = 1,
635+
.num_col = 7,
636+
},
637+
[IQS7222_REG_GRP_CYCLE] = {
638+
.base = 0x8000,
639+
.num_row = 7,
640+
.num_col = 2,
641+
},
642+
[IQS7222_REG_GRP_GLBL] = {
643+
.base = 0x8700,
644+
.num_row = 1,
645+
.num_col = 3,
646+
},
647+
[IQS7222_REG_GRP_BTN] = {
648+
.base = 0x9000,
649+
.num_row = 14,
650+
.num_col = 3,
651+
},
652+
[IQS7222_REG_GRP_CHAN] = {
653+
.base = 0xA000,
654+
.num_row = 14,
655+
.num_col = 4,
656+
},
657+
[IQS7222_REG_GRP_FILT] = {
658+
.base = 0xAE00,
659+
.num_row = 1,
660+
.num_col = 2,
661+
},
662+
[IQS7222_REG_GRP_TPAD] = {
663+
.base = 0xB000,
664+
.num_row = 1,
665+
.num_col = 24,
666+
},
667+
[IQS7222_REG_GRP_GPIO] = {
668+
.base = 0xC000,
669+
.num_row = 3,
670+
.num_col = 3,
671+
},
672+
[IQS7222_REG_GRP_SYS] = {
673+
.base = IQS7222_SYS_SETUP,
674+
.num_row = 1,
675+
.num_col = 12,
676+
},
677+
},
678+
},
679+
{
680+
.prod_num = IQS7222_PROD_NUM_D,
681+
.fw_major = 1,
682+
.fw_minor = 1,
683+
.touch_link = 1774,
684+
.allow_offset = 9,
685+
.event_offset = 10,
686+
.comms_offset = 11,
687+
.reg_grps = {
688+
[IQS7222_REG_GRP_STAT] = {
689+
.base = IQS7222_SYS_STATUS,
690+
.num_row = 1,
691+
.num_col = 7,
692+
},
693+
[IQS7222_REG_GRP_CYCLE] = {
694+
.base = 0x8000,
695+
.num_row = 7,
696+
.num_col = 2,
697+
},
698+
[IQS7222_REG_GRP_GLBL] = {
699+
.base = 0x8700,
700+
.num_row = 1,
701+
.num_col = 3,
702+
},
703+
[IQS7222_REG_GRP_BTN] = {
704+
.base = 0x9000,
705+
.num_row = 14,
706+
.num_col = 3,
707+
},
708+
[IQS7222_REG_GRP_CHAN] = {
709+
.base = 0xA000,
710+
.num_row = 14,
711+
.num_col = 4,
712+
},
713+
[IQS7222_REG_GRP_FILT] = {
714+
.base = 0xAE00,
715+
.num_row = 1,
716+
.num_col = 2,
717+
},
718+
[IQS7222_REG_GRP_TPAD] = {
719+
.base = 0xB000,
720+
.num_row = 1,
721+
.num_col = 24,
722+
},
723+
[IQS7222_REG_GRP_GPIO] = {
724+
.base = 0xC000,
725+
.num_row = 3,
726+
.num_col = 3,
727+
},
728+
[IQS7222_REG_GRP_SYS] = {
729+
.base = IQS7222_SYS_SETUP,
730+
.num_row = 1,
731+
.num_col = 12,
732+
},
733+
},
734+
},
623735
{
624736
.prod_num = IQS7222_PROD_NUM_D,
625737
.fw_major = 0,

0 commit comments

Comments
 (0)