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| 1 | +// Leka - LekaOS |
| 2 | +// Copyright 2024 APF France handicap |
| 3 | +// SPDX-License-Identifier: Apache-2.0 |
| 4 | + |
| 5 | +#include "CoreSTM32HalBasicTimer.h" |
| 6 | +#include <cmath> |
| 7 | + |
| 8 | +using namespace leka; |
| 9 | + |
| 10 | +CoreSTM32HalBasicTimer::CoreSTM32HalBasicTimer(interface::STM32Hal &hal) : _hal(hal) |
| 11 | +{ |
| 12 | + _htim.Instance = TIM6; |
| 13 | +} |
| 14 | + |
| 15 | +auto CoreSTM32HalBasicTimer::getHandle() -> TIM_HandleTypeDef & |
| 16 | +{ |
| 17 | + return _htim; |
| 18 | +} |
| 19 | + |
| 20 | +void CoreSTM32HalBasicTimer::registerCallback(std::function<void()> const &callback) |
| 21 | +{ |
| 22 | + _callback = callback; |
| 23 | +} |
| 24 | + |
| 25 | +void CoreSTM32HalBasicTimer::initialize(float frequency) |
| 26 | +{ |
| 27 | + _registerMspCallbacks(); |
| 28 | + |
| 29 | + // CK_Timer = CK_INT / ((Prescaler + 1) * (Period + 1)) |
| 30 | + const auto CK_INT = float {108'000'000.0}; |
| 31 | + auto divider = static_cast<int>(std::round(CK_INT / frequency)); |
| 32 | + |
| 33 | + _htim.Init.Prescaler = 0; |
| 34 | + _htim.Init.Period = divider - 1; // ? min 1 |
| 35 | + _htim.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; |
| 36 | + _hal.HAL_TIM_Base_Init(&_htim); |
| 37 | + |
| 38 | + auto timerMasterConfig = TIM_MasterConfigTypeDef {}; |
| 39 | + timerMasterConfig.MasterOutputTrigger = TIM_TRGO_UPDATE; |
| 40 | + _hal.HAL_TIMEx_MasterConfigSynchronization(&_htim, &timerMasterConfig); |
| 41 | + |
| 42 | + static const auto &self = *this; |
| 43 | + _hal.HAL_TIM_RegisterCallback(&_htim, HAL_TIM_PERIOD_ELAPSED_CB_ID, []([[maybe_unused]] TIM_HandleTypeDef *htim) { |
| 44 | + if (self._callback != nullptr) { |
| 45 | + self._callback(); |
| 46 | + } |
| 47 | + }); |
| 48 | +} |
| 49 | + |
| 50 | +void CoreSTM32HalBasicTimer::_registerMspCallbacks() |
| 51 | +{ |
| 52 | + static const auto &self = *this; |
| 53 | + |
| 54 | + _hal.HAL_TIM_RegisterCallback(&_htim, HAL_TIM_BASE_MSPINIT_CB_ID, []([[maybe_unused]] TIM_HandleTypeDef *htim) { |
| 55 | + self._hal.HAL_RCC_TIM6_CLK_ENABLE(); |
| 56 | + |
| 57 | + self._hal.HAL_NVIC_SetPriority(TIM6_DAC_IRQn, 0x00, 0x00); |
| 58 | + self._hal.HAL_NVIC_EnableIRQ(TIM6_DAC_IRQn); |
| 59 | + }); |
| 60 | + |
| 61 | + _hal.HAL_TIM_RegisterCallback(&_htim, HAL_TIM_BASE_MSPDEINIT_CB_ID, []([[maybe_unused]] TIM_HandleTypeDef *htim) { |
| 62 | + self._hal.HAL_RCC_TIM6_CLK_DISABLE(); |
| 63 | + }); |
| 64 | +} |
| 65 | + |
| 66 | +void CoreSTM32HalBasicTimer::linkDACTimer(DAC_ChannelConfTypeDef *config) |
| 67 | +{ |
| 68 | + if (config != nullptr) { |
| 69 | + config->DAC_Trigger = DAC_TRIGGER_T6_TRGO; |
| 70 | + } |
| 71 | +} |
| 72 | + |
| 73 | +void CoreSTM32HalBasicTimer::terminate() |
| 74 | +{ |
| 75 | + _hal.HAL_TIM_Base_DeInit(&_htim); |
| 76 | +} |
| 77 | + |
| 78 | +void CoreSTM32HalBasicTimer::start() |
| 79 | +{ |
| 80 | + _hal.HAL_TIM_Base_Start_IT(&_htim); |
| 81 | +} |
| 82 | + |
| 83 | +void CoreSTM32HalBasicTimer::stop() |
| 84 | +{ |
| 85 | + _hal.HAL_TIM_Base_Stop_IT(&_htim); |
| 86 | +} |
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