@@ -607,7 +607,7 @@ lowerCirAttrAsValue(mlir::Operation *parentOp, cir::GlobalViewAttr globalAttr,
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auto resTy = addrOp.getType ();
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auto eltTy = converter->convertType (sourceType);
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addrOp = rewriter.create <mlir::LLVM::GEPOp>(loc, resTy, eltTy, addrOp,
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- indices, true );
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+ indices, /* inbounds */ true );
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}
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auto ptrTy = mlir::dyn_cast<cir::PointerType>(globalAttr.getType ());
@@ -874,17 +874,18 @@ mlir::LogicalResult CIRToLLVMBaseClassAddrOpLowering::matchAndRewrite(
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}
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if (baseClassOp.getAssumeNotNull ()) {
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- rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(
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- baseClassOp, resultType, byteType, derivedAddr, offset);
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+ rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(baseClassOp, resultType,
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+ byteType, derivedAddr,
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+ offset, /* inbounds*/ true );
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} else {
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auto loc = baseClassOp.getLoc ();
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mlir::Value isNull = rewriter.create <mlir::LLVM::ICmpOp>(
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loc, mlir::LLVM::ICmpPredicate::eq, derivedAddr,
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rewriter.create <mlir::LLVM::ZeroOp>(loc, derivedAddr.getType ()));
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mlir::Value adjusted = rewriter.create <mlir::LLVM::GEPOp>(
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loc, resultType, byteType, derivedAddr, offset);
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- rewriter.replaceOpWithNewOp <mlir::LLVM::SelectOp>(baseClassOp, isNull,
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- derivedAddr, adjusted);
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+ rewriter.replaceOpWithNewOp <mlir::LLVM::SelectOp>(
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+ baseClassOp, isNull, derivedAddr, adjusted, /* inbounds */ true );
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}
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return mlir::success ();
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}
@@ -901,16 +902,17 @@ mlir::LogicalResult CIRToLLVMDerivedClassAddrOpLowering::matchAndRewrite(
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mlir::IntegerType::Signless);
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if (derivedClassOp.getAssumeNotNull ()) {
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rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(derivedClassOp, resultType,
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- byteType, baseAddr, offset);
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+ byteType, baseAddr, offset,
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+ /* inbounds*/ true );
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} else {
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auto loc = derivedClassOp.getLoc ();
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mlir::Value isNull = rewriter.create <mlir::LLVM::ICmpOp>(
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loc, mlir::LLVM::ICmpPredicate::eq, baseAddr,
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rewriter.create <mlir::LLVM::ZeroOp>(loc, baseAddr.getType ()));
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mlir::Value adjusted = rewriter.create <mlir::LLVM::GEPOp>(
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loc, resultType, byteType, baseAddr, offset);
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- rewriter.replaceOpWithNewOp <mlir::LLVM::SelectOp>(derivedClassOp, isNull,
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- baseAddr, adjusted);
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+ rewriter.replaceOpWithNewOp <mlir::LLVM::SelectOp>(
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+ derivedClassOp, isNull, baseAddr, adjusted, /* inbounds */ true );
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}
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return mlir::success ();
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}
@@ -975,8 +977,8 @@ mlir::LogicalResult CIRToLLVMVTTAddrPointOpLowering::matchAndRewrite(
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offsets.push_back (0 );
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offsets.push_back (adaptor.getOffset ());
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}
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- rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(op, resultType, eltType,
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- llvmAddr, offsets, true );
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+ rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(
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+ op, resultType, eltType, llvmAddr, offsets, /* inbounds */ true );
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return mlir::success ();
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}
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@@ -1033,7 +1035,7 @@ mlir::LogicalResult CIRToLLVMCastOpLowering::matchAndRewrite(
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auto elementTy = convertTy (ptrTy.getPointee ());
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auto offset = llvm::SmallVector<mlir::LLVM::GEPArg>{0 };
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rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(
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- castOp, targetType, elementTy, sourceValue, offset);
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+ castOp, targetType, elementTy, sourceValue, offset, /* inbounds */ true );
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break ;
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}
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case cir::CastKind::int_to_bool: {
@@ -3237,8 +3239,8 @@ mlir::LogicalResult CIRToLLVMGetMemberOpLowering::matchAndRewrite(
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// is always zero. The second offset tell us which member it will access.
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llvm::SmallVector<mlir::LLVM::GEPArg, 2 > offset{0 , op.getIndex ()};
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const auto elementTy = getTypeConverter ()->convertType (structTy);
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- rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(op, llResTy, elementTy,
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- adaptor.getAddr (), offset);
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+ rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(
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+ op, llResTy, elementTy, adaptor.getAddr (), offset, /* inbounds */ true );
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return mlir::success ();
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}
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case cir::StructType::Union:
@@ -3338,8 +3340,8 @@ mlir::LogicalResult CIRToLLVMVTableAddrPointOpLowering::matchAndRewrite(
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}
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assert (eltType && " Shouldn't ever be missing an eltType here" );
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- rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(op, targetType, eltType,
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- symAddr, offsets, true );
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+ rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(
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+ op, targetType, eltType, symAddr, offsets, /* inbounds */ true );
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return mlir::success ();
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}
@@ -3838,8 +3840,8 @@ mlir::LogicalResult CIRToLLVMPtrMaskOpLowering::matchAndRewrite(
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mlir::Value diff = rewriter.create <mlir::LLVM::SubOp>(loc, intPtr, masked);
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rewriter.replaceOpWithNewOp <mlir::LLVM::GEPOp>(
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op, getTypeConverter ()->convertType (op.getType ()),
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- mlir::IntegerType::get (moduleOp->getContext (), 8 ), adaptor.getPtr (),
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- diff );
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+ mlir::IntegerType::get (moduleOp->getContext (), 8 ), adaptor.getPtr (), diff,
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+ /* inbounds */ true );
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return mlir::success ();
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}
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