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lines changed Original file line number Diff line number Diff line change @@ -30976,6 +30976,14 @@ bool X86TargetLowering::needsCmpXchgNb(Type *MemType) const {
3097630976 return false;
3097730977}
3097830978
30979+ TargetLoweringBase::AtomicExpansionKind
30980+ X86TargetLowering::shouldCastAtomicLoadInIR(LoadInst *LI) const {
30981+ if (LI->getType()->isVectorTy())
30982+ if (cast<VectorType>(LI->getType())->getElementType()->isFloatingPointTy())
30983+ return AtomicExpansionKind::CastToInteger;
30984+ return TargetLowering::shouldCastAtomicLoadInIR(LI);
30985+ }
30986+
3097930987TargetLoweringBase::AtomicExpansionKind
3098030988X86TargetLowering::shouldExpandAtomicStoreInIR(StoreInst *SI) const {
3098130989 Type *MemType = SI->getValueOperand()->getType();
Original file line number Diff line number Diff line change @@ -1808,6 +1808,8 @@ namespace llvm {
18081808 const MCPhysReg *getScratchRegisters (CallingConv::ID CC) const override ;
18091809 ArrayRef<MCPhysReg> getRoundingControlRegisters () const override ;
18101810
1811+ TargetLoweringBase::AtomicExpansionKind
1812+ shouldCastAtomicLoadInIR (LoadInst *LI) const override ;
18111813 TargetLoweringBase::AtomicExpansionKind
18121814 shouldExpandAtomicLoadInIR (LoadInst *LI) const override ;
18131815 TargetLoweringBase::AtomicExpansionKind
Original file line number Diff line number Diff line change 1+ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2+ ; RUN: opt < %s --mtriple=x86_64 --passes=atomic-expand -S -o - | FileCheck %s
3+
4+ define float @load_atomic_float () {
5+ ; CHECK-LABEL: define float @load_atomic_float() {
6+ ; CHECK-NEXT: [[SRC:%.*]] = alloca float, align 4
7+ ; CHECK-NEXT: [[TMP1:%.*]] = load atomic i32, ptr [[SRC]] acquire, align 4
8+ ; CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 [[TMP1]] to float
9+ ; CHECK-NEXT: ret float [[TMP2]]
10+ ;
11+ %src = alloca float
12+ %ret = load atomic float , ptr %src acquire , align 4
13+ ret float %ret
14+ }
15+
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