42
42
#include " llvm/TargetParser/Triple.h"
43
43
#include < algorithm>
44
44
#include < cassert>
45
+ #include < cstddef>
45
46
#include < cstdint>
46
47
#include < iterator>
47
48
#include < utility>
@@ -2952,8 +2953,12 @@ static SDValue lowerVECTOR_SHUFFLE_PCKOD(SDValue Op, EVT ResTy,
2952
2953
// if the type is v8i16 and all the indices are less than 8 then the second
2953
2954
// operand is unused and can be replaced with anything. We choose to replace it
2954
2955
// with the used operand since this reduces the number of instructions overall.
2956
+ //
2957
+ // NOTE: SPLATI shuffle masks may contain UNDEFs, since isSPLATI() treats
2958
+ // UNDEFs as the SPLATI index.
2955
2959
static SDValue lowerVECTOR_SHUFFLE_VSHF (SDValue Op, EVT ResTy,
2956
2960
const SmallVector<int , 16 > &Indices,
2961
+ const bool isSPLATI,
2957
2962
SelectionDAG &DAG) {
2958
2963
SmallVector<SDValue, 16 > Ops;
2959
2964
SDValue Op0;
@@ -2965,6 +2970,9 @@ static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
2965
2970
SDLoc DL (Op);
2966
2971
int ResTyNumElts = ResTy.getVectorNumElements ();
2967
2972
2973
+ assert (Indices[0 ] >= 0 &&
2974
+ " shuffle mask starts at a UNDEF, which is not expected" );
2975
+
2968
2976
for (int i = 0 ; i < ResTyNumElts; ++i) {
2969
2977
// Idx == -1 means UNDEF
2970
2978
int Idx = Indices[i];
@@ -2975,8 +2983,16 @@ static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
2975
2983
Using2ndVec = true ;
2976
2984
}
2977
2985
2978
- for (int Idx : Indices)
2986
+ for (size_t i = 0 ; i < Indices.size (); i++) {
2987
+ int Idx = Indices[i];
2988
+ if (isSPLATI && Indices[i] < 0 ) {
2989
+ Idx = Indices[0 ];
2990
+ }
2991
+ if (!isSPLATI && Indices[i] < 0 ) {
2992
+ Idx = Indices[i - 1 ];
2993
+ }
2979
2994
Ops.push_back (DAG.getTargetConstant (Idx, DL, MaskEltTy));
2995
+ }
2980
2996
2981
2997
SDValue MaskVec = DAG.getBuildVector (MaskVecTy, DL, Ops);
2982
2998
@@ -3019,7 +3035,7 @@ SDValue MipsSETargetLowering::lowerVECTOR_SHUFFLE(SDValue Op,
3019
3035
// splati.[bhwd] is preferable to the others but is matched from
3020
3036
// MipsISD::VSHF.
3021
3037
if (isVECTOR_SHUFFLE_SPLATI (Op, ResTy, Indices, DAG))
3022
- return lowerVECTOR_SHUFFLE_VSHF (Op, ResTy, Indices, DAG);
3038
+ return lowerVECTOR_SHUFFLE_VSHF (Op, ResTy, Indices, true , DAG);
3023
3039
SDValue Result;
3024
3040
if ((Result = lowerVECTOR_SHUFFLE_ILVEV (Op, ResTy, Indices, DAG)))
3025
3041
return Result;
@@ -3035,7 +3051,7 @@ SDValue MipsSETargetLowering::lowerVECTOR_SHUFFLE(SDValue Op,
3035
3051
return Result;
3036
3052
if ((Result = lowerVECTOR_SHUFFLE_SHF (Op, ResTy, Indices, DAG)))
3037
3053
return Result;
3038
- return lowerVECTOR_SHUFFLE_VSHF (Op, ResTy, Indices, DAG);
3054
+ return lowerVECTOR_SHUFFLE_VSHF (Op, ResTy, Indices, false , DAG);
3039
3055
}
3040
3056
3041
3057
MachineBasicBlock *
0 commit comments