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[MIPS][MSA] Handle UNDEFs in shuffle indices for VSHF
Currently VSHF does not handle UNDEF indices. However isSPLATI() is able to handle undefs, which may pass indices with undefs to this function. Adding a check to handle undefs in shuffle indices. Also, shuffle mask widened from v2 vector types are guranteed to contain UNDEFs. These shuffle lower logics can handle UNDEFs, so we just leave it as is.
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llvm/lib/Target/Mips/MipsSEISelLowering.cpp

+19-3
Original file line numberDiff line numberDiff line change
@@ -42,6 +42,7 @@
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#include "llvm/TargetParser/Triple.h"
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#include <algorithm>
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#include <cassert>
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#include <cstddef>
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#include <cstdint>
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#include <iterator>
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#include <utility>
@@ -2952,8 +2953,12 @@ static SDValue lowerVECTOR_SHUFFLE_PCKOD(SDValue Op, EVT ResTy,
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// if the type is v8i16 and all the indices are less than 8 then the second
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// operand is unused and can be replaced with anything. We choose to replace it
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// with the used operand since this reduces the number of instructions overall.
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//
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// NOTE: SPLATI shuffle masks may contain UNDEFs, since isSPLATI() treats
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// UNDEFs as the SPLATI index.
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static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
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const SmallVector<int, 16> &Indices,
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const bool isSPLATI,
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SelectionDAG &DAG) {
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SmallVector<SDValue, 16> Ops;
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SDValue Op0;
@@ -2965,6 +2970,9 @@ static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
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SDLoc DL(Op);
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int ResTyNumElts = ResTy.getVectorNumElements();
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assert(Indices[0] >= 0 &&
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"shuffle mask starts at a UNDEF, which is not expected");
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for (int i = 0; i < ResTyNumElts; ++i) {
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// Idx == -1 means UNDEF
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int Idx = Indices[i];
@@ -2975,8 +2983,16 @@ static SDValue lowerVECTOR_SHUFFLE_VSHF(SDValue Op, EVT ResTy,
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Using2ndVec = true;
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}
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2978-
for (int Idx : Indices)
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for (size_t i = 0; i < Indices.size(); i++) {
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int Idx = Indices[i];
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if (isSPLATI && Indices[i] < 0) {
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Idx = Indices[0];
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}
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if (!isSPLATI && Indices[i] < 0) {
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Idx = Indices[i - 1];
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}
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Ops.push_back(DAG.getTargetConstant(Idx, DL, MaskEltTy));
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}
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SDValue MaskVec = DAG.getBuildVector(MaskVecTy, DL, Ops);
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@@ -3019,7 +3035,7 @@ SDValue MipsSETargetLowering::lowerVECTOR_SHUFFLE(SDValue Op,
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// splati.[bhwd] is preferable to the others but is matched from
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// MipsISD::VSHF.
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if (isVECTOR_SHUFFLE_SPLATI(Op, ResTy, Indices, DAG))
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return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, DAG);
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return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, true, DAG);
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SDValue Result;
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if ((Result = lowerVECTOR_SHUFFLE_ILVEV(Op, ResTy, Indices, DAG)))
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return Result;
@@ -3035,7 +3051,7 @@ SDValue MipsSETargetLowering::lowerVECTOR_SHUFFLE(SDValue Op,
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return Result;
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if ((Result = lowerVECTOR_SHUFFLE_SHF(Op, ResTy, Indices, DAG)))
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return Result;
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return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, DAG);
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return lowerVECTOR_SHUFFLE_VSHF(Op, ResTy, Indices, false, DAG);
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}
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MachineBasicBlock *

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