[SelectionDAG] Fix an incorrect DebugLoc on a COPY

Author: epilk

llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

@@ -351,8 +351,9 @@ InstrEmitter::AddRegisterOperand(MachineInstrBuilder &MIB,
         OpRC = TRI->getAllocatableClass(OpRC);
         assert(OpRC && "Constraints cannot be fulfilled for allocation");
         Register NewVReg = MRI->createVirtualRegister(OpRC);
-        BuildMI(*MBB, InsertPos, Op.getNode()->getDebugLoc(),
-                TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg);
+        BuildMI(*MBB, InsertPos, MIB->getDebugLoc(),
+                TII->get(TargetOpcode::COPY), NewVReg)
+            .addReg(VReg);
         VReg = NewVReg;
       } else {
         assert(ConstrainedRC->isAllocatable() &&

llvm/test/DebugInfo/AMDGPU/debug-loc-copy.ll

@@ -26,15 +26,14 @@ define void @_Z12lane_pc_testj() #0 !dbg !9 {
 ; GCN-NEXT:    s_cselect_b32 s5, s4, s7
 ; GCN-NEXT:    s_cselect_b32 s4, s8, s6
 ; GCN-NEXT:    v_mov_b32_e32 v2, 0
+; GCN-NEXT:    .loc 0 13 1 ; t.cpp:13:1
 ; GCN-NEXT:    v_mov_b32_e32 v0, s4
 ; GCN-NEXT:    v_mov_b32_e32 v1, s5
-; GCN-NEXT:    .loc 0 13 1 ; t.cpp:13:1
 ; GCN-NEXT:    flat_store_dword v[0:1], v2
 ; GCN-NEXT:    v_mov_b32_e32 v2, 1
-; GCN-NEXT:    .loc 0 12 1 ; t.cpp:12:1
+; GCN-NEXT:    .loc 0 14 1 ; t.cpp:14:1
 ; GCN-NEXT:    v_mov_b32_e32 v0, s4
 ; GCN-NEXT:    v_mov_b32_e32 v1, s5
-; GCN-NEXT:    .loc 0 14 1 ; t.cpp:14:1
 ; GCN-NEXT:    flat_store_dword v[0:1], v2
 ; GCN-NEXT:    s_waitcnt lgkmcnt(0)
 ; GCN-NEXT:    s_setpc_b64 s[30:31]