Skip to content

Commit c6c6475

Browse files
sushgokhsushgokh
authored
[SLP][NFC] Update test for PR #118055 (#122696)
This patch updates the motivating test for the above PR so that it does not conflict with urem PR #122236
1 parent 97c3a99 commit c6c6475

File tree

1 file changed

+110
-3
lines changed
  • llvm/test/Transforms/SLPVectorizer/AArch64

1 file changed

+110
-3
lines changed

‎llvm/test/Transforms/SLPVectorizer/AArch64/div.ll

+110-3
Original file line numberDiff line numberDiff line change
@@ -552,9 +552,62 @@ define <4 x i32> @slp_v4i32_Op1_unknown_Op2_const_pow2(<4 x i32> %a)
552552
ret <4 x i32> %r3
553553
}
554554

555+
define <2 x i32> @sdiv_v2i32_unknown_divisor(<2 x i32> %a, <2 x i32> %x, <2 x i32> %y, <2 x i32> %z)
556+
; NO-SVE-LABEL: define <2 x i32> @sdiv_v2i32_unknown_divisor(
557+
; NO-SVE-SAME: <2 x i32> [[A:%.*]], <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]]) #[[ATTR0]] {
558+
; NO-SVE-NEXT: [[A0:%.*]] = extractelement <2 x i32> [[A]], i64 0
559+
; NO-SVE-NEXT: [[A1:%.*]] = extractelement <2 x i32> [[A]], i64 1
560+
; NO-SVE-NEXT: [[X0:%.*]] = extractelement <2 x i32> [[X]], i64 0
561+
; NO-SVE-NEXT: [[X1:%.*]] = extractelement <2 x i32> [[X]], i64 1
562+
; NO-SVE-NEXT: [[TMP1:%.*]] = sdiv i32 [[A0]], [[X0]]
563+
; NO-SVE-NEXT: [[TMP2:%.*]] = sdiv i32 [[A1]], [[X1]]
564+
; NO-SVE-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], [[X0]]
565+
; NO-SVE-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], [[X1]]
566+
; NO-SVE-NEXT: [[Y0:%.*]] = extractelement <2 x i32> [[Y]], i64 0
567+
; NO-SVE-NEXT: [[Y1:%.*]] = extractelement <2 x i32> [[Y]], i64 1
568+
; NO-SVE-NEXT: [[TMP5:%.*]] = sub i32 [[TMP3]], [[Y0]]
569+
; NO-SVE-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[Y1]]
570+
; NO-SVE-NEXT: [[Z0:%.*]] = extractelement <2 x i32> [[Z]], i64 0
571+
; NO-SVE-NEXT: [[Z1:%.*]] = extractelement <2 x i32> [[Z]], i64 1
572+
; NO-SVE-NEXT: [[TMP7:%.*]] = mul i32 [[TMP5]], [[Z0]]
573+
; NO-SVE-NEXT: [[TMP8:%.*]] = mul i32 [[TMP6]], [[Z1]]
574+
; NO-SVE-NEXT: [[RES0:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
575+
; NO-SVE-NEXT: [[RES1:%.*]] = insertelement <2 x i32> [[RES0]], i32 [[TMP8]], i32 1
576+
; NO-SVE-NEXT: ret <2 x i32> [[RES1]]
577+
;
578+
; SVE-LABEL: define <2 x i32> @sdiv_v2i32_unknown_divisor(
579+
; SVE-SAME: <2 x i32> [[A:%.*]], <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]]) #[[ATTR0]] {
580+
; SVE-NEXT: [[TMP2:%.*]] = sdiv <2 x i32> [[A]], [[X]]
581+
; SVE-NEXT: [[TMP3:%.*]] = add <2 x i32> [[TMP2]], [[X]]
582+
; SVE-NEXT: [[TMP4:%.*]] = sub <2 x i32> [[TMP3]], [[Y]]
583+
; SVE-NEXT: [[TMP5:%.*]] = mul <2 x i32> [[TMP4]], [[Z]]
584+
; SVE-NEXT: ret <2 x i32> [[TMP5]]
585+
;
586+
{
587+
%a0 = extractelement <2 x i32> %a, i64 0
588+
%a1 = extractelement <2 x i32> %a, i64 1
589+
%x0 = extractelement <2 x i32> %x, i64 0
590+
%x1 = extractelement <2 x i32> %x, i64 1
591+
%1 = sdiv i32 %a0, %x0
592+
%2 = sdiv i32 %a1, %x1
593+
%3 = add i32 %1, %x0
594+
%4 = add i32 %2, %x1
595+
%y0 = extractelement <2 x i32> %y, i64 0
596+
%y1 = extractelement <2 x i32> %y, i64 1
597+
%5 = sub i32 %3, %y0
598+
%6 = sub i32 %4, %y1
599+
%z0 = extractelement <2 x i32> %z, i64 0
600+
%z1 = extractelement <2 x i32> %z, i64 1
601+
%7 = mul i32 %5, %z0
602+
%8 = mul i32 %6, %z1
603+
%res0 = insertelement <2 x i32> poison, i32 %7, i32 0
604+
%res1 = insertelement <2 x i32> %res0, i32 %8, i32 1
605+
ret <2 x i32> %res1
606+
}
607+
555608
; computes (a/const + x - y) * z
556-
define <2 x i32> @vectorize_sdiv_v2i32(<2 x i32> %a, <2 x i32> %x, <2 x i32> %y, <2 x i32> %z)
557-
; NO-SVE-LABEL: define <2 x i32> @vectorize_sdiv_v2i32(
609+
define <2 x i32> @sdiv_v2i32_const_divisor(<2 x i32> %a, <2 x i32> %x, <2 x i32> %y, <2 x i32> %z)
610+
; NO-SVE-LABEL: define <2 x i32> @sdiv_v2i32_const_divisor(
558611
; NO-SVE-SAME: <2 x i32> [[A:%.*]], <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]]) #[[ATTR0]] {
559612
; NO-SVE-NEXT: [[A0:%.*]] = extractelement <2 x i32> [[A]], i64 0
560613
; NO-SVE-NEXT: [[A1:%.*]] = extractelement <2 x i32> [[A]], i64 1
@@ -576,7 +629,7 @@ define <2 x i32> @vectorize_sdiv_v2i32(<2 x i32> %a, <2 x i32> %x, <2 x i32> %y,
576629
; NO-SVE-NEXT: [[RES1:%.*]] = insertelement <2 x i32> [[RES0]], i32 [[TMP8]], i32 1
577630
; NO-SVE-NEXT: ret <2 x i32> [[RES1]]
578631
;
579-
; SVE-LABEL: define <2 x i32> @vectorize_sdiv_v2i32(
632+
; SVE-LABEL: define <2 x i32> @sdiv_v2i32_const_divisor(
580633
; SVE-SAME: <2 x i32> [[A:%.*]], <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]]) #[[ATTR0]] {
581634
; SVE-NEXT: [[TMP1:%.*]] = sdiv <2 x i32> [[A]], <i32 2, i32 4>
582635
; SVE-NEXT: [[TMP2:%.*]] = add <2 x i32> [[TMP1]], [[X]]
@@ -605,3 +658,57 @@ define <2 x i32> @vectorize_sdiv_v2i32(<2 x i32> %a, <2 x i32> %x, <2 x i32> %y,
605658
%res1 = insertelement <2 x i32> %res0, i32 %8, i32 1
606659
ret <2 x i32> %res1
607660
}
661+
662+
define <2 x i32> @sdiv_v2i32_Op1_unknown_Op2_const(<2 x i32> %a, <2 x i32> %x, <2 x i32> %y, <2 x i32> %z)
663+
; NO-SVE-LABEL: define <2 x i32> @sdiv_v2i32_Op1_unknown_Op2_const(
664+
; NO-SVE-SAME: <2 x i32> [[A:%.*]], <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]]) #[[ATTR0]] {
665+
; NO-SVE-NEXT: [[A0:%.*]] = extractelement <2 x i32> [[A]], i64 0
666+
; NO-SVE-NEXT: [[A1:%.*]] = extractelement <2 x i32> [[A]], i64 1
667+
; NO-SVE-NEXT: [[TMP1:%.*]] = sdiv i32 [[A0]], [[A0]]
668+
; NO-SVE-NEXT: [[TMP2:%.*]] = sdiv i32 [[A1]], 4
669+
; NO-SVE-NEXT: [[X0:%.*]] = extractelement <2 x i32> [[X]], i64 0
670+
; NO-SVE-NEXT: [[X1:%.*]] = extractelement <2 x i32> [[X]], i64 1
671+
; NO-SVE-NEXT: [[TMP3:%.*]] = add i32 [[TMP1]], [[X0]]
672+
; NO-SVE-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], [[X1]]
673+
; NO-SVE-NEXT: [[Y0:%.*]] = extractelement <2 x i32> [[Y]], i64 0
674+
; NO-SVE-NEXT: [[Y1:%.*]] = extractelement <2 x i32> [[Y]], i64 1
675+
; NO-SVE-NEXT: [[TMP5:%.*]] = sub i32 [[TMP3]], [[Y0]]
676+
; NO-SVE-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[Y1]]
677+
; NO-SVE-NEXT: [[Z0:%.*]] = extractelement <2 x i32> [[Z]], i64 0
678+
; NO-SVE-NEXT: [[Z1:%.*]] = extractelement <2 x i32> [[Z]], i64 1
679+
; NO-SVE-NEXT: [[TMP7:%.*]] = mul i32 [[TMP5]], [[Z0]]
680+
; NO-SVE-NEXT: [[TMP8:%.*]] = mul i32 [[TMP6]], [[Z1]]
681+
; NO-SVE-NEXT: [[RES0:%.*]] = insertelement <2 x i32> poison, i32 [[TMP7]], i32 0
682+
; NO-SVE-NEXT: [[RES1:%.*]] = insertelement <2 x i32> [[RES0]], i32 [[TMP8]], i32 1
683+
; NO-SVE-NEXT: ret <2 x i32> [[RES1]]
684+
;
685+
; SVE-LABEL: define <2 x i32> @sdiv_v2i32_Op1_unknown_Op2_const(
686+
; SVE-SAME: <2 x i32> [[A:%.*]], <2 x i32> [[X:%.*]], <2 x i32> [[Y:%.*]], <2 x i32> [[Z:%.*]]) #[[ATTR0]] {
687+
; SVE-NEXT: [[TMP1:%.*]] = shufflevector <2 x i32> [[A]], <2 x i32> <i32 poison, i32 4>, <2 x i32> <i32 0, i32 3>
688+
; SVE-NEXT: [[TMP2:%.*]] = sdiv <2 x i32> [[A]], [[TMP1]]
689+
; SVE-NEXT: [[TMP3:%.*]] = add <2 x i32> [[TMP2]], [[X]]
690+
; SVE-NEXT: [[TMP4:%.*]] = sub <2 x i32> [[TMP3]], [[Y]]
691+
; SVE-NEXT: [[TMP5:%.*]] = mul <2 x i32> [[TMP4]], [[Z]]
692+
; SVE-NEXT: ret <2 x i32> [[TMP5]]
693+
;
694+
{
695+
%a0 = extractelement <2 x i32> %a, i64 0
696+
%a1 = extractelement <2 x i32> %a, i64 1
697+
%1 = sdiv i32 %a0, %a0
698+
%2 = sdiv i32 %a1, 4
699+
%x0 = extractelement <2 x i32> %x, i64 0
700+
%x1 = extractelement <2 x i32> %x, i64 1
701+
%3 = add i32 %1, %x0
702+
%4 = add i32 %2, %x1
703+
%y0 = extractelement <2 x i32> %y, i64 0
704+
%y1 = extractelement <2 x i32> %y, i64 1
705+
%5 = sub i32 %3, %y0
706+
%6 = sub i32 %4, %y1
707+
%z0 = extractelement <2 x i32> %z, i64 0
708+
%z1 = extractelement <2 x i32> %z, i64 1
709+
%7 = mul i32 %5, %z0
710+
%8 = mul i32 %6, %z1
711+
%res0 = insertelement <2 x i32> poison, i32 %7, i32 0
712+
%res1 = insertelement <2 x i32> %res0, i32 %8, i32 1
713+
ret <2 x i32> %res1
714+
}

0 commit comments

Comments
 (0)